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| author | Alistair Francis <alistair.francis@wdc.com> | 2020-05-05 13:07:24 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-06-03 09:11:51 -0700 |
| commit | 26cd0362dd43a32fc9a917f5c00b20e9dafa93be (patch) | |
| tree | a32b850a57bfebf24bd3f68d4729b32d0fcc98db /include | |
| parent | b2a3a071f76d45c7ac2b8a1640153d3cc8259ca3 (diff) | |
| download | qemu-26cd0362dd43a32fc9a917f5c00b20e9dafa93be.zip qemu-26cd0362dd43a32fc9a917f5c00b20e9dafa93be.tar.gz qemu-26cd0362dd43a32fc9a917f5c00b20e9dafa93be.tar.bz2 | |
hw/riscv: spike: Remove deprecated ISA specific machines
The ISA specific Spike machines have been deprecated in QEMU since 4.1,
let's finally remove them.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/riscv/spike.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index dc77042..1cd72b8 100644 --- a/include/hw/riscv/spike.h +++ b/include/hw/riscv/spike.h @@ -39,11 +39,9 @@ enum { }; #if defined(TARGET_RISCV32) -#define SPIKE_V1_09_1_CPU TYPE_RISCV_CPU_RV32GCSU_V1_09_1 -#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 +#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE32 #elif defined(TARGET_RISCV64) -#define SPIKE_V1_09_1_CPU TYPE_RISCV_CPU_RV64GCSU_V1_09_1 -#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV64GCSU_V1_10_0 +#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE64 #endif #endif |