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author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-11-06 10:34:06 -0300 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2024-12-20 11:22:46 +1000 |
commit | 9afd26715ef4f887f5eaf2ecfe365a7837f2e500 (patch) | |
tree | 26b7e85e9ac1e93c93f85afff7525bf42002a443 /include/hw/riscv | |
parent | 01c1caa9d1b4a1938e0baba1a64c26636a3aff9f (diff) | |
download | qemu-9afd26715ef4f887f5eaf2ecfe365a7837f2e500.zip qemu-9afd26715ef4f887f5eaf2ecfe365a7837f2e500.tar.gz qemu-9afd26715ef4f887f5eaf2ecfe365a7837f2e500.tar.bz2 |
hw/riscv/riscv-iommu: implement reset protocol
Add a riscv_iommu_reset() helper in the base emulation code that
implements the expected reset behavior as defined by the riscv-iommu
spec.
Devices can then use this helper in their own reset callbacks.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-7-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv')
-rw-r--r-- | include/hw/riscv/iommu.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/hw/riscv/iommu.h b/include/hw/riscv/iommu.h index 8a8acfc..b03339d 100644 --- a/include/hw/riscv/iommu.h +++ b/include/hw/riscv/iommu.h @@ -30,12 +30,14 @@ typedef struct RISCVIOMMUState RISCVIOMMUState; typedef struct RISCVIOMMUSpace RISCVIOMMUSpace; #define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci" -OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStatePci, RISCV_IOMMU_PCI) +OBJECT_DECLARE_TYPE(RISCVIOMMUStatePci, RISCVIOMMUPciClass, RISCV_IOMMU_PCI) typedef struct RISCVIOMMUStatePci RISCVIOMMUStatePci; +typedef struct RISCVIOMMUPciClass RISCVIOMMUPciClass; #define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device" -OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStateSys, RISCV_IOMMU_SYS) +OBJECT_DECLARE_TYPE(RISCVIOMMUStateSys, RISCVIOMMUSysClass, RISCV_IOMMU_SYS) typedef struct RISCVIOMMUStateSys RISCVIOMMUStateSys; +typedef struct RISCVIOMMUSysClass RISCVIOMMUSysClass; #define FDT_IRQ_TYPE_EDGE_LOW 1 |