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| author | Samuel Tardieu <sam@rfc1149.net> | 2024-01-06 19:15:02 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:42:40 +0000 |
| commit | 33995902b462cf1c4ba1177ee758713dd8d4ec0d (patch) | |
| tree | 8d28d6499fdc4247db5f6897ed89020cda04e87e /include/hw/misc/stm32l4x5_exti.h | |
| parent | d09923ad19fc3d653693ee81f1742fb8d29c5730 (diff) | |
| download | qemu-33995902b462cf1c4ba1177ee758713dd8d4ec0d.zip qemu-33995902b462cf1c4ba1177ee758713dd8d4ec0d.tar.gz qemu-33995902b462cf1c4ba1177ee758713dd8d4ec0d.tar.bz2 | |
hw/arm/armv7m: alias the NVIC "num-prio-bits" property
A SoC will not have a direct access to the NVIC embedded in its ARM
core. By aliasing the "num-prio-bits" property similarly to what is
done for the "num-irq" one, a SoC can easily configure it on its
armv7m instance.
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240106181503.1746200-3-sam@rfc1149.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/misc/stm32l4x5_exti.h')
0 files changed, 0 insertions, 0 deletions