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authorZoltán Baldaszti <bztemail@gmail.com>2019-03-15 11:12:28 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-03-15 11:12:28 +0000
commit67d80321f26d9ea2b623ffac567a2f758ceae037 (patch)
treeecc237bc08b5ddab21231db2bc47db9889bdbe35 /include/hw/intc
parent7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494 (diff)
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hw/intc/bcm2836_control: Implement local timer
The BCM2836 control logic module includes a simple "local timer" which is a programmable down-counter that can generates an interrupt. Implement this functionality. Signed-off-by: Zoltán Baldaszti <bztemail@gmail.com> [PMM: wrote commit message; wrapped long line; tweaked some comments to match the final version of the code] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc')
-rw-r--r--include/hw/intc/bcm2836_control.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/intc/bcm2836_control.h b/include/hw/intc/bcm2836_control.h
index 613f3c4..de061b8 100644
--- a/include/hw/intc/bcm2836_control.h
+++ b/include/hw/intc/bcm2836_control.h
@@ -5,6 +5,9 @@
* Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
* Written by Andrew Baumann
*
+ * ARM Local Timer IRQ Copyright (c) 2019. Zoltán Baldaszti
+ * Added basic IRQ_TIMER interrupt support
+ *
* This code is licensed under the GNU GPLv2 and later.
*/
@@ -12,6 +15,7 @@
#define BCM2836_CONTROL_H
#include "hw/sysbus.h"
+#include "qemu/timer.h"
/* 4 mailboxes per core, for 16 total */
#define BCM2836_NCORES 4
@@ -39,6 +43,11 @@ typedef struct BCM2836ControlState {
bool gpu_irq, gpu_fiq;
uint8_t timerirqs[BCM2836_NCORES];
+ /* local timer */
+ QEMUTimer timer;
+ uint32_t local_timer_control;
+ uint8_t route_localtimer;
+
/* interrupt source registers, post-routing (also input-derived; visible) */
uint32_t irqsrc[BCM2836_NCORES];
uint32_t fiqsrc[BCM2836_NCORES];