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| author | Niek Linnenbank <nieklinnenbank@gmail.com> | 2020-03-11 23:18:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-12 16:27:33 +0000 |
| commit | fef06c8b1b2ea786e660f0c694dc88d052cde33c (patch) | |
| tree | 8e5992f04bb21ab31ea4dcaf8cddca5e73ba31db /include/hw/arm | |
| parent | b0c966661e9fcdf48bb736414df8230ab2a2da9d (diff) | |
| download | qemu-fef06c8b1b2ea786e660f0c694dc88d052cde33c.zip qemu-fef06c8b1b2ea786e660f0c694dc88d052cde33c.tar.gz qemu-fef06c8b1b2ea786e660f0c694dc88d052cde33c.tar.bz2 | |
hw/arm/allwinner-h3: add Clock Control Unit
The Clock Control Unit is responsible for clock signal generation,
configuration and distribution in the Allwinner H3 System on Chip.
This commit adds support for the Clock Control Unit which emulates
a simple read/write register interface.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200311221854.30370-4-nieklinnenbank@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
| -rw-r--r-- | include/hw/arm/allwinner-h3.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 2aac9b7..abdc208 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -39,6 +39,7 @@ #include "hw/arm/boot.h" #include "hw/timer/allwinner-a10-pit.h" #include "hw/intc/arm_gic.h" +#include "hw/misc/allwinner-h3-ccu.h" #include "target/arm/cpu.h" /** @@ -55,6 +56,7 @@ enum { AW_H3_SRAM_A1, AW_H3_SRAM_A2, AW_H3_SRAM_C, + AW_H3_CCU, AW_H3_PIT, AW_H3_UART0, AW_H3_UART1, @@ -97,6 +99,7 @@ typedef struct AwH3State { ARMCPU cpus[AW_H3_NUM_CPUS]; const hwaddr *memmap; AwA10PITState timer; + AwH3ClockCtlState ccu; GICState gic; MemoryRegion sram_a1; MemoryRegion sram_a2; |