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author | Sergey Kambalin <serg.oker@gmail.com> | 2024-02-25 18:02:19 -0600 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-27 13:01:42 +0000 |
commit | f932093ae165ac9abfbded10510ff5c891d44ec3 (patch) | |
tree | e21e83d176cd09499ac975d9ff419be7641c4c81 /include/hw/arm | |
parent | a365572b9c5c7baf8fcd9ea7200843e6fbcd53ca (diff) | |
download | qemu-f932093ae165ac9abfbded10510ff5c891d44ec3.zip qemu-f932093ae165ac9abfbded10510ff5c891d44ec3.tar.gz qemu-f932093ae165ac9abfbded10510ff5c891d44ec3.tar.bz2 |
hw/arm/bcm2836: Split out common part of BCM283X classes
Pre setup for BCM2838 introduction
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240226000259.2752893-2-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r-- | include/hw/arm/bcm2836.h | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h index 6f90cab..5a6717c 100644 --- a/include/hw/arm/bcm2836.h +++ b/include/hw/arm/bcm2836.h @@ -17,8 +17,10 @@ #include "target/arm/cpu.h" #include "qom/object.h" +#define TYPE_BCM283X_BASE "bcm283x-base" +OBJECT_DECLARE_TYPE(BCM283XBaseState, BCM283XBaseClass, BCM283X_BASE) #define TYPE_BCM283X "bcm283x" -OBJECT_DECLARE_TYPE(BCM283XState, BCM283XClass, BCM283X) +OBJECT_DECLARE_SIMPLE_TYPE(BCM283XState, BCM283X) #define BCM283X_NCPUS 4 @@ -30,7 +32,7 @@ OBJECT_DECLARE_TYPE(BCM283XState, BCM283XClass, BCM283X) #define TYPE_BCM2836 "bcm2836" #define TYPE_BCM2837 "bcm2837" -struct BCM283XState { +struct BCM283XBaseState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -41,7 +43,27 @@ struct BCM283XState { ARMCPU core; } cpu[BCM283X_NCPUS]; BCM2836ControlState control; +}; + +struct BCM283XBaseClass { + /*< private >*/ + DeviceClass parent_class; + /*< public >*/ + const char *name; + const char *cpu_type; + unsigned core_count; + hwaddr peri_base; /* Peripheral base address seen by the CPU */ + hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */ + int clusterid; +}; + +struct BCM283XState { + /*< private >*/ + BCM283XBaseState parent_obj; + /*< public >*/ BCM2835PeripheralState peripherals; }; +bool bcm283x_common_realize(DeviceState *dev, Error **errp); + #endif /* BCM2836_H */ |