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authorPeter Maydell <peter.maydell@linaro.org>2021-01-28 11:41:44 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-01-29 15:54:44 +0000
commit38867d0b7e7266d845d1b7d471edae4b73e9eb1a (patch)
treefe75984fd38f9df85afb85d591c83c77c54f802c /include/hw/arm
parent911612989d8224e1e37e47438dac29330f0798ff (diff)
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arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE
Now no users are setting the frq properties on the CMSDK timer, dualtimer, watchdog or ARMSSE SoC devices, we can remove the properties and the struct fields that back them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-25-peter.maydell@linaro.org Message-id: 20210121190622.22000-25-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/armsse.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index bfa1e79..676cd4f 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -41,7 +41,6 @@
* + Clock input "S32KCLK": slow 32KHz clock used for a few peripherals
* + QOM property "memory" is a MemoryRegion containing the devices provided
* by the board model.
- * + QOM property "MAINCLK_FRQ" is the frequency of the main system clock
* + QOM property "EXP_NUMIRQ" sets the number of expansion interrupts.
* (In hardware, the SSE-200 permits the number of expansion interrupts
* for the two CPUs to be configured separately, but we restrict it to
@@ -218,7 +217,6 @@ struct ARMSSE {
/* Properties */
MemoryRegion *board_memory;
uint32_t exp_numirq;
- uint32_t mainclk_frq;
uint32_t sram_addr_width;
uint32_t init_svtor;
bool cpu_fpu[SSE_MAX_CPUS];