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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-04-06 15:03:41 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-05-05 10:49:50 +1000 |
| commit | 427d8e7dd871a747727dbbfef22041fedef2ee32 (patch) | |
| tree | dd568f474c7b730adce5de6575fb11910ba6145b /hw/misc/sifive_u_prci.c | |
| parent | 74828eabf2c301ff93fee297519d25e0f1804b2a (diff) | |
| download | qemu-427d8e7dd871a747727dbbfef22041fedef2ee32.zip qemu-427d8e7dd871a747727dbbfef22041fedef2ee32.tar.gz qemu-427d8e7dd871a747727dbbfef22041fedef2ee32.tar.bz2 | |
target/riscv: remove cpu->cfg.ext_e
Create a new "e" RISCVCPUMisaExtConfig property that will update
env->misa_ext* with RVE. Instances of cpu->cfg.ext_e and similar are
replaced with riscv_has_ext(env, RVE).
Remove the old "e" property and 'ext_e' from RISCVCPUConfig.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230406180351.570807-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/misc/sifive_u_prci.c')
0 files changed, 0 insertions, 0 deletions