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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-03-02 23:39:06 +0100 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-03-13 20:29:36 +0100 |
commit | 260290677e62473f1901608cc89c6e919bb77fc6 (patch) | |
tree | f6e3a69eca129cfd288e74c6f1eeab891e72e9e3 /hw/mips | |
parent | 3f8d1885e48e4d72eab0688f604de62e0aea7a38 (diff) | |
download | qemu-260290677e62473f1901608cc89c6e919bb77fc6.zip qemu-260290677e62473f1901608cc89c6e919bb77fc6.tar.gz qemu-260290677e62473f1901608cc89c6e919bb77fc6.tar.bz2 |
hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()
The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE,
so initialize it before it is realized, not after.
Rename the region as 'gt64120-isd' so it is clearer to realize
it belongs to the GT64120 in the memory tree view.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20210309142630.728014-2-f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
-rw-r--r-- | hw/mips/gt64xxx_pci.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 588e6f9..6eb73e7 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1196,6 +1196,14 @@ static void gt64120_reset(DeviceState *dev) gt64120_pci_mapping(s); } +static void gt64120_realize(DeviceState *dev, Error **errp) +{ + GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); + + memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, + "gt64120-isd", 0x1000); +} + PCIBus *gt64120_register(qemu_irq *pic) { GT64120State *d; @@ -1214,8 +1222,6 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, - "isd-mem", 0x1000); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); return phb->bus; @@ -1270,6 +1276,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize = gt64120_realize; dc->reset = gt64120_reset; dc->vmsd = &vmstate_gt64120; } |