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| author | Xiaojuan Yang <yangxiaojuan@loongson.cn> | 2022-06-06 20:43:22 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:11:55 +0000 |
| commit | 0f4fcf1845fe188901d4ff4cc807bd78690dddd0 (patch) | |
| tree | cd7466fdef71bd8219e562c98335e6a78d89ede4 /hw/intc/trace-events | |
| parent | f6783e34380955e9ec0656c7b9fb8936b9733a6a (diff) | |
| download | qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.zip qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.tar.gz qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.tar.bz2 | |
hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-33-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/intc/trace-events')
| -rw-r--r-- | hw/intc/trace-events | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 3677466..4cdbc01 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -291,3 +291,12 @@ sh_intc_set(int id, int enable) "setting interrupt group %d to %d" # loongarch_ipi.c loongarch_ipi_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 loongarch_ipi_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 + +# loongarch_pch_pic.c +loongarch_pch_pic_irq_handler(int irq, int level) "irq %d level %d" +loongarch_pch_pic_low_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_low_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_high_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_high_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_readb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 +loongarch_pch_pic_writeb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 |