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| author | BALATON Zoltan <balaton@eik.bme.hu> | 2023-11-01 21:45:38 +0100 |
|---|---|---|
| committer | Marc-André Lureau <marcandre.lureau@redhat.com> | 2023-11-06 15:58:43 +0400 |
| commit | bf9ac62a92ac087e44958ec18f795edfd2bf020a (patch) | |
| tree | 9429efdff1ff60ad0ff6ceb8c46d11081a7eae70 /hw/display/ati_regs.h | |
| parent | e876b3400a01c5f3947de34d6c10388f43192dc9 (diff) | |
| download | qemu-bf9ac62a92ac087e44958ec18f795edfd2bf020a.zip qemu-bf9ac62a92ac087e44958ec18f795edfd2bf020a.tar.gz qemu-bf9ac62a92ac087e44958ec18f795edfd2bf020a.tar.bz2 | |
ati-vga: Add 30 bit palette access register
Radeon cards have a 30 bit DAC and corresponding palette register to
access it. We only use 8 bits but let the guests use 10 bit color
values for those that access it through this register.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <9fa19eec95d1563cc65853cf26912f230c702b32.1698871239.git.balaton@eik.bme.hu>
Diffstat (limited to 'hw/display/ati_regs.h')
| -rw-r--r-- | hw/display/ati_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index c697b32..d712774 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -48,6 +48,7 @@ #define AMCGPIO_EN_MIR 0x00a8 #define PALETTE_INDEX 0x00b0 #define PALETTE_DATA 0x00b4 +#define PALETTE_30_DATA 0x00b8 #define CNFG_CNTL 0x00e0 #define GEN_RESET_CNTL 0x00f0 #define CNFG_MEMSIZE 0x00f8 |