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| author | Michael Tokarev <mjt@tls.msk.ru> | 2024-11-26 16:12:09 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-11-26 16:12:09 +0000 |
| commit | a0dfe58acda236ebb4ebf292b1c5980487d6d046 (patch) | |
| tree | 0730dd5748696114b2339817391c459737667135 /docs/specs | |
| parent | ba54a7e6b86884e43bed2d2f5a79c719059652a8 (diff) | |
| download | qemu-a0dfe58acda236ebb4ebf292b1c5980487d6d046.zip qemu-a0dfe58acda236ebb4ebf292b1c5980487d6d046.tar.gz qemu-a0dfe58acda236ebb4ebf292b1c5980487d6d046.tar.bz2 | |
target/arm/tcg/cpu32.c: swap ATCM and BTCM register names
According to Cortex-R5 r1p2 manual, register with opcode2=0 is
BTCM and with opcode2=1 is ATCM, - exactly the opposite from how
qemu labels them. Just swap the labels to avoid confusion, -
both registers are implemented as always-zero.
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241121171602.3273252-1-mjt@tls.msk.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/specs')
0 files changed, 0 insertions, 0 deletions