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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-04 01:58:18 +0200
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:07:25 -0700
commit652d19a642b34cd99fc2ce65267a216cb9de8f4f (patch)
treed1f5c2ec46606f0c92883ca26b4c8b48a03e73d3
parent63de8825af77edd71450f6bacaa55fb88d7f86e2 (diff)
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target/arm: Expose Aarch64 helpers unconditionally
At worst, for 32-bit arm binary, using these methods will now produce a link time error, instead of a compile time one. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250403235821.9909-37-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/arm/internals.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 01408e4..d24acdd 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1808,7 +1808,6 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env)
return (1ULL << 31) | ((1ULL << pmu_num_counters(env)) - 1);
}
-#ifdef TARGET_AARCH64
GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cpu, int base_reg);
int aarch64_gdb_get_sve_reg(CPUState *cs, GByteArray *buf, int reg);
int aarch64_gdb_set_sve_reg(CPUState *cs, uint8_t *buf, int reg);
@@ -1826,7 +1825,6 @@ void aarch64_max_tcg_initfn(Object *obj);
void aarch64_add_pauth_properties(Object *obj);
void aarch64_add_sve_properties(Object *obj);
void aarch64_add_sme_properties(Object *obj);
-#endif
/* Read the CONTROL register as the MRS instruction would. */
uint32_t arm_v7m_mrs_control(CPUARMState *env, uint32_t secure);