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| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-08-28 18:26:39 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-08-29 11:55:01 +0200 |
| commit | 35e4b54d90b07736d24d736c50f236231cde929f (patch) | |
| tree | a7117a1b7fb2bc821a66c93a29c6d213f6bae5e1 | |
| parent | e3c7559d8902fbb9857fb94fc5391f258cc3c4d1 (diff) | |
| download | qemu-35e4b54d90b07736d24d736c50f236231cde929f.zip qemu-35e4b54d90b07736d24d736c50f236231cde929f.tar.gz qemu-35e4b54d90b07736d24d736c50f236231cde929f.tar.bz2 | |
target/mips: Clean up handling of CP0 register 14
Clean up handling of CP0 register 14.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1567009614-12438-16-git-send-email-aleksandar.markovic@rt-rk.com>
| -rw-r--r-- | target/mips/cpu.h | 1 | ||||
| -rw-r--r-- | target/mips/translate.c | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 4fce05a..2a9c6d5 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -361,6 +361,7 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG13__NESTEDEXC 5 /* CP0 Register 14 */ #define CP0_REG14__EPC 0 +#define CP0_REG14__NESTEDEPC 2 /* CP0 Register 15 */ #define CP0_REG15__PRID 0 #define CP0_REG15__EBASE 1 diff --git a/target/mips/translate.c b/target/mips/translate.c index 4da08e1..efedced 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7212,7 +7212,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_14: switch (sel) { - case 0: + case CP0_REG14__EPC: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); tcg_gen_ext32s_tl(arg, arg); register_name = "EPC"; @@ -7946,7 +7946,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_14: switch (sel) { - case 0: + case CP0_REG14__EPC: tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); register_name = "EPC"; break; @@ -8687,7 +8687,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_14: switch (sel) { - case 0: + case CP0_REG14__EPC: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); register_name = "EPC"; break; @@ -9409,7 +9409,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_14: switch (sel) { - case 0: + case CP0_REG14__EPC: tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); register_name = "EPC"; break; |