Age | Commit message (Collapse) | Author | Files | Lines | |
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2024-04-23 | Implementation of riscv_hwprobe syscall from Linux (#325) | Wojciech Muła | 1 | -0/+1 | |
See: https://www.kernel.org/doc/html/latest/arch/riscv/hwprobe.html | |||||
2021-08-04 | Use __builtin_frame_address() instead of "sp" directly. | John Baldwin | 1 | -3/+3 | |
Also use pointer arithmetic on char * instead of void *. | |||||
2021-08-04 | Revert "machine: fix a case of undefined behaviour with SP handling (#245)" | Andrew Waterman | 1 | -8/+3 | |
This reverts commit 5450c2f731f16abe3a4f244c383c55f559c97359. | |||||
2021-08-04 | Revert "Use __builtin_frame_address() instead of "sp" directly." | Andrew Waterman | 1 | -4/+9 | |
This reverts commit 17bec41e9bd44c43901938b784680661b9b28a76. | |||||
2021-08-04 | Use __builtin_frame_address() instead of "sp" directly. | John Baldwin | 1 | -9/+4 | |
Also use pointer arithmetic on char * instead of void *. | |||||
2021-05-07 | machine: fix a case of undefined behaviour with SP handling (#245) | Saleem Abdulrasool | 1 | -3/+8 | |
The use of `asm` for register aliasing is supported in two different contexts: - local variables (including GNU expression statements) where it may only be used for specifying registers for input and output operands to extended `asm` syntax. c.f. https://gcc.gnu.org/onlinedocs/gcc/Local-Register-Variables.html#Local-Register-Variables - global variables where it may be used to observe the contents of a register. c.f. https://gcc.gnu.org/onlinedocs/gcc/Global-Register-Variables.html#Global-Register-Variables The two options here is to either to hoist the variable out into a global variable, but then it should not be in a header due to fears of ODR in case the optimizer does not inline it away, and thus becomes a bit more tricky. The alternative that this change actually adopts is to explicitly use a move to copy the value out via the GNU extended assembly syntax. With this change, it is now possible to build the Proxy Kernel completely with clang/LLVM and link with LLD. The generated kernel also runs under SPIKE and behaves as expected in a simple smoke test (without any executable prints the expected message, and runs a trivial RVV example). | |||||
2020-07-31 | Don't perform 64-bit accesses to the PLIC (#205) | Alexander Richardson | 1 | -2/+2 | |
Recent QEMU will fault for 8-byte accesses. Use a uint32_t instead of uintptr_t to avoid those problems. | |||||
2019-01-04 | Set up PMP earlier, so it can be overridden later | Andrew Waterman | 1 | -0/+1 | |
2018-07-12 | bbl: boot payload in machine mode when --enable-boot-machine is passed | Hesham Almatary | 1 | -0/+2 | |
2018-07-09 | Properly license all nontrivial files | Andrew Waterman | 1 | -0/+2 | |
2018-03-05 | mtrap: add a halt IPI used for poweroff (#86) | Wesley W. Terpstra | 1 | -0/+1 | |
Otherwise, linux complains the moment an interrupt arrives and wakes up one of the not-looping cores. | |||||
2017-08-14 | finisher: support terminating sifive devices simulation (#61) | Wesley W. Terpstra | 1 | -2/+2 | |
2017-08-03 | Add the '--enable-print-device-tree' argument | Palmer Dabbelt | 1 | -0/+2 | |
I'm trying to debug some device tree problems while booting Linux and figured it would be really nice to have access to the device tree while trying to debug these problems. I think this might be useful for lots of people, so I went ahead and cleaned up the code enough that it should actaully work in most cases. | |||||
2017-08-02 | Move DISABLED_HART_MASK to the platform | Palmer Dabbelt | 1 | -5/+0 | |
Some platforms can't boot Linux on all the harts. This commit allows platforms to define the set of harts that should be prevented from booting past BBL. This is essentially just a new mechanism for defining the DISABLED_HART_MASK. | |||||
2017-04-06 | mtrap: allow override of DISABLED_HART_MASK from CFLAGS | Wesley W. Terpstra | 1 | -0/+2 | |
2017-04-05 | Remove num_harts; use hart_mask exclusively | Andrew Waterman | 1 | -1/+0 | |
2017-04-05 | Rename HART_MASK to DISABLED_HART_MASK to clarify polarity | Andrew Waterman | 1 | -1/+1 | |
2017-04-05 | bbl: prevent named cores from booting | Wesley W. Terpstra | 1 | -0/+3 | |
2017-03-22 | SBI: a0+a1 hold hartid+dtb pointer between boot loader stagesfdt | Wesley W. Terpstra | 1 | -2/+2 | |
2017-02-20 | Don't block for acks on console writes | Andrew Waterman | 1 | -1/+0 | |
2017-02-20 | WIP on SBI | Andrew Waterman | 1 | -5/+5 | |
2017-02-19 | Handle IPIs and timer interrupts more quickly | Andrew Waterman | 1 | -8/+10 | |
2017-02-17 | WIP towards ECALL interface for SBI | Andrew Waterman | 1 | -2/+1 | |
2017-02-15 | Cleanly separate HTIF code; don't poll keyboard on timer interrupt | Andrew Waterman | 1 | -1/+0 | |
2016-10-25 | Use __riscv_flen macro to detect FP support | Andrew Waterman | 1 | -1/+1 | |
2016-08-26 | Update to new counter spec | Andrew Waterman | 1 | -7/+0 | |
2016-06-05 | PLIC registers are 32-bit, not 16-bit | Andrew Waterman | 1 | -3/+3 | |
2016-05-22 | Add preliminary support for the interrupt controller | Andrew Waterman | 1 | -0/+8 | |
2016-05-03 | Find IPI address in configuration string | Andrew Waterman | 1 | -0/+1 | |
2016-04-29 | Remove mtime/mtimecmp | Andrew Waterman | 1 | -4/+3 | |
2016-03-10 | Make num_harts a uintptr_t | Andrew Waterman | 1 | -2/+2 | |
Making it a uint32_t is a false economy. | |||||
2016-03-10 | Remove dead code | Andrew Waterman | 1 | -1/+0 | |
2016-03-09 | Refactor pk, bbl, machine into separate libraries | Andrew Waterman | 1 | -0/+96 | |
Yuck. |