aboutsummaryrefslogtreecommitdiff
path: root/machine/mtrap.h
AgeCommit message (Collapse)AuthorFilesLines
2024-04-23Implementation of riscv_hwprobe syscall from Linux (#325)Wojciech Muła1-0/+1
See: https://www.kernel.org/doc/html/latest/arch/riscv/hwprobe.html
2021-08-04Use __builtin_frame_address() instead of "sp" directly.John Baldwin1-3/+3
Also use pointer arithmetic on char * instead of void *.
2021-08-04Revert "machine: fix a case of undefined behaviour with SP handling (#245)"Andrew Waterman1-8/+3
This reverts commit 5450c2f731f16abe3a4f244c383c55f559c97359.
2021-08-04Revert "Use __builtin_frame_address() instead of "sp" directly."Andrew Waterman1-4/+9
This reverts commit 17bec41e9bd44c43901938b784680661b9b28a76.
2021-08-04Use __builtin_frame_address() instead of "sp" directly.John Baldwin1-9/+4
Also use pointer arithmetic on char * instead of void *.
2021-05-07machine: fix a case of undefined behaviour with SP handling (#245)Saleem Abdulrasool1-3/+8
The use of `asm` for register aliasing is supported in two different contexts: - local variables (including GNU expression statements) where it may only be used for specifying registers for input and output operands to extended `asm` syntax. c.f. https://gcc.gnu.org/onlinedocs/gcc/Local-Register-Variables.html#Local-Register-Variables - global variables where it may be used to observe the contents of a register. c.f. https://gcc.gnu.org/onlinedocs/gcc/Global-Register-Variables.html#Global-Register-Variables The two options here is to either to hoist the variable out into a global variable, but then it should not be in a header due to fears of ODR in case the optimizer does not inline it away, and thus becomes a bit more tricky. The alternative that this change actually adopts is to explicitly use a move to copy the value out via the GNU extended assembly syntax. With this change, it is now possible to build the Proxy Kernel completely with clang/LLVM and link with LLD. The generated kernel also runs under SPIKE and behaves as expected in a simple smoke test (without any executable prints the expected message, and runs a trivial RVV example).
2020-07-31Don't perform 64-bit accesses to the PLIC (#205)Alexander Richardson1-2/+2
Recent QEMU will fault for 8-byte accesses. Use a uint32_t instead of uintptr_t to avoid those problems.
2019-01-04Set up PMP earlier, so it can be overridden laterAndrew Waterman1-0/+1
2018-07-12bbl: boot payload in machine mode when --enable-boot-machine is passedHesham Almatary1-0/+2
2018-07-09Properly license all nontrivial filesAndrew Waterman1-0/+2
2018-03-05mtrap: add a halt IPI used for poweroff (#86)Wesley W. Terpstra1-0/+1
Otherwise, linux complains the moment an interrupt arrives and wakes up one of the not-looping cores.
2017-08-14finisher: support terminating sifive devices simulation (#61)Wesley W. Terpstra1-2/+2
2017-08-03Add the '--enable-print-device-tree' argumentPalmer Dabbelt1-0/+2
I'm trying to debug some device tree problems while booting Linux and figured it would be really nice to have access to the device tree while trying to debug these problems. I think this might be useful for lots of people, so I went ahead and cleaned up the code enough that it should actaully work in most cases.
2017-08-02Move DISABLED_HART_MASK to the platformPalmer Dabbelt1-5/+0
Some platforms can't boot Linux on all the harts. This commit allows platforms to define the set of harts that should be prevented from booting past BBL. This is essentially just a new mechanism for defining the DISABLED_HART_MASK.
2017-04-06mtrap: allow override of DISABLED_HART_MASK from CFLAGSWesley W. Terpstra1-0/+2
2017-04-05Remove num_harts; use hart_mask exclusivelyAndrew Waterman1-1/+0
2017-04-05Rename HART_MASK to DISABLED_HART_MASK to clarify polarityAndrew Waterman1-1/+1
2017-04-05bbl: prevent named cores from bootingWesley W. Terpstra1-0/+3
2017-03-22SBI: a0+a1 hold hartid+dtb pointer between boot loader stagesfdtWesley W. Terpstra1-2/+2
2017-02-20Don't block for acks on console writesAndrew Waterman1-1/+0
2017-02-20WIP on SBIAndrew Waterman1-5/+5
2017-02-19Handle IPIs and timer interrupts more quicklyAndrew Waterman1-8/+10
2017-02-17WIP towards ECALL interface for SBIAndrew Waterman1-2/+1
2017-02-15Cleanly separate HTIF code; don't poll keyboard on timer interruptAndrew Waterman1-1/+0
2016-10-25Use __riscv_flen macro to detect FP supportAndrew Waterman1-1/+1
2016-08-26Update to new counter specAndrew Waterman1-7/+0
2016-06-05PLIC registers are 32-bit, not 16-bitAndrew Waterman1-3/+3
2016-05-22Add preliminary support for the interrupt controllerAndrew Waterman1-0/+8
2016-05-03Find IPI address in configuration stringAndrew Waterman1-0/+1
2016-04-29Remove mtime/mtimecmpAndrew Waterman1-4/+3
2016-03-10Make num_harts a uintptr_tAndrew Waterman1-2/+2
Making it a uint32_t is a false economy.
2016-03-10Remove dead codeAndrew Waterman1-1/+0
2016-03-09Refactor pk, bbl, machine into separate librariesAndrew Waterman1-0/+96
Yuck.