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See: https://www.kernel.org/doc/html/latest/arch/riscv/hwprobe.html
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It was originally added as a temporary hack to hide a race condition in
a prototype. It should've been removed long ago.
Resolves #312
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h/t @jrtc27
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Resolves #249
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The LLVM IAS currently does not support the older spelling for the CSR.
Update the references to the modern name.
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Tested using the RocketChip CPU option.
(see https://github.com/enjoy-digital/litex)
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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Recent QEMU will fault for 8-byte accesses. Use a uint32_t instead of
uintptr_t to avoid those problems.
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77a5df569451571d608650a34183d53df99790ec)
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On 64-bit Rocket with 'DefaultFPGAConfig' (using 'WithNSmallCores'),
the 'U' extension is not supported, and accessing 'mcounteren' would
trigger an 'Illegal Instruction' trap.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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This reverts commit 7bee30c1ff56975041ffc67cd0170d7477aba865.
All ones is no longer "reserved", so the old code is OK.
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The number of interrupt enable words should be the number of devices
divided by the number of bits per word (not the number of bytes per
word) and it should round up.
Without this fix, when using a larger number of interrupts,
the user will see a number of errors in qemu of the form:
plic: invalid register write: %08x
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
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Currently it's being used by both enter_supervisor_mode and enter_machine_mode
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Support for separate firmware and kernel payload is added
by updating BBL to read optional preloaded kernel address
attributes from device-tree using a similar mechanism to
that used to pass init ramdisk addresses to linux kernel.
chosen {
riscv,kernel-start = <0x00000000 0x80200000>;
riscv,kernel-end = <0x00000000 0x80590634>;
};
These attributes are added by QEMU and read by BBL when combining
-bios <firmware-image> and -kernel <kernel-image> options. e.g.
$ qemu-system-riscv64 -machine virt -bios bbl -kernel vmlinux
With this change, bbl can be compiled without --with-payload
and the dummy payload alignment is altered to make the memory
footprint of the firmware-only bbl smaller. The dummy payload
message is updated to indicate the alternative load method.
This load method could also be supported by a first stage boot
loader that reads seperate firmware and kernel from SPI flash.
The main advantage of this new mechanism is that it eases kernel
development by avoiding the riscv-pk packaging step after kernel
builds, makes building per repository artefacts for CI simpler,
and mimics bootloaders on other platforms that can load a kernel
image file directly. Ultimately BBL should use an SPI driver to
load the kernel image however this mechanism supports use cases
such such as QEMU's -bios, -kernel and -initrd options following
examples from other platforms that pass kernel entry to firmware
via device-tree.
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
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* If BBL emulates the FPU, the trap handler will load emulated FCSR from
x0's save slot into tp. The emulated FCSR should be initialized, else
the field of rounding mode will contain garbage codes. This will
lead to raising SIGABRT for a user mode program which tries to print a
floating point variable. In glibc, __printf_fp_l() (defined in
riscv-glibc/stdio-common/printf_fp.c) will call round_away() (defined
in riscv-glibc/include/rounding-mode.h). With a garbage rounding mode
in emulated FCSR, round_away() may call abort().
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The E51 core on the U54-MC lacks supervisor mode, thus the plic_s_ie and plic_s_thresh are NULL when running on this core. This adds checks for this case.
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Reboot does not work reliably without this.
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QEMU currently provides the console via HTIF and the SBI. That's a bit
messy because BBL polls for serial input, which means that typing too
quickly loses characters. While QEMU has a standard 16550 device model,
there's no way to have two consoles share the console in QEMU (as they'd
step all over each other) so that means we can't have both the HTIF
console and the 16550 console.
With this patch, QEMU can be changed to use a 16650 instead of the HTIF
for serial output. Linux will use the SBI for early printk support
(which is fine, polling for output is stable) and then swap over as soon
as it detects the UART. When Linux swaps it prints out the whole
history, but there's probably a way to get around that. There's a few
lines that are output to both, but it appears the Linux driver is close
enough to ours that nothing catastrophic happens -- there's not much to
the device, so hopefully that pans out on real hardware too.
Once Linux swaps over to natively using the driver we get reliable
console input. If you don't have the in-kernel driver then Linux never
swaps over and keeps using the SBI console just like before.
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We now automatically detect everything that the platform interface used
to be used for, so it's now obsolete!
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Without this I can't get printf to show me debug info during early boot.
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This checks to see if a hart can't boot Linux by looking for a
compatible "mmu-type" field. If the hart can't boot Linux, then bbl
masks it off.
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Some platforms can't boot Linux on all the harts. This commit allows
platforms to define the set of harts that should be prevented from
booting past BBL. This is essentially just a new mechanism for defining
the DISABLED_HART_MASK.
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The clint was wiping out information discovered by the plic.
Initialize hart stacks as they are discovered.
Then fill in clint+plic info
Then wake the harts.
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https://github.com/riscv/riscv-isa-manual/issues/10
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