diff options
Diffstat (limited to 'newlib/libc/machine/i960')
33 files changed, 7061 insertions, 0 deletions
diff --git a/newlib/libc/machine/i960/Makefile.am b/newlib/libc/machine/i960/Makefile.am new file mode 100644 index 0000000..ec5ca63 --- /dev/null +++ b/newlib/libc/machine/i960/Makefile.am @@ -0,0 +1,12 @@ +## Process this file with automake to generate Makefile.in + +AUTOMAKE_OPTIONS = cygnus + +INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS) + +noinst_LIBRARIES = lib.a + +lib_a_SOURCES = + +ACLOCAL_AMFLAGS = -I ../../.. +CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host diff --git a/newlib/libc/machine/i960/Makefile.in b/newlib/libc/machine/i960/Makefile.in new file mode 100644 index 0000000..3a3f406 --- /dev/null +++ b/newlib/libc/machine/i960/Makefile.in @@ -0,0 +1,294 @@ +# Makefile.in generated automatically by automake 1.3 from Makefile.am + +# Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + + +SHELL = @SHELL@ + +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ + +bindir = @bindir@ +sbindir = @sbindir@ +libexecdir = @libexecdir@ +datadir = @datadir@ +sysconfdir = @sysconfdir@ +sharedstatedir = @sharedstatedir@ +localstatedir = @localstatedir@ +libdir = @libdir@ +infodir = @infodir@ +mandir = @mandir@ +includedir = @includedir@ +oldincludedir = /usr/include + +DISTDIR = + +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ + +top_builddir = . + +ACLOCAL = @ACLOCAL@ +AUTOCONF = @AUTOCONF@ +AUTOMAKE = @AUTOMAKE@ +AUTOHEADER = @AUTOHEADER@ + +INSTALL = @INSTALL@ +INSTALL_PROGRAM = @INSTALL_PROGRAM@ +INSTALL_DATA = @INSTALL_DATA@ +INSTALL_SCRIPT = @INSTALL_SCRIPT@ +transform = @program_transform_name@ + +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +host_alias = @host_alias@ +host_triplet = @host@ +AR = @AR@ +AS = @AS@ +CC = @CC@ +CPP = @CPP@ +EXEEXT = @EXEEXT@ +MAINT = @MAINT@ +MAKEINFO = @MAKEINFO@ +NEWLIB_CFLAGS = @NEWLIB_CFLAGS@ +PACKAGE = @PACKAGE@ +RANLIB = @RANLIB@ +VERSION = @VERSION@ +machine_dir = @machine_dir@ +newlib_basedir = @newlib_basedir@ +sys_dir = @sys_dir@ + +AUTOMAKE_OPTIONS = cygnus + +INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS) + +noinst_LIBRARIES = lib.a + +lib_a_SOURCES = setjmp.S + +ACLOCAL_AMFLAGS = -I ../../.. +CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +mkinstalldirs = $(SHELL) $(top_srcdir)/../../../../mkinstalldirs +CONFIG_CLEAN_FILES = +LIBRARIES = $(noinst_LIBRARIES) + + +DEFS = @DEFS@ -I. -I$(srcdir) +CPPFLAGS = @CPPFLAGS@ +LDFLAGS = @LDFLAGS@ +LIBS = @LIBS@ +lib_a_LIBADD = +lib_a_OBJECTS = +DIST_COMMON = Makefile.am Makefile.in aclocal.m4 configure configure.in + + +DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) + +TAR = tar +GZIP = --best +SOURCES = $(lib_a_SOURCES) +OBJECTS = $(lib_a_OBJECTS) + +all: Makefile $(LIBRARIES) + +.SUFFIXES: +.SUFFIXES: .S .c .o .s +$(srcdir)/Makefile.in: @MAINT@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4) + cd $(top_srcdir) && $(AUTOMAKE) --cygnus Makefile + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status + +$(ACLOCAL_M4): @MAINT@ configure.in ../../../acinclude.m4 \ + ../../../aclocal.m4 + cd $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS) + +config.status: $(srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + $(SHELL) ./config.status --recheck +$(srcdir)/configure: @MAINT@$(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES) + cd $(srcdir) && $(AUTOCONF) + +mostlyclean-noinstLIBRARIES: + +clean-noinstLIBRARIES: + -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES) + +distclean-noinstLIBRARIES: + +maintainer-clean-noinstLIBRARIES: + +.c.o: + $(COMPILE) -c $< + +.s.o: + $(COMPILE) -c $< + +.S.o: + $(COMPILE) -c $< + +mostlyclean-compile: + -rm -f *.o core *.core + +clean-compile: + +distclean-compile: + -rm -f *.tab.c + +maintainer-clean-compile: + +lib.a: $(lib_a_OBJECTS) $(lib_a_DEPENDENCIES) + -rm -f lib.a + $(AR) cru lib.a $(lib_a_OBJECTS) $(lib_a_LIBADD) + $(RANLIB) lib.a + +tags: TAGS + +ID: $(HEADERS) $(SOURCES) $(LISP) + here=`pwd` && cd $(srcdir) \ + && mkid -f$$here/ID $(SOURCES) $(HEADERS) $(LISP) + +TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) $(LISP) + tags=; \ + here=`pwd`; \ + list='$(SOURCES) $(HEADERS)'; \ + unique=`for i in $$list; do echo $$i; done | \ + awk ' { files[$$0] = 1; } \ + END { for (i in files) print i; }'`; \ + test -z "$(ETAGS_ARGS)$$unique$(LISP)$$tags" \ + || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags $$unique $(LISP) -o $$here/TAGS) + +mostlyclean-tags: + +clean-tags: + +distclean-tags: + -rm -f TAGS ID + +maintainer-clean-tags: + +distdir = $(PACKAGE)-$(VERSION) +top_distdir = $(distdir) + +# This target untars the dist file and tries a VPATH configuration. Then +# it guarantees that the distribution is self-contained by making another +# tarfile. +distcheck: dist + -rm -rf $(distdir) + GZIP=$(GZIP) $(TAR) zxf $(distdir).tar.gz + mkdir $(distdir)/=build + mkdir $(distdir)/=inst + dc_install_base=`cd $(distdir)/=inst && pwd`; \ + cd $(distdir)/=build \ + && ../configure --srcdir=.. --prefix=$$dc_install_base \ + && $(MAKE) $(AM_MAKEFLAGS) \ + && $(MAKE) $(AM_MAKEFLAGS) dvi \ + && $(MAKE) $(AM_MAKEFLAGS) check \ + && $(MAKE) $(AM_MAKEFLAGS) install \ + && $(MAKE) $(AM_MAKEFLAGS) installcheck \ + && $(MAKE) $(AM_MAKEFLAGS) dist + -rm -rf $(distdir) + @echo "========================"; \ + echo "$(distdir).tar.gz is ready for distribution"; \ + echo "========================" +dist: distdir + -chmod -R a+r $(distdir) + GZIP=$(GZIP) $(TAR) chozf $(distdir).tar.gz $(distdir) + -rm -rf $(distdir) +dist-all: distdir + -chmod -R a+r $(distdir) + GZIP=$(GZIP) $(TAR) chozf $(distdir).tar.gz $(distdir) + -rm -rf $(distdir) +distdir: $(DISTFILES) + -rm -rf $(distdir) + mkdir $(distdir) + -chmod 777 $(distdir) + @for file in $(DISTFILES); do \ + if test -f $$file; then d=.; else d=$(srcdir); fi; \ + test -f $(distdir)/$$file \ + || ln $$d/$$file $(distdir)/$$file 2> /dev/null \ + || cp -p $$d/$$file $(distdir)/$$file; \ + done +info: +dvi: +check: + $(MAKE) $(AM_MAKEFLAGS) +installcheck: +install-info: +install-exec: + @$(NORMAL_INSTALL) + +install-data: + @$(NORMAL_INSTALL) + +install: install-exec install-data all + @: + +uninstall: + +install-strip: + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM='$(INSTALL_PROGRAM) -s' INSTALL_SCRIPT='$(INSTALL_PROGRAM)' install +installdirs: + + +mostlyclean-generic: + -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES) + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -rm -f Makefile $(DISTCLEANFILES) + -rm -f config.cache config.log stamp-h stamp-h[0-9]* + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + +maintainer-clean-generic: + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) + -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) +mostlyclean: mostlyclean-noinstLIBRARIES mostlyclean-compile \ + mostlyclean-tags mostlyclean-generic + +clean: clean-noinstLIBRARIES clean-compile clean-tags clean-generic \ + mostlyclean + +distclean: distclean-noinstLIBRARIES distclean-compile distclean-tags \ + distclean-generic clean + -rm -f config.status + +maintainer-clean: maintainer-clean-noinstLIBRARIES \ + maintainer-clean-compile maintainer-clean-tags \ + maintainer-clean-generic distclean + @echo "This command is intended for maintainers to use;" + @echo "it deletes files that may require special tools to rebuild." + -rm -f config.status + +.PHONY: mostlyclean-noinstLIBRARIES distclean-noinstLIBRARIES \ +clean-noinstLIBRARIES maintainer-clean-noinstLIBRARIES \ +mostlyclean-compile distclean-compile clean-compile \ +maintainer-clean-compile tags mostlyclean-tags distclean-tags \ +clean-tags maintainer-clean-tags distdir info dvi installcheck \ +install-info install-exec install-data install uninstall all \ +installdirs mostlyclean-generic distclean-generic clean-generic \ +maintainer-clean-generic clean mostlyclean distclean maintainer-clean + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/newlib/libc/machine/i960/aclocal.m4 b/newlib/libc/machine/i960/aclocal.m4 new file mode 100644 index 0000000..70d4810 --- /dev/null +++ b/newlib/libc/machine/i960/aclocal.m4 @@ -0,0 +1,282 @@ +dnl aclocal.m4 generated automatically by aclocal 1.4 + +dnl Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc. +dnl This file is free software; the Free Software Foundation +dnl gives unlimited permission to copy and/or distribute it, +dnl with or without modifications, as long as this notice is preserved. + +dnl This program is distributed in the hope that it will be useful, +dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without +dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A +dnl PARTICULAR PURPOSE. + +dnl This provides configure definitions used by all the newlib +dnl configure.in files. + +dnl Basic newlib configury. This calls basic introductory stuff, +dnl including AM_INIT_AUTOMAKE and AC_CANONICAL_HOST. It also runs +dnl configure.host. The only argument is the relative path to the top +dnl newlib directory. + +AC_DEFUN(NEWLIB_CONFIGURE, +[ +dnl Default to --enable-multilib +AC_ARG_ENABLE(multilib, +[ --enable-multilib build many library versions (default)], +[case "${enableval}" in + yes) multilib=yes ;; + no) multilib=no ;; + *) AC_MSG_ERROR(bad value ${enableval} for multilib option) ;; + esac], [multilib=yes])dnl + +dnl Support --enable-target-optspace +AC_ARG_ENABLE(target-optspace, +[ --enable-target-optspace optimize for space], +[case "${enableval}" in + yes) target_optspace=yes ;; + no) target_optspace=no ;; + *) AC_MSG_ERROR(bad value ${enableval} for target-optspace option) ;; + esac], [target_optspace=])dnl + +dnl Support --enable-newlib-mb +AC_ARG_ENABLE(newlib-mb, +[ --enable-newlib-mb enable multibyte support], +[case "${enableval}" in + yes) newlib_mb=yes ;; + no) newlib_mb=no ;; + *) AC_MSG_ERROR(bad value ${enableval} for newlib-mb option) ;; + esac], [newlib_mb=no])dnl + +dnl We may get other options which we don't document: +dnl --with-target-subdir, --with-multisrctop, --with-multisubdir + +test -z "[$]{with_target_subdir}" && with_target_subdir=. + +if test "[$]{srcdir}" = "."; then + if test "[$]{with_target_subdir}" != "."; then + newlib_basedir="[$]{srcdir}/[$]{with_multisrctop}../$1" + else + newlib_basedir="[$]{srcdir}/[$]{with_multisrctop}$1" + fi +else + newlib_basedir="[$]{srcdir}/$1" +fi +AC_SUBST(newlib_basedir) + +AC_CANONICAL_HOST + +AM_INIT_AUTOMAKE(newlib, 1.8.1) + +# FIXME: We temporarily define our own version of AC_PROG_CC. This is +# copied from autoconf 2.12, but does not call AC_PROG_CC_WORKS. We +# are probably using a cross compiler, which will not be able to fully +# link an executable. This should really be fixed in autoconf +# itself. + +AC_DEFUN(LIB_AC_PROG_CC, +[AC_BEFORE([$0], [AC_PROG_CPP])dnl +AC_CHECK_PROG(CC, gcc, gcc) +if test -z "$CC"; then + AC_CHECK_PROG(CC, cc, cc, , , /usr/ucb/cc) + test -z "$CC" && AC_MSG_ERROR([no acceptable cc found in \$PATH]) +fi + +AC_PROG_CC_GNU + +if test $ac_cv_prog_gcc = yes; then + GCC=yes +dnl Check whether -g works, even if CFLAGS is set, in case the package +dnl plays around with CFLAGS (such as to build both debugging and +dnl normal versions of a library), tasteless as that idea is. + ac_test_CFLAGS="${CFLAGS+set}" + ac_save_CFLAGS="$CFLAGS" + CFLAGS= + AC_PROG_CC_G + if test "$ac_test_CFLAGS" = set; then + CFLAGS="$ac_save_CFLAGS" + elif test $ac_cv_prog_cc_g = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-O2" + fi +else + GCC= + test "${CFLAGS+set}" = set || CFLAGS="-g" +fi +]) + +LIB_AC_PROG_CC + +# AC_CHECK_TOOL does AC_REQUIRE (AC_CANONICAL_BUILD). If we don't +# run it explicitly here, it will be run implicitly before +# NEWLIB_CONFIGURE, which doesn't work because that means that it will +# be run before AC_CANONICAL_HOST. +AC_CANONICAL_BUILD + +AC_CHECK_TOOL(AS, as) +AC_CHECK_TOOL(AR, ar) +AC_CHECK_TOOL(RANLIB, ranlib, :) + +AC_PROG_INSTALL + +AM_MAINTAINER_MODE + +# We need AC_EXEEXT to keep automake happy in cygnus mode. However, +# at least currently, we never actually build a program, so we never +# need to use $(EXEEXT). Moreover, the test for EXEEXT normally +# fails, because we are probably configuring with a cross compiler +# which can't create executables. So we include AC_EXEEXT to keep +# automake happy, but we don't execute it, since we don't care about +# the result. +if false; then + AC_EXEEXT +fi + +. [$]{newlib_basedir}/configure.host + +case [$]{newlib_basedir} in +/* | [A-Za-z]:[/\\]*) newlib_flagbasedir=[$]{newlib_basedir} ;; +*) newlib_flagbasedir='[$](top_builddir)/'[$]{newlib_basedir} ;; +esac + +newlib_cflags="[$]{newlib_cflags} -I"'[$](top_builddir)'"/$1/targ-include -I[$]{newlib_flagbasedir}/libc/include" +case "${host}" in + *-*-cygwin*) + newlib_cflags="[$]{newlib_cflags} -I[$]{newlib_flagbasedir}/../winsup/cygwin/include -I[$]{newlib_flagbasedir}/../winsup/w32api/include" + ;; +esac + +newlib_cflags="[$]{newlib_cflags} -fno-builtin" + +NEWLIB_CFLAGS=${newlib_cflags} +AC_SUBST(NEWLIB_CFLAGS) + +AC_SUBST(machine_dir) +AC_SUBST(sys_dir) +]) + +# Do all the work for Automake. This macro actually does too much -- +# some checks are only needed if your package does certain things. +# But this isn't really a big deal. + +# serial 1 + +dnl Usage: +dnl AM_INIT_AUTOMAKE(package,version, [no-define]) + +AC_DEFUN(AM_INIT_AUTOMAKE, +[AC_REQUIRE([AC_PROG_INSTALL]) +PACKAGE=[$1] +AC_SUBST(PACKAGE) +VERSION=[$2] +AC_SUBST(VERSION) +dnl test to see if srcdir already configured +if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then + AC_MSG_ERROR([source directory already configured; run "make distclean" there first]) +fi +ifelse([$3],, +AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package]) +AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package])) +AC_REQUIRE([AM_SANITY_CHECK]) +AC_REQUIRE([AC_ARG_PROGRAM]) +dnl FIXME This is truly gross. +missing_dir=`cd $ac_aux_dir && pwd` +AM_MISSING_PROG(ACLOCAL, aclocal, $missing_dir) +AM_MISSING_PROG(AUTOCONF, autoconf, $missing_dir) +AM_MISSING_PROG(AUTOMAKE, automake, $missing_dir) +AM_MISSING_PROG(AUTOHEADER, autoheader, $missing_dir) +AM_MISSING_PROG(MAKEINFO, makeinfo, $missing_dir) +AC_REQUIRE([AC_PROG_MAKE_SET])]) + +# +# Check to make sure that the build environment is sane. +# + +AC_DEFUN(AM_SANITY_CHECK, +[AC_MSG_CHECKING([whether build environment is sane]) +# Just in case +sleep 1 +echo timestamp > conftestfile +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null` + if test "[$]*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftestfile` + fi + if test "[$]*" != "X $srcdir/configure conftestfile" \ + && test "[$]*" != "X conftestfile $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken +alias in your environment]) + fi + + test "[$]2" = conftestfile + ) +then + # Ok. + : +else + AC_MSG_ERROR([newly created file is older than distributed files! +Check your system clock]) +fi +rm -f conftest* +AC_MSG_RESULT(yes)]) + +dnl AM_MISSING_PROG(NAME, PROGRAM, DIRECTORY) +dnl The program must properly implement --version. +AC_DEFUN(AM_MISSING_PROG, +[AC_MSG_CHECKING(for working $2) +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if ($2 --version) < /dev/null > /dev/null 2>&1; then + $1=$2 + AC_MSG_RESULT(found) +else + $1="$3/missing $2" + AC_MSG_RESULT(missing) +fi +AC_SUBST($1)]) + +# Add --enable-maintainer-mode option to configure. +# From Jim Meyering + +# serial 1 + +AC_DEFUN(AM_MAINTAINER_MODE, +[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) + dnl maintainer-mode is disabled by default + AC_ARG_ENABLE(maintainer-mode, +[ --enable-maintainer-mode enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer], + USE_MAINTAINER_MODE=$enableval, + USE_MAINTAINER_MODE=no) + AC_MSG_RESULT($USE_MAINTAINER_MODE) + AM_CONDITIONAL(MAINTAINER_MODE, test $USE_MAINTAINER_MODE = yes) + MAINT=$MAINTAINER_MODE_TRUE + AC_SUBST(MAINT)dnl +] +) + +# Define a conditional. + +AC_DEFUN(AM_CONDITIONAL, +[AC_SUBST($1_TRUE) +AC_SUBST($1_FALSE) +if $2; then + $1_TRUE= + $1_FALSE='#' +else + $1_TRUE='#' + $1_FALSE= +fi]) + diff --git a/newlib/libc/machine/i960/configure b/newlib/libc/machine/i960/configure new file mode 100755 index 0000000..159a806 --- /dev/null +++ b/newlib/libc/machine/i960/configure @@ -0,0 +1,1687 @@ +#! /bin/sh + +# Guess values for system-dependent variables and create Makefiles. +# Generated automatically using autoconf version 2.13 +# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. +# +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. + +# Defaults: +ac_help= +ac_default_prefix=/usr/local +# Any additions from configure.in: +ac_help="$ac_help + --enable-multilib build many library versions (default)" +ac_help="$ac_help + --enable-target-optspace optimize for space" +ac_help="$ac_help + --enable-newlib-mb enable multibyte support" +ac_help="$ac_help + --enable-maintainer-mode enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer" + +# Initialize some variables set by options. +# The variables have the same names as the options, with +# dashes changed to underlines. +build=NONE +cache_file=./config.cache +exec_prefix=NONE +host=NONE +no_create= +nonopt=NONE +no_recursion= +prefix=NONE +program_prefix=NONE +program_suffix=NONE +program_transform_name=s,x,x, +silent= +site= +sitefile= +srcdir= +target=NONE +verbose= +x_includes=NONE +x_libraries=NONE +bindir='${exec_prefix}/bin' +sbindir='${exec_prefix}/sbin' +libexecdir='${exec_prefix}/libexec' +datadir='${prefix}/share' +sysconfdir='${prefix}/etc' +sharedstatedir='${prefix}/com' +localstatedir='${prefix}/var' +libdir='${exec_prefix}/lib' +includedir='${prefix}/include' +oldincludedir='/usr/include' +infodir='${prefix}/info' +mandir='${prefix}/man' + +# Initialize some other variables. +subdirs= +MFLAGS= MAKEFLAGS= +SHELL=${CONFIG_SHELL-/bin/sh} +# Maximum number of lines to put in a shell here document. +ac_max_here_lines=12 + +ac_prev= +for ac_option +do + + # If the previous option needs an argument, assign it. + if test -n "$ac_prev"; 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"$ac_site_file" + fi +done + +if test -r "$cache_file"; then + echo "loading cache $cache_file" + . $cache_file +else + echo "creating cache $cache_file" + > $cache_file +fi + +ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + +ac_exeext= +ac_objext=o +if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then + # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu. + if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then + ac_n= ac_c=' +' ac_t=' ' + else + ac_n=-n ac_c= ac_t= + fi +else + ac_n= ac_c='\c' ac_t= +fi + + + +ac_aux_dir= +for ac_dir in ../../../.. $srcdir/../../../..; do + if test -f $ac_dir/install-sh; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f $ac_dir/install.sh; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { echo "configure: error: can not find install-sh or install.sh in ../../../.. $srcdir/../../../.." 1>&2; exit 1; } +fi +ac_config_guess=$ac_aux_dir/config.guess +ac_config_sub=$ac_aux_dir/config.sub +ac_configure=$ac_aux_dir/configure # This should be Cygnus configure. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 +echo "configure:578: checking for a BSD compatible install" >&5 +if test -z "$INSTALL"; then +if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + else + ac_cv_path_install="$ac_dir/$ac_prog -c" + break 2 + fi + fi + done + ;; + esac + done + IFS="$ac_save_IFS" + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL="$ac_cv_path_install" + else + # As a last resort, use the slow shell script. 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Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null` + if test "$*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftestfile` + fi + if test "$*" != "X $srcdir/configure conftestfile" \ + && test "$*" != "X conftestfile $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + { echo "configure: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" 1>&2; exit 1; } + fi + + test "$2" = conftestfile + ) +then + # Ok. + : +else + { echo "configure: error: newly created file is older than distributed files! +Check your system clock" 1>&2; exit 1; } +fi +rm -f conftest* +echo "$ac_t""yes" 1>&6 +if test "$program_transform_name" = s,x,x,; then + program_transform_name= +else + # Double any \ or $. echo might interpret backslashes. + cat <<\EOF_SED > conftestsed +s,\\,\\\\,g; s,\$,$$,g +EOF_SED + program_transform_name="`echo $program_transform_name|sed -f conftestsed`" + rm -f conftestsed +fi +test "$program_prefix" != NONE && + program_transform_name="s,^,${program_prefix},; $program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s,\$\$,${program_suffix},; $program_transform_name" + +# sed with no file args requires a program. +test "$program_transform_name" = "" && program_transform_name="s,x,x," + +echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 +echo "configure:688: checking whether ${MAKE-make} sets \${MAKE}" >&5 +set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftestmake <<\EOF +all: + @echo 'ac_maketemp="${MAKE}"' +EOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=` +if test -n "$ac_maketemp"; then + eval ac_cv_prog_make_${ac_make}_set=yes +else + eval ac_cv_prog_make_${ac_make}_set=no +fi +rm -f conftestmake +fi +if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then + echo "$ac_t""yes" 1>&6 + SET_MAKE= +else + echo "$ac_t""no" 1>&6 + SET_MAKE="MAKE=${MAKE-make}" +fi + +if test $host != $build; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 +echo "configure:721: checking for Cygwin environment" >&5 +if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <<EOF +#line 726 "configure" +#include "confdefs.h" + +int main() { + +#ifndef __CYGWIN__ +#define __CYGWIN__ __CYGWIN32__ +#endif +return __CYGWIN__; +; return 0; } +EOF +if { (eval echo configure:737: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + ac_cv_cygwin=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_cv_cygwin=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$ac_cv_cygwin" 1>&6 +CYGWIN= +test "$ac_cv_cygwin" = yes && CYGWIN=yes +echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 +echo "configure:754: checking for mingw32 environment" >&5 +if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <<EOF +#line 759 "configure" +#include "confdefs.h" + +int main() { +return __MINGW32__; +; return 0; } +EOF +if { (eval echo configure:766: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + ac_cv_mingw32=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_cv_mingw32=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$ac_cv_mingw32" 1>&6 +MINGW32= +test "$ac_cv_mingw32" = yes && MINGW32=yes + +# Check whether --enable-multilib or --disable-multilib was given. +if test "${enable_multilib+set}" = set; then + enableval="$enable_multilib" + case "${enableval}" in + yes) multilib=yes ;; + no) multilib=no ;; + *) { echo "configure: error: bad value ${enableval} for multilib option" 1>&2; exit 1; } ;; + esac +else + multilib=yes +fi + +# Check whether --enable-target-optspace or --disable-target-optspace was given. +if test "${enable_target_optspace+set}" = set; then + enableval="$enable_target_optspace" + case "${enableval}" in + yes) target_optspace=yes ;; + no) target_optspace=no ;; + *) { echo "configure: error: bad value ${enableval} for target-optspace option" 1>&2; exit 1; } ;; + esac +else + target_optspace= +fi + +# Check whether --enable-newlib-mb or --disable-newlib-mb was given. +if test "${enable_newlib_mb+set}" = set; then + enableval="$enable_newlib_mb" + case "${enableval}" in + yes) newlib_mb=yes ;; + no) newlib_mb=no ;; + *) { echo "configure: error: bad value ${enableval} for newlib-mb option" 1>&2; exit 1; } ;; + esac +else + newlib_mb=no +fi + + +test -z "${with_target_subdir}" && with_target_subdir=. + +if test "${srcdir}" = "."; then + if test "${with_target_subdir}" != "."; then + newlib_basedir="${srcdir}/${with_multisrctop}../../../.." + else + newlib_basedir="${srcdir}/${with_multisrctop}../../.." + fi +else + newlib_basedir="${srcdir}/../../.." +fi + + + +# Make sure we can run config.sub. +if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then : +else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } +fi + +echo $ac_n "checking host system type""... $ac_c" 1>&6 +echo "configure:840: checking host system type" >&5 + +host_alias=$host +case "$host_alias" in +NONE) + case $nonopt in + NONE) + if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then : + else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; } + fi ;; + *) host_alias=$nonopt ;; + esac ;; +esac + +host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias` +host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` +host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` +host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` +echo "$ac_t""$host" 1>&6 + + + +PACKAGE=newlib + +VERSION=1.8.1 + +if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then + { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; } +fi +cat >> confdefs.h <<EOF +#define PACKAGE "$PACKAGE" +EOF + +cat >> confdefs.h <<EOF +#define VERSION "$VERSION" +EOF + + + +missing_dir=`cd $ac_aux_dir && pwd` +echo $ac_n "checking for working aclocal""... $ac_c" 1>&6 +echo "configure:881: checking for working aclocal" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (aclocal --version) < /dev/null > /dev/null 2>&1; then + ACLOCAL=aclocal + echo "$ac_t""found" 1>&6 +else + ACLOCAL="$missing_dir/missing aclocal" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working autoconf""... $ac_c" 1>&6 +echo "configure:894: checking for working autoconf" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (autoconf --version) < /dev/null > /dev/null 2>&1; then + AUTOCONF=autoconf + echo "$ac_t""found" 1>&6 +else + AUTOCONF="$missing_dir/missing autoconf" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working automake""... $ac_c" 1>&6 +echo "configure:907: checking for working automake" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (automake --version) < /dev/null > /dev/null 2>&1; then + AUTOMAKE=automake + echo "$ac_t""found" 1>&6 +else + AUTOMAKE="$missing_dir/missing automake" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working autoheader""... $ac_c" 1>&6 +echo "configure:920: checking for working autoheader" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (autoheader --version) < /dev/null > /dev/null 2>&1; then + AUTOHEADER=autoheader + echo "$ac_t""found" 1>&6 +else + AUTOHEADER="$missing_dir/missing autoheader" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6 +echo "configure:933: checking for working makeinfo" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (makeinfo --version) < /dev/null > /dev/null 2>&1; then + MAKEINFO=makeinfo + echo "$ac_t""found" 1>&6 +else + MAKEINFO="$missing_dir/missing makeinfo" + echo "$ac_t""missing" 1>&6 +fi + + + +# FIXME: We temporarily define our own version of AC_PROG_CC. This is +# copied from autoconf 2.12, but does not call AC_PROG_CC_WORKS. We +# are probably using a cross compiler, which will not be able to fully +# link an executable. This should really be fixed in autoconf +# itself. + + + +# Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:958: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_CC="gcc" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:988: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_prog_rejected=no + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + break + fi + done + IFS="$ac_save_ifs" +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# -gt 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + set dummy "$ac_dir/$ac_word" "$@" + shift + ac_cv_prog_CC="$@" + fi +fi +fi +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; } +fi + +echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 +echo "configure:1037: checking whether we are using GNU C" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.c <<EOF +#ifdef __GNUC__ + yes; +#endif +EOF +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1046: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then + ac_cv_prog_gcc=yes +else + ac_cv_prog_gcc=no +fi +fi + +echo "$ac_t""$ac_cv_prog_gcc" 1>&6 + +if test $ac_cv_prog_gcc = yes; then + GCC=yes + ac_test_CFLAGS="${CFLAGS+set}" + ac_save_CFLAGS="$CFLAGS" + CFLAGS= + echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 +echo "configure:1061: checking whether ${CC-cc} accepts -g" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + echo 'void f(){}' > conftest.c +if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then + ac_cv_prog_cc_g=yes +else + ac_cv_prog_cc_g=no +fi +rm -f conftest* + +fi + +echo "$ac_t""$ac_cv_prog_cc_g" 1>&6 + if test "$ac_test_CFLAGS" = set; then + CFLAGS="$ac_save_CFLAGS" + elif test $ac_cv_prog_cc_g = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-O2" + fi +else + GCC= + test "${CFLAGS+set}" = set || CFLAGS="-g" +fi + + +# AC_CHECK_TOOL does AC_REQUIRE (AC_CANONICAL_BUILD). If we don't +# run it explicitly here, it will be run implicitly before +# NEWLIB_CONFIGURE, which doesn't work because that means that it will +# be run before AC_CANONICAL_HOST. +echo $ac_n "checking build system type""... $ac_c" 1>&6 +echo "configure:1094: checking build system type" >&5 + +build_alias=$build +case "$build_alias" in +NONE) + case $nonopt in + NONE) build_alias=$host_alias ;; + *) build_alias=$nonopt ;; + esac ;; +esac + +build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias` +build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` +build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` +build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` +echo "$ac_t""$build" 1>&6 + + +# Extract the first word of "${ac_tool_prefix}as", so it can be a program name with args. +set dummy ${ac_tool_prefix}as; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1115: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AS"; then + ac_cv_prog_AS="$AS" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AS="${ac_tool_prefix}as" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_AS" && ac_cv_prog_AS="as" +fi +fi +AS="$ac_cv_prog_AS" +if test -n "$AS"; then + echo "$ac_t""$AS" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + + +# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. +set dummy ${ac_tool_prefix}ar; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1147: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AR"; then + ac_cv_prog_AR="$AR" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AR="${ac_tool_prefix}ar" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_AR" && ac_cv_prog_AR="ar" +fi +fi +AR="$ac_cv_prog_AR" +if test -n "$AR"; then + echo "$ac_t""$AR" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + + +# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1179: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_RANLIB"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1211: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="ranlib" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + RANLIB=":" +fi +fi + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 +echo "configure:1256: checking for a BSD compatible install" >&5 +if test -z "$INSTALL"; then +if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + else + ac_cv_path_install="$ac_dir/$ac_prog -c" + break 2 + fi + fi + done + ;; + esac + done + IFS="$ac_save_IFS" + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL="$ac_cv_path_install" + else + # As a last resort, use the slow shell script. We don't cache a + # path for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the path is relative. + INSTALL="$ac_install_sh" + fi +fi +echo "$ac_t""$INSTALL" 1>&6 + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + + +echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 +echo "configure:1310: checking whether to enable maintainer-specific portions of Makefiles" >&5 + # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. +if test "${enable_maintainer_mode+set}" = set; then + enableval="$enable_maintainer_mode" + USE_MAINTAINER_MODE=$enableval +else + USE_MAINTAINER_MODE=no +fi + + echo "$ac_t""$USE_MAINTAINER_MODE" 1>&6 + + +if test $USE_MAINTAINER_MODE = yes; then + MAINTAINER_MODE_TRUE= + MAINTAINER_MODE_FALSE='#' +else + MAINTAINER_MODE_TRUE='#' + MAINTAINER_MODE_FALSE= +fi + MAINT=$MAINTAINER_MODE_TRUE + + + +# We need AC_EXEEXT to keep automake happy in cygnus mode. However, +# at least currently, we never actually build a program, so we never +# need to use $(EXEEXT). Moreover, the test for EXEEXT normally +# fails, because we are probably configuring with a cross compiler +# which can't create executables. So we include AC_EXEEXT to keep +# automake happy, but we don't execute it, since we don't care about +# the result. +if false; then + + +echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 +echo "configure:1344: checking for executable suffix" >&5 +if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test "$CYGWIN" = yes || test "$MINGW32" = yes; then + ac_cv_exeext=.exe +else + rm -f conftest* + echo 'int main () { return 0; }' > conftest.$ac_ext + ac_cv_exeext= + if { (eval echo configure:1354: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + for file in conftest.*; do + case $file in + *.c | *.o | *.obj | *.ilk | *.pdb) ;; + *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; + esac + done + else + { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; } + fi + rm -f conftest* + test x"${ac_cv_exeext}" = x && ac_cv_exeext=no +fi +fi + +EXEEXT="" +test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext} +echo "$ac_t""${ac_cv_exeext}" 1>&6 +ac_exeext=$EXEEXT + +fi + +. ${newlib_basedir}/configure.host + +case ${newlib_basedir} in +/* | A-Za-z:/\\*) newlib_flagbasedir=${newlib_basedir} ;; +*) newlib_flagbasedir='$(top_builddir)/'${newlib_basedir} ;; +esac + +newlib_cflags="${newlib_cflags} -I"'$(top_builddir)'"/../../../targ-include -I${newlib_flagbasedir}/libc/include" +case "${host}" in + *-*-cygwin*) + newlib_cflags="${newlib_cflags} -I${newlib_flagbasedir}/../winsup/cygwin/include -I${newlib_flagbasedir}/../winsup/w32api/include" + ;; +esac + +newlib_cflags="${newlib_cflags} -fno-builtin" + +NEWLIB_CFLAGS=${newlib_cflags} + + + + + + +trap '' 1 2 15 +cat > confcache <<\EOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs. It is not useful on other systems. +# If it contains results you don't want to keep, you may remove or edit it. +# +# By default, configure uses ./config.cache as the cache file, +# creating it if it does not exist already. You can give configure +# the --cache-file=FILE option to use a different cache file; that is +# what configure does when it calls configure scripts in +# subdirectories, so they share the cache. +# Giving --cache-file=/dev/null disables caching, for debugging configure. +# config.status only pays attention to the cache file if you give it the +# --recheck option to rerun configure. +# +EOF +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, don't put newlines in cache variables' values. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +(set) 2>&1 | + case `(ac_space=' '; set | grep ac_space) 2>&1` in + *ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote substitution + # turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + -e "s/'/'\\\\''/g" \ + -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p" + ;; + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p' + ;; + esac >> confcache +if cmp -s $cache_file confcache; then + : +else + if test -w $cache_file; then + echo "updating cache $cache_file" + cat confcache > $cache_file + else + echo "not updating unwritable cache $cache_file" + fi +fi +rm -f confcache + +trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15 + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +# Any assignment to VPATH causes Sun make to only execute +# the first set of double-colon rules, so remove it if not needed. +# If there is a colon in the path, we need to keep it. +if test "x$srcdir" = x.; then + ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d' +fi + +trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15 + +# Transform confdefs.h into DEFS. +# Protect against shell expansion while executing Makefile rules. +# Protect against Makefile macro expansion. +cat > conftest.defs <<\EOF +s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g +s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g +s%\[%\\&%g +s%\]%\\&%g +s%\$%$$%g +EOF +DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '` +rm -f conftest.defs + + +# Without the "./", some shells look in PATH for config.status. +: ${CONFIG_STATUS=./config.status} + +echo creating $CONFIG_STATUS +rm -f $CONFIG_STATUS +cat > $CONFIG_STATUS <<EOF +#! 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-s conftest.s$ac_file; then + ac_more_lines=false + rm -f conftest.s$ac_file + else + if test -z "$ac_sed_cmds"; then + ac_sed_cmds="sed -f conftest.s$ac_file" + else + ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file" + fi + ac_file=`expr $ac_file + 1` + ac_beg=$ac_end + ac_end=`expr $ac_end + $ac_max_sed_cmds` + fi +done +if test -z "$ac_sed_cmds"; then + ac_sed_cmds=cat +fi +EOF + +cat >> $CONFIG_STATUS <<EOF + +CONFIG_FILES=\${CONFIG_FILES-"Makefile"} +EOF +cat >> $CONFIG_STATUS <<\EOF +for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then + # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in". + case "$ac_file" in + *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'` + ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;; + *) ac_file_in="${ac_file}.in" ;; + esac + + # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories. + + # Remove last slash and all that follows it. Not all systems have dirname. + ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` + if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then + # The file is in a subdirectory. + test ! -d "$ac_dir" && mkdir "$ac_dir" + ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`" + # A "../" for each directory in $ac_dir_suffix. + ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'` + else + ac_dir_suffix= ac_dots= + fi + + case "$ac_given_srcdir" in + .) srcdir=. + if test -z "$ac_dots"; then top_srcdir=. + else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;; + /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;; + *) # Relative path. + srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix" + top_srcdir="$ac_dots$ac_given_srcdir" ;; + esac + + case "$ac_given_INSTALL" in + [/$]*) INSTALL="$ac_given_INSTALL" ;; + *) INSTALL="$ac_dots$ac_given_INSTALL" ;; + esac + + echo creating "$ac_file" + rm -f "$ac_file" + configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure." + case "$ac_file" in + *Makefile*) ac_comsub="1i\\ +# $configure_input" ;; + *) ac_comsub= ;; + esac + + ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"` + sed -e "$ac_comsub +s%@configure_input@%$configure_input%g +s%@srcdir@%$srcdir%g +s%@top_srcdir@%$top_srcdir%g +s%@INSTALL@%$INSTALL%g +" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file +fi; done +rm -f conftest.s* + +EOF +cat >> $CONFIG_STATUS <<EOF + +EOF +cat >> $CONFIG_STATUS <<\EOF + +exit 0 +EOF +chmod +x $CONFIG_STATUS +rm -fr confdefs* $ac_clean_files +test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1 + diff --git a/newlib/libc/machine/i960/configure.in b/newlib/libc/machine/i960/configure.in new file mode 100644 index 0000000..365fe20 --- /dev/null +++ b/newlib/libc/machine/i960/configure.in @@ -0,0 +1,12 @@ +dnl This is the newlib/libc/machine/i960 configure.in file. +dnl Process this file with autoconf to produce a configure script. + +AC_PREREQ(2.5) +AC_INIT(memccpy_ca.S) + +dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake. +AC_CONFIG_AUX_DIR(../../../..) + +NEWLIB_CONFIGURE(../../..) + +AC_OUTPUT(Makefile) diff --git a/newlib/libc/machine/i960/memccpy.S b/newlib/libc/machine/i960/memccpy.S new file mode 100644 index 0000000..df19472 --- /dev/null +++ b/newlib/libc/machine/i960/memccpy.S @@ -0,0 +1,143 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memccpy.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ +/* + procedure memccpy (optimized assembler version for the 80960K series) + + dest_addr = memccpy (dest_addr, src_addr, char, len) + + copy len bytes pointed to by src_addr to the space pointed to by + dest_addr, stopping if char is copied. If char is copied, + return address of byte after char in dest string; else null. + + + Undefined behavior will occur if the end of the source array is in + the last two words of the program's allocated memory space. This + is so because the routine fetches ahead. Disallowing the fetch + ahead would impose a severe performance penalty. + + Undefined behavior will also occur if the source and destination + strings overlap. + + Strategy: + + Fetch the source array by words and store them by words to the + destination array, until there are fewer than three bytes left + to copy. Then, using the last word of the source (the one that + contains the remaining 0, 1, 2, or 3 bytes to be copied), store + a byte at a time until Ldone. + + Tactics: + + 1) Do NOT try to fetch and store the words in a word aligned manner + because, in my judgement, the performance degradation experienced due + to non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. This is supported by the intuition that most source and + destination arrays (even more true of most big source arrays) will + be word aligned to begin with. + + 2) Rather than decrementing len to zero, + I calculate the address of the byte after the last byte of the + destination array, and quit when the destination byte pointer passes + that. + +*/ + + .globl _memccpy + .leafproc _memccpy, __memccpy + .align 2 +_memccpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memccpy: + mov g14, g13 # preserve return address + cmpibge 0,g3,Lexit_char_not_found + + addo g3,g1,g3 # compute beyond end of src + ld (g1), g7 # fetch first word of source + lda 0xff,g5 # mask for char + and g5,g2,g2 # extract only char + shlo 8,g2,g6 + or g2,g6,g6 + shlo 16,g6,g4 + or g6,g4,g6 # word of char + b Lwloop_b + +Lwloop_a: + ld (g1), g7 # fetch ahead next word of source + st g4, (g0) # store word to dest + addo 4, g0, g0 # post-increment dest pointer +Lwloop_b: # word copying loop + addo 4, g1, g1 # pre-increment src pointer + cmpo g3, g1 # is len <= 3 ? + mov g7, g4 # keep a copy of the current word + bl Lcloop_setup # quit word loop if less than 4 bytes + scanbyte g6, g7 # check for char + bno Lwloop_a # continue word loop if char not found. + +Lcloop_setup: + subo 4, g1, g1 # back down src pointer + cmpobe g1, g3, Lexit_char_not_found + +Lcloop_a: # character copying loop (len < 3) + and g5,g4,g7 # check the byte against char + cmpo g7,g2 + stob g7,(g0) # store the byte + addo 1, g0, g0 + be Lexit_char_found + addo 1,g1,g1 + cmpo g1,g3 + shro 8,g4,g4 # position next byte + bne Lcloop_a + +Lexit_char_not_found: + mov 0, g0 +Lexit_char_found: + lda 0,g14 + bx (g13) # g0 = dest array address; g14 = 0 +Lrett: + ret + + +/* end of memccpy */ diff --git a/newlib/libc/machine/i960/memccpy_ca.S b/newlib/libc/machine/i960/memccpy_ca.S new file mode 100644 index 0000000..60c197b --- /dev/null +++ b/newlib/libc/machine/i960/memccpy_ca.S @@ -0,0 +1,245 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "mccpy_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ + +/* + procedure memccpy (optimized assembler version for the 80960CA) + + dest_addr = memccpy (dest_addr, src_addr, char, len) + + copy len bytes pointed to by src_addr to the space pointed to by + dest_addr, stopping if char is copied. If char is copied, + return address of byte after char in dest string; else null. + + Undefined behavior will occur if the end of the source array is in + the last two words of the program's allocated memory space. This + is so because the routine fetches ahead. Disallowing the fetch + ahead would impose a severe performance penalty. + + Undefined behavior will also occur if the source and destination + strings overlap. + + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source is word aligned, destination is not + 4) destination is word aligned, source is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g6 +#define LSW g7 +#else +#define LSW g6 +#define MSW g7 +#endif + + .globl _memccpy + .leafproc _memccpy, __memccpy + .align 2 +_memccpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memccpy: + notand g1,3,g5 # extract word addr of start of src + lda (g14),g13 # preserve return address + cmpibge.f 0,g3,Lexit_char_not_found # Lexit if # of bytes to move is <= 0 + cmpo g5,g1 # check alignment of src + ld (g5),LSW # fetch word containing at least first byte + notand g0,3,g4 # extract word addr of start of dest + lda 4(g5),g5 # advance src word addr + shlo 24,g2,g2 # reduce char to single byte + bne.f Lcase_245 # branch if src is NOT word aligned + +Lcase_13: + cmpobe.t g0,g4,Lcase_1_setup # branch if dest word aligned + +Lcase_3: # src is word aligned; dest is not + mov LSW,MSW # make copy of first word of src + addo 4,g4,g1 # move dest word ptr to first word boundary + lda 32,g14 # initialize shift count to zero + +Lcase_25: +Lcase_3_cloop_at_start: # character copying loop for start of dest str + cmpdeci 0,g3,g3 # is max_bytes exhausted? +#if __i960_BIG_ENDIAN__ + lda -8(g14),g14 # augment the shift counter +#else + lda 8(g14),g14 # augment the shift counter +#endif + be.f Lexit_char_not_found # Lexit if max_bytes is exhausted +#if __i960_BIG_ENDIAN__ + rotate 8,MSW,MSW # move next byte into position for extraction +#endif + shlo 24,MSW,g4 + stob MSW,(g0) # store the byte in dest + cmpo g4,g2 + lda 1(g0),g0 # post-increment dest ptr +#if ! __i960_BIG_ENDIAN__ + shro 8,MSW,MSW # move next byte into position for extraction +#endif + be.f Lexit_char_found # Lexit if char found + cmpobne.t g1,g0,Lcase_3_cloop_at_start # branch if reached word boundary + + ld (g5),MSW # fetch msw of operand for double shift + +Lcase_4: + shro 8,g2,g4 + or g4,g2,g1 + shro 16,g1,g4 + or g4,g1,g4 + +#if __i960_BIG_ENDIAN__ + cmpobne 0,g14,Lcase_3_wloop + +Lcase_3_wloop2: + cmpi g3,4 # less than four bytes to move? + lda 4(g5),g5 # post-increment src word addr + mov LSW,g1 # extract 4 bytes of src + bl.f Lcase_13_cloop_setup # branch if < four bytes left to move + scanbyte g4,g1 # branch if word has char in it + bo.f Lcase_13_cloop_setup + mov MSW,LSW # move msw to lsw + ld (g5),MSW # pre-fetch msw of operand for double shift + subi 4,g3,g3 # decrease max_byte count by the 4 bytes moved + st g1,(g0) # store 4 bytes to dest + addo 4,g0,g0 # post-increment dest ptr + b Lcase_3_wloop2 +#endif + +Lcase_3_wloop: + cmpi g3,4 # less than four bytes to move? + lda 4(g5),g5 # post-increment src word addr + eshro g14,g6,g1 # extract 4 bytes of src + bl.f Lcase_13_cloop_setup # branch if < four bytes left to move + scanbyte g4,g1 # branch if word has char in it + bo.f Lcase_13_cloop_setup + mov MSW,LSW # move msw to lsw + ld (g5),MSW # pre-fetch msw of operand for double shift + subi 4,g3,g3 # decrease max_byte count by the 4 bytes moved + st g1,(g0) # store 4 bytes to dest + addo 4,g0,g0 # post-increment dest ptr + b Lcase_3_wloop + +Lcase_1_setup: + subo 4,g0,g0 # store is pre-incrementing; back up dest addr + shro 8,g2,g4 + or g4,g2,MSW + shro 16,MSW,g4 + or g4,MSW,g4 + b Lcase_1 +Lcase_1_wloop: # word copying loop + subi 4,g3,g3 # decrease max_byte count by the 4 bytes moved + ld (g5),LSW # pre-fetch next word of src + addo 4,g5,g5 # post-increment src addr + st g1,(g0) # store word in dest string +Lcase_1: # src and dest are word aligned + cmpi g3,4 # check for fewer than four bytes to move + addo 4,g0,g0 # pre-increment dest addr + lda (LSW),g1 # keep a copy of the src word + bl.f Lcase_13_cloop_setup # branch if less than four bytes to copy + scanbyte LSW,g4 # branch if char is not in foursome + bno.t Lcase_1_wloop +Lcase_13_cloop_setup: + cmpibe.f 0,g3,Lexit_char_not_found # Lexit if max_bytes is exhausted + +Lcase_1_cloop: +#if __i960_BIG_ENDIAN__ + rotate 8,g1,g1 # move next byte into position for extraction +#endif + shlo 24,g1,g4 + stob g1,(g0) # store the byte in dest + cmpo g4,g2 + lda 1(g0),g0 # post-increment dest byte addr + subi 1,g3,g3 + be.f Lexit_char_found # Lexit if char reached + cmpi 0,g3 +#if ! __i960_BIG_ENDIAN__ + shro 8,g1,g1 # move next byte into position for extraction +#endif + bne.t Lcase_1_cloop # continue if len not exhausted + +Lexit_char_not_found: + mov 0,g0 +Lexit_char_found: + lda 0,g14 + bx (g13) # g0 = dest array address; g14 = 0 +Lrett: + ret + + +Lcase_245: + cmpo g0,g4 # check alignment of dest + ld (g5),MSW # pre-fetch second half + and 3,g1,g1 # compute shift count + shlo 3,g1,g14 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian +#endif + be.t Lcase_4 # branch if dest is word aligned + or g4,g1,g1 # is src earlier in word, later, or sync w/ dst + cmpo g0,g1 # < indicates first word of dest has more bytes + /* than first word of source. */ + eshro g14,g6,g4 # extract four bytes + lda 4(g0),g1 # move dest word addr to first word boundary +#if __i960_BIG_ENDIAN__ + bge.f 1f +#else + bg.f 1f +#endif + mov MSW,LSW + lda 4(g5),g5 # move src word addr to second word boundary +1: + notand g1,3,g1 + mov g4,MSW + b Lcase_25 + +/* end of memccpy */ diff --git a/newlib/libc/machine/i960/memchr.S b/newlib/libc/machine/i960/memchr.S new file mode 100644 index 0000000..e9a4e42 --- /dev/null +++ b/newlib/libc/machine/i960/memchr.S @@ -0,0 +1,130 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memchr.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure memchr (optimized assembler version for the 80960K series) + + src_addr = memchr (src_addr, char, max_bytes) + + searching from src_addr for a span of max_bytes bytes, return a + pointer to the first byte in the source array that contains the + indicated char. Return null if the char is not found. + + Undefined behavior will occur if the last byte of the source array + is in the last two words of the program's allocated memory space. + This is so because memchr fetches ahead. Disallowing the fetch + ahead would impose a severe performance penalty. + + Strategy: + + Fetch the source array by words and scanbyte the words for the + char until either a word with the byte is found or max_bytes is + exhausted. In the former case, move through the word to find the + matching byte and return its memory address. In the latter case, + return zero (null). + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble that would be necessary to assure alignment. This + is supported by the intuition that most source arrays (even more + true of most big source arrays) will be word aligned to begin with. + + 2) Rather than decrementing max_bytes to zero, I calculate the + address of the byte after the last byte of the source array, and + quit when the source byte pointer passes that. Refining, actually + I calculate the address of the fifth byte after the last byte of + the source array, because the source byte pointer is ahead of the + actual examination point due to fetch ahead. +*/ + + .globl _memchr + .globl __memchr + .leafproc _memchr, __memchr + .align 2 +_memchr: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memchr: + + mov g14,g13 # preserve return address + lda 0xff,g7 # byte extraction mask + and g1,g7,g1 # make char an 8-bit ordinal + mov 0,g14 # conform to register linkage standard + cmpibge 0,g2,Lnot_found # do nothing if max_bytes <= 0 + addo 4,g0,g6 # post-increment src word pointer + addo g2,g6,g2 # compute ending address from start and len + ld (g0),g4 # fetch first word + shlo 8,g1,g3 # broadcast the char to four bytes + or g1,g3,g3 + shlo 16,g3,g5 + or g3,g5,g3 + +Lsearch_for_word_with_char: + mov g4,g5 # keep a copy of word + scanbyte g3,g5 # check for byte with char + ld (g6),g4 # fetch next word of src + bo Lsearch_for_char # branch if null found + addo 4,g6,g6 # post-increment src word pointer + cmpobge g2,g6,Lsearch_for_word_with_char # branch if max_bytes > 3 + +Lnot_found: + mov 0,g0 # char not found. Return null + bx (g13) # g0 = addr of char in src (or null); g14 = 0 +Lrett: + ret + +Lsearch_for_char: + cmpobe.f g6,g2,Lnot_found # quit if max_bytes exhausted + and g5,g7,g0 # extract byte + cmpo g1,g0 # is it char? + addo 1,g6,g6 # bump src byte ptr + shro 8,g5,g5 # shift word to position next byte + bne.t Lsearch_for_char + subo 5,g6,g0 # back up the byte pointer + bx (g13) + +/* end of memchr */ diff --git a/newlib/libc/machine/i960/memchr_ca.S b/newlib/libc/machine/i960/memchr_ca.S new file mode 100644 index 0000000..ac80be7 --- /dev/null +++ b/newlib/libc/machine/i960/memchr_ca.S @@ -0,0 +1,153 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memchr_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure memchr (optimized assembler version for the CA) + + src_addr = memchr (src_addr, char, max_bytes) + + searching from src_addr for max_bytes bytes, return a pointer to the + first byte that contains the indicated byte in the source string. + Return null if the byte is not found. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last two words of the program's + allocated memory space. This is so because, in several cases, memchr + will fetch ahead. Disallowing the fetch ahead would impose a severe + performance penalty. + + This program handles two cases: + + 1) the argument starts on a word boundary + 2) the argument doesn't start on a word boundary + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 src ptr; upon return it is a pointer to the matching byte, or null + g1 char to seek + g2 maximum number of bytes to check + g3 char to seek, broadcast to all four bytes + g4 word of the source string + g5 copy of the word + g6 mask to avoid unimportant bytes in first word + g7 byte extraction mask + g13 return address + g14 +*/ + + .globl _memchr + .globl __memchr + .leafproc _memchr, __memchr + .align 2 +_memchr: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memchr: + + mov g14,g13 # preserve return address + lda 0xff,g7 # byte extraction mask + and g1,g7,g1 # make char an 8-bit ordinal + lda 0,g14 # conform to register linkage standard + cmpibge.f 0,g2,Lnot_found # do nothing if max_bytes <= 0 + addo g0,g2,g2 # compute ending address from start and len + and g0,3,g6 # extract byte offset of src + notand g0,3,g0 # extract word addr of start of src + shlo 8,g1,g3 # broadcast the char to four bytes + ld (g0),g4 # fetch word containing at least first byte + or g1,g3,g3 + shlo 16,g3,g5 + cmpo g1,g7 # is char being sought 0xff? + or g5,g3,g3 + shlo 3,g6,g6 # get shift count for making mask for first word + subi 1,0,g5 # mask initially all ones +#if __i960_BIG_ENDIAN__ + shro g6,g5,g5 # get mask for bytes needed from first word +#else + shlo g6,g5,g5 # get mask for bytes needed from first word +#endif + notor g4,g5,g4 # set unneeded bytes to all ones + be.f Lsearch_for_0xff # branch if seeking 0xff + +Lsearch_for_word_with_char: + scanbyte g3,g4 # check for byte with char + lda 4(g0),g0 # pre-increment src word pointer + mov g4,g5 # keep a copy of word + ld (g0),g4 # fetch next word of src + bo.f Lsearch_for_char # branch if null found + cmpoble.t g0,g2,Lsearch_for_word_with_char # branch if not null + +Lnot_found: + mov 0,g0 # char not found. Return null +Lexit_code: + bx (g13) # g0 = addr of char in src (or null); g14 = 0 +Lrett: + ret + +Lsearch_for_char: + subo 4,g0,g0 # back up the byte pointer +Lsearch_for_char.a: + cmpobe.f g0,g2,Lnot_found # quit if max_bytes exhausted +#if __i960_BIG_ENDIAN__ + rotate 8,g5,g5 # shift word to position next byte +#endif + and g5,g7,g6 # extract byte + cmpo g1,g6 # is it char? + lda 1(g0),g0 # bump src byte ptr +#if ! __i960_BIG_ENDIAN__ + shro 8,g5,g5 # shift word to position next byte +#endif + bne.t Lsearch_for_char.a + subo 1,g0,g0 # back up the byte pointer + b Lexit_code + +Lsearch_for_0xff: + lda 0xf0f0f0f0,g6 # make first comparison mask for char=-1 case. + or g6,g5,g6 + and g4,g6,g4 # make unimportant bytes of first word 0x0f + b Lsearch_for_word_with_char + +/* end of memchr */ diff --git a/newlib/libc/machine/i960/memcmp.S b/newlib/libc/machine/i960/memcmp.S new file mode 100644 index 0000000..709eb2b --- /dev/null +++ b/newlib/libc/machine/i960/memcmp.S @@ -0,0 +1,128 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memcmp.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure memcmp (optimized assembler version for the 80960K series) + + result = memcmp (src1_addr, src2_addr, max_bytes) + + compare the byte array pointed to by src1_addr to the byte array + pointed to by src2_addr. Return 0 iff the arrays are equal, -1 iff + src1_addr is lexicographically less than src2_addr, and 1 iff it is + lexicographically greater. Do not compare more than max_bytes bytes. + + Undefined behavior will occur if the end of either source array + is in the last two words of the program's allocated memory space. + This is so because memcmp fetches ahead. Disallowing the fetch ahead + would impose a severe performance penalty. + + Strategy: + + Fetch the source strings by words and compare the words until either + a differing word is found or max_bytes is exhausted. In the former + case, move through the words to find the differing byte and return + plus or minus one, appropriately. In the latter case, return zero + (equality). + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble that would be necessary to assure alignment. This + is supported by the intuition that most source arrays (even more + true of most big source arrays) will be word aligned to begin with. + + 2) Rather than decrementing max_bytes to zero, I calculate the + address of the byte after the last byte of the source_1 array, and + quit when the source byte pointer passes that. +*/ + + .globl _memcmp + .globl __memcmp + .leafproc _memcmp,__memcmp + .align 2 + +_memcmp: +#ifndef __PIC + lda .Lrett,g14 +#else + lda .Lrett-(.+8)(ip),g14 +#endif +__memcmp: + mov g14,g13 # preserve return address + ldconst 0,g14 # conform to register conventions + cmpibge 0,g2,Lequal_exit # quit if max_bytes <= 0 + addo g0,g2,g2 # calculate byte addr of byte after last in src1 + +.Lwloop: + cmpo g0,g2 + ld (g0), g5 # fetch word of source_1 + bge Lequal_exit # quit (equal) if max_bytes exhausted + ld (g1), g3 # fetch word of source_2 + addo 4,g0,g0 # post-increment source_1 byte ptr + addo 4,g1,g1 # post-increment source_2 byte ptr + cmpobe g5,g3,.Lwloop # branch if source words are equal + + ldconst 0xff,g4 # byte extraction mask + subo 4,g0,g0 # back up src1 pointer + +.Lcloop: and g4,g5,g7 # extract and compare individual bytes + and g4,g3,g6 + cmpobne g7,g6,.diff # branch if they are different + shlo 8,g4,g4 # position mask for next extraction + addo 1,g0,g0 + cmpobl g0,g2,.Lcloop # quit if max_bytes is exhausted + +Lequal_exit: + mov 0,g0 + bx (g13) +.Lrett: + ret + +.diff: bl .neg # arrays differ at current byte. + /* return 1 or -1 appropriately */ + mov 1,g0 + bx (g13) +.neg: subi 1,0,g0 +.Lexit: + bx (g13) + +/* end or memcmp */ diff --git a/newlib/libc/machine/i960/memcmp_ca.S b/newlib/libc/machine/i960/memcmp_ca.S new file mode 100644 index 0000000..317ea89 --- /dev/null +++ b/newlib/libc/machine/i960/memcmp_ca.S @@ -0,0 +1,205 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memcm_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1992,1993 Intel Corp., all rights reserved + */ + +/* + procedure memcmp (optimized assembler version for the CA) + + result = memcmp (src1_addr, src2_addr, max_bytes) + + compare the byte array pointed to by src1_addr to the byte array + pointed to by src2_addr. Return 0 iff the arrays are equal, -1 if + src1_addr is lexicly less than src2_addr, and 1 if it is lexicly + greater. Do not compare more than max_bytes bytes. + + Undefined behavior will occur if the end of either source array + is in the last word of the program's allocated memory space. This + is so because, in several cases, memcmp will fetch ahead one word. + Disallowing the fetch ahead would impose a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source1 is word aligned, source2 is not + 4) source2 is word aligned, source1 is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g14 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers are sufficient to implement the routine. + The registers are used as follows: + + g0 original src1 ptr; extracted word; return result + g1 src2 ptr; byt extraction mask + g2 maximum number of bytes to compare + g3 src2 word ptr + Little endian + g4 lsw of src1 + g5 msw of src1 + g6 src2 word + g7 src1 word ptr + Big endian + g4 msw of src1 + g5 lsw of src1 + g6 src1 word ptr + g7 src2 word + g13 return address + g14 shift count +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g4 +#define LSW g5 +#define SRC1 g6 +#define SRC2 g7 +#else +#define LSW g4 +#define MSW g5 +#define SRC2 g6 +#define SRC1 g7 +#endif + + .globl _memcmp + .globl __memcmp + .leafproc _memcmp, __memcmp + .align 2 +_memcmp: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memcmp: +Lrestart: +#if __i960_BIG_ENDIAN__ + subo 1,g0,SRC1 + notand SRC1,3,SRC1 # extract word addr of start of src1 +#else + notand g0,3,SRC1 # extract word addr of start of src1 +#endif + lda (g14),g13 # preserve return address + cmpibge.f 0,g2,Lequal_exit # return equality if number bytes 0 + notand g1,3,g3 # extract word addr of start of src2 + ld (SRC1),LSW # fetch word with at least first byte of src1 + cmpo g3,g1 # check alignment of src2 + ld 4(SRC1),MSW # fetch second word of src1 + shlo 3,g0,g14 # compute shift count for src1 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian. +#endif + ld (g3),SRC2 # fetch word with at least first byte of src2 + eshro g14,g4,LSW # extract word of src1 + lda 8(SRC1),SRC1 # advance src1 word addr + bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned + + mov LSW,g0 # at least src2 is word aligned + + lda 0xff,g1 + +Lwloop: # word comparing loop + cmpo SRC2,g0 # compare src1 and src2 words + lda 4(g3),g3 # pre-increment src2 addr + mov MSW,LSW # move msw of src1 to lsw + ld (SRC1),MSW # pre-fetch next msw of src1 + subi 4,g2,g2 # decrement maximum byte count + bne.f Lcloop # branch if src1 and src2 unequal + cmpi 0,g2 + ld (g3),SRC2 # pre-fetch next word of src2 + eshro g14,g4,g0 # extract word of src1 + lda 4(SRC1),SRC1 # post-increment src1 addr + bl.t Lwloop # branch if max_bytes not reached yet + + b Lequal_exit # strings were equal up through max_bytes + +Lcloop_setup: # setup for coming from Lsrc2_unaligned + mov LSW,g0 # restore extracted src1 word + subo 4,g2,g2 # make up for later re-incrementing + lda 0xff,g1 # byte extraction mask + +Lcloop: # character comparing loop +#if __i960_BIG_ENDIAN__ + rotate 24,g1,g1 # shift mask for next byte +#endif + and SRC2,g1,g3 # extract next char of src2 + and g0,g1,LSW # extract next char of src1 + cmpobne.f LSW,g3,.diff # check for equality +#if ! __i960_BIG_ENDIAN__ + shlo 8,g1,g1 # shift mask for next byte +#endif + subi 1,g2,g2 # decrement character counter + b Lcloop # branch if null not reached + + +Lequal_exit: # words are equal up thru null byte + mov 0,g14 # conform to register conventions + lda 0,g0 # return zero, indicating equality + bx (g13) # return +Lrett: + ret + +.diff: + addo 4,g2,g2 # to make up for extra decrement in loop + lda 0,g14 + bl Lless_than_exit +Lgreater_than_exit: + cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes + mov 1,g0 + bx (g13) # g0 = 1 (src1 > src2) +Lless_than_exit: + cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes + subi 1,0,g0 + bx (g13) # g0 = -1 (src1 < src2) + +Lsrc2_unaligned: + notor g1,3,g14 # first step in computing new src1 ptr + ld 4(g3),SRC1 # fetch second word of src2 + shlo 3,g1,MSW # compute shift count for src2 +#if __i960_BIG_ENDIAN__ + subo MSW,0,MSW +#endif + eshro MSW,g6,SRC2 # extract word of src2 + cmpo LSW,SRC2 # compare src1 and src2 words + lda 4(g3),g1 # set new src2 ptr + bne.f Lcloop_setup # first four bytes differ + subo g14,g0,g0 # second (final) step in computing new src1 ptr + addi g14,g2,g2 # compute new max_bytes too + lda (g13),g14 # prepare return pointer for Lrestart + b Lrestart # continue with both string fetches shifted diff --git a/newlib/libc/machine/i960/memcpy.S b/newlib/libc/machine/i960/memcpy.S new file mode 100644 index 0000000..8465e47 --- /dev/null +++ b/newlib/libc/machine/i960/memcpy.S @@ -0,0 +1,160 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memcpy.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure memmove (optimized assembler version for the 80960K series) + procedure memcpy (optimized assembler version for the 80960K series) + + dest_addr = memmove (dest_addr, src_addr, len) + dest_addr = memcpy (dest_addr, src_addr, len) + + copy len bytes pointed to by src_addr to the space pointed to by + dest_addr. Return the original dest_addr. + + These routines will work even if the arrays overlap. The standard + requires this of memmove, but memcpy is allowed to fail if overlap + is present. Nevertheless, it is implemented the same as memmove + because the overhead is trifling. + + Undefined behavior will occur if the end of the source array is in + the last two words of the program's allocated memory space. This + is so because the routine fetches ahead. Disallowing the fetch + ahead would impose a severe performance penalty. + + Strategy: + + Fetch the source array by words and store them by words to the + destination array, until there are fewer than three bytes left + to copy. Then, using the last word of the source (the one that + contains the remaining 0, 1, 2, or 3 bytes to be copied), store + a byte at a time until Ldone. + + Tactics: + + 1) Do NOT try to fetch and store the words in a word aligned manner + because, in my judgement, the performance degradation experienced due + to non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. This is supported by the intuition that most source and + destination arrays (even more true of most big source arrays) will + be word aligned to begin with. + + 2) For non-overlapping arrays, rather than decrementing len to zero, + I calculate the address of the byte after the last byte of the + destination array, and quit when the destination byte pointer passes + that. + + 3) For overlapping arrays where the source starts at a lower address + than the destination the move is performed in reverse order. + + 4) Overlapping arrays where the source starts at a higher address + are treated like non-overlapping case. Where the two arrays exactly + coincide, the routine is short-circuited; no move is Ldone at all. + This costs only one cycle. +*/ + + .globl _memcpy, _memmove + .globl __memcpy, __memmove + .leafproc _memmove, __memmove + .leafproc _memcpy, __memcpy + .align 2 +_memmove: +_memcpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memmove: +__memcpy: + mov g14, g13 # preserve return address + cmpibge 0,g2,Lexit # exit if number of bytes to move is <= zero. + cmpo g0,g1 # does start of dest overlap end of src? + addo g2,g1,g3 + be Lexit # no move necessary if src and dest are same + concmpo g3,g0 + addo g2, g0, g6 + bg Lbackwards # if overlap, then do move backwards + + ld (g1), g7 # fetch first word of source + mov g0, g5 + b Lwloop_b + +Lwloop_a: + ld (g1), g7 # fetch ahead next word of source + st g4, (g5) # store word to dest + addo 4, g5, g5 # post-increment dest pointer +Lwloop_b: # word copying loop + addo 4, g1, g1 # pre-increment src pointer + cmpo g3, g1 # is len <= 3 ? + mov g7, g4 # keep a copy of the current word + bge Lwloop_a # loop if more than 3 bytes to move + cmpobe g6, g5, Lexit # quit if no more bytes to move + +Lcloop_a: # character copying loop (len < 3) + stob g4, (g5) # store a byte + shro 8, g4, g4 # position next byte for storing + addo 1, g5, g5 + cmpobne g6, g5, Lcloop_a # quit if no more bytes to move + +Lexit: + mov 0, g14 + bx (g13) # g0 = dest array address; g14 = 0 +Lrett: + ret + +Lwloop.a: + subo 4, g6, g6 # pre-decrement dest pointer + st g7, (g6) # store word to dest +Lbackwards: # word copying loop + subo 4, g3, g3 # pre-decrement src pointer + cmpo g1, g3 # is len <= 3? + ld (g3), g7 # fetch ahead next word of source + ble Lwloop.a # loop if more than 3 bytes to move + cmpobe g6, g0, Lexit # quit if no more bytes to move + +Lcloop.a: + subo 1, g6, g6 + rotate 8, g7, g7 # position byte for storing + stob g7, (g6) # store byte + cmpobne g6, g0, Lcloop.a # quit if no more bytes to move + b Lexit + +/* end of memmove */ diff --git a/newlib/libc/machine/i960/memcpy_ca.S b/newlib/libc/machine/i960/memcpy_ca.S new file mode 100644 index 0000000..eebfa88 --- /dev/null +++ b/newlib/libc/machine/i960/memcpy_ca.S @@ -0,0 +1,353 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memcp_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1992,1993 Intel Corp., all rights reserved + */ + +/* + procedure memmove (optimized assembler version for the CA) + procedure memcpy (optimized assembler version for the CA) + + dest_addr = memmove (dest_addr, src_addr, len) + dest_addr = memcpy (dest_addr, src_addr, len) + + copy len bytes pointed to by src_addr to the space pointed to by + dest_addr. Return the original dest_addr. + + Memcpy will fail if the source and destination string overlap + (in particular, if the end of the source is overlapped by the + beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + Memmove will not fail if overlap exists. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, the + routine will fetch ahead one word. Disallowing the fetch ahead would + impose a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source is word aligned, destination is not + 4) destination is word aligned, source is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 dest ptr; not modified, so that it may be returned + g1 src ptr; shift count + g2 len + g3 src ptr (word aligned) + g4 dest ptr (word aligned) + g5 -4 for Lbackwards move + Little endian + g6 lsw of double word for extraction of 4 bytes + g7 msw of double word for extraction of 4 bytes + Big endian + g6 msw of double word for extraction of 4 bytes + g7 lsw of double word for extraction of 4 bytes + g13 return address + g14 byte extracted. +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g6 +#define LSW g7 +#else +#define LSW g6 +#define MSW g7 +#endif + + .globl _memmove, _memcpy + .globl __memmove, __memcpy + .leafproc _memmove, __memmove + .leafproc _memcpy, __memcpy + .align 2 +_memcpy: +_memmove: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memcpy: +__memmove: + cmpibge.f 0,g2,Lquick_exit # Lexit if number of bytes to move is <= zero. + cmpo g0,g1 # if dest starts earlier than src ... + lda (g14),g13 # preserve return address + addo g2,g1,g5 # compute addr of byte after last byte of src + be.f Lexit_code # no move necessary if src and dest are same + concmpo g5,g0 # ... or if dest starts after end of src ... + notand g1,3,g3 # extract word addr of start of src + bg.f Lbackwards # ... then drop thru, else do move backwards + cmpo g3,g1 # check alignment of src + ld (g3),LSW # fetch word containing at least first byte + notand g0,3,g4 # extract word addr of start of dest + lda 4(g3),g3 # advance src word addr + bne.f Lcase_245 # branch if src is NOT word aligned + +Lcase_13: + cmpo g0,g4 # check alignment of dest + subo 4,g4,g4 # store is pre-incrementing; back up dest addr + be.t Lcase_1 # branch if dest word aligned + +Lcase_3: # src is word aligned; dest is not + addo 8,g4,g4 # move dest word ptr to first word boundary + lda (g0),g1 # copy dest byte ptr + mov LSW,MSW # make copy of first word of src + lda 32,g14 # initialize shift count to zero (mod 32) + +Lcase_25: +Lcase_3_cloop_at_start: # character copying loop for start of dest str + cmpdeci 0,g2,g2 # is max_bytes exhausted? + be.f Lexit_code # Lexit if max_bytes is exhausted +#if __i960_BIG_ENDIAN__ + rotate 8,MSW,MSW # move next byte into position for extraction + subo 8,g14,g14 # augment the shift counter + stob MSW,(g1) # store the byte in dest +#else + addo 8,g14,g14 # augment the shift counter + stob MSW,(g1) # store the byte in dest + shro 8,MSW,MSW # move next byte into position for extraction +#endif + lda 1(g1),g1 # post-increment dest ptr + cmpobne.t g1,g4,Lcase_3_cloop_at_start # branch if reached word boundary + + ld (g3),MSW # fetch msw of operand for double shift + +Lcase_4: +Lcase_3_wloop: + cmpi g2,4 # less than four bytes to move? + lda 4(g3),g3 # post-increment src word addr + eshro g14,g6,g1 # extract 4 bytes of src + bl.f Lcase_3_cloop # branch if < four bytes left to move + mov MSW,LSW # move msw to lsw + ld (g3),MSW # pre-fetch msw of operand for double shift + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + st g1,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop + +Lcase_1_wloop: # word copying loop + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + ld (g3),LSW # pre-fetch next word of src + addo 4,g3,g3 # post-increment src addr + st g1,(g4) # store word in dest string +Lcase_1: # src and dest are word aligned + cmpi g2,4 # check for fewer than four bytes to move + addo 4,g4,g4 # pre-increment dest addr + lda (LSW),g1 # keep a copy of the src word + bge.t Lcase_1_wloop # branch if at least four bytes to copy +Lcase_3_cloop: + cmpibe.f 0,g2,Lexit_code # Lexit if max_bytes is exhausted + +Lcase_1_cloop: +#if __i960_BIG_ENDIAN__ + rotate 8,g1,g1 # move next byte into position for extraction +#endif + subi 1,g2,g2 + stob g1,(g4) # store the byte in dest + cmpi 0,g2 + lda 1(g4),g4 # post-increment dest byte addr +#if ! __i960_BIG_ENDIAN__ + shro 8,g1,g1 # move next byte into position for extraction +#endif + bne.t Lcase_1_cloop # Lexit if max_bytes is exhausted + +Lexit_code: + mov 0,g14 # conform to register conventions + bx (g13) # g0 = addr of dest; g14 = 0 +Lrett: + ret + + +Lcase_245: + cmpo g0,g4 # check alignment of dest + ld (g3),MSW # pre-fetch second half + and 3,g1,g1 # compute shift count + shlo 3,g1,g14 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian +#endif + be.t Lcase_4 # branch if dest is word aligned + or g4,g1,g1 # is src earlier in word, later, or sync w/ dst + cmpo g0,g1 # < indicates first word of dest has more bytes + lda 4(g4),g4 # move dest word addr to first word boundary + eshro g14,g6,g5 # extract four bytes + lda (g0),g1 +#if __i960_BIG_ENDIAN__ + bge.f 1f +#else + bg.f 1f +#endif + mov MSW,LSW + lda 4(g3),g3 # move src word addr to second word boundary +1: + mov g5,MSW + b Lcase_25 + + +Lbackwards: + notand g5,3,MSW # extract word addr of byte after end of src + cmpo MSW,g5 # check alignment of end of src + subo 4,MSW,g3 # retreat src word addr + addo g2,g0,g1 # compute addr of byte after end of dest + notand g1,3,g4 # extract word addr of start of dest + bne.f Lcase.245 # branch if src is NOT word aligned + +Lcase.13: + cmpo g1,g4 # check alignment of dest + ld (g3),MSW # fetch last word of src + subo 4,g3,g3 # retreat src word addr + be.t Lcase.1 # branch if dest word aligned + +Lcase.3: # src is word aligned; dest is not + mov MSW,LSW # make copy of first word of src + lda 32,g14 # initialize shift count to zero (mod 32) + +Lcase.25: +Lcase.3_cloop_at_start: # character copying loop for start of dest str + cmpdeci 0,g2,g2 # is max.bytes exhausted? + be.f Lexit_code # Lexit if max_bytes is exhausted +#if ! __i960_BIG_ENDIAN__ + rotate 8,LSW,LSW # move next byte into position for storing +#endif + lda -1(g1),g1 # pre-decrement dest ptr + cmpo g1,g4 # have we reached word boundary in dest yet? + stob LSW,(g1) # store the byte in dest +#if __i960_BIG_ENDIAN__ + shro 8,LSW,LSW # move next byte into position for storing + addo 8,g14,g14 # augment the shift counter +#else + subo 8,g14,g14 # augment the shift counter +#endif + bne.t Lcase.3_cloop_at_start # branch if reached word boundary? + + ld (g3),LSW # fetch lsw of operand for double shift + +#if __i960_BIG_ENDIAN__ + cmpobne 0,g14,Lcase.3_wloop +Lcase.3_wloop2: + cmpi g2,4 # less than four bytes to move? + lda -4(g3),g3 # post-decrement src word addr + mov MSW,g1 # extract 4 bytes of src + lda (LSW),MSW # move lsw to msw + subo 4,g4,g4 # pre-decrement dest ptr + bl.f Lcase.3_cloop # branch if < four bytes left to move + ld (g3),LSW # pre-fetch lsw of operand for double shift + subi 4,g2,g2 # decrease max.byte count by the 4 bytes moved + st g1,(g4) # store 4 bytes to dest + b Lcase.3_wloop2 +#endif + +Lcase.4: +Lcase.3_wloop: + cmpi g2,4 # less than four bytes to move? + lda -4(g3),g3 # post-decrement src word addr + eshro g14,g6,g1 # extract 4 bytes of src + lda (LSW),MSW # move lsw to msw + subo 4,g4,g4 # pre-decrement dest ptr + bl.f Lcase.3_cloop # branch if < four bytes left to move + ld (g3),LSW # pre-fetch lsw of operand for double shift + subi 4,g2,g2 # decrease max.byte count by the 4 bytes moved + st g1,(g4) # store 4 bytes to dest + b Lcase.3_wloop + +Lcase.1_wloop: # word copying loop + subi 4,g2,g2 # decrease max.byte count by the 4 bytes moved + ld (g3),MSW # pre-fetch next word of src + subo 4,g3,g3 # post-decrement src addr + st g1,(g4) # store word in dest string +Lcase.1: # src and dest are word aligned + cmpi g2,4 # check for fewer than four bytes to move + subo 4,g4,g4 # pre-decrement dest addr + lda (MSW),g1 # keep a copy of the src word + bge.t Lcase.1_wloop # branch if at least four bytes to copy +Lcase.3_cloop: + cmpibe.f 0,g2,Lexit_code # Lexit if max_bytes is exhausted +#if ! __i960_BIG_ENDIAN__ + rotate 8,g1,g1 # move next byte into position for storing +#endif + lda 4(g4),g4 # pre-decremented dest addr 4 too much + +Lcase.1_cloop: + subi 1,g4,g4 # pre-decrement dest byte addr + cmpi g4,g0 # has dest ptr reached beginning of dest? + stob g1,(g4) # store the byte in dest +#if __i960_BIG_ENDIAN__ + shro 8,g1,g1 # move next byte into position for storing +#else + rotate 8,g1,g1 # move next byte into position for storing +#endif + bne.t Lcase.1_cloop # Lexit if move is completed + b Lexit_code + +Lcase.245: + cmpo g1,g4 # check alignment of dest + ld (MSW),MSW # pre-fetch word with at least last byte + and 3,g5,g5 # compute shift count + ld (g3),LSW # pre-fetch second to last word + shlo 3,g5,g14 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian +#endif + be.t Lcase.4 # branch if dest is word aligned + or g4,g5,g5 # is src earlier in word, later, or sync w/ dst + cmpo g1,g5 # < indicates last word of dest has less bytes + eshro g14,g6,g5 # extract four bytes + bl.t 1f + mov LSW,MSW +#if ! __i960_BIG_ENDIAN__ + be.t 1f +#endif + subo 4,g3,g3 # move src word addr to second word boundary +1: + mov g5,LSW + b Lcase.25 + + +Lquick_exit: + mov g14,g13 + b Lexit_code + +/* end of memmove */ diff --git a/newlib/libc/machine/i960/memset.S b/newlib/libc/machine/i960/memset.S new file mode 100644 index 0000000..9121d45 --- /dev/null +++ b/newlib/libc/machine/i960/memset.S @@ -0,0 +1,121 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "memset.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ + +/* + procedure memset (optimized assembler version: 80960K series, 80960CA) + + dest_addr = memset (dest_addr, char, len) + + Fill len bytes pointed to by dest_addr with the value of char. + Return the original address of dest_addr. + + This program avoids performing unaligned accesses. It stores + from zero to seven bytes, and then stores aligned longwords, + and then stores from zero to seven bytes, as necessary to + store len bytes starting at dest_addr. + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. +*/ + + .globl _memset + .globl __memset + .leafproc _memset, __memset + .align 2 +_memset: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__memset: + cmpo 7,g2 # are there fewer than seven characters to move? + lda (g14),g13 # save return address + notand g0,7,g3 # test for non-aligned dest_ptr + lda 0,g14 # conform to register conventions + shlo 24,g1,g4 # prepare word of char + lda (g0),g6 # preserve dest_ptr for return + shro 8,g4,g5 + bge.f Lcloop_setup + cmpo g3,g0 # is dest longword aligned + lda 7(g3),g3 # bump dest_ptr to next longword boundary + or g4,g5,g4 + be.t Lwloop_setup + +Lbgn_cloop: + cmpo g6,g3 # Have we reached longword boundary? + stob g1,(g6) # store one byte of char + subo 1,g2,g2 # decrement len + lda 1(g6),g6 # increment dest_ptr + bne.t Lbgn_cloop # loop if more bytes to store before longword + + cmpobge.f 7,g2,Lcloop + +Lwloop_setup: + shro 16,g4,g5 + or g4,g5,g4 + mov g4,g5 # now have a longword of char + +Lwloop: + cmpo 15,g2 # Do we have to store more longwords? + stl g4,(g6) # Store longword of char + subo 8,g2,g2 # Decrement len + lda 8(g6),g6 # Increment dest_ptr + bl.t Lwloop # loop if more longwords to store + +Lcloop_setup: + cmpobge.t 0,g2,Lexit + +Lcloop: + cmpo 1,g2 # Is len exhausted? + stob g1,(g6) # Store byte + subo 1,g2,g2 # Decrement len + lda 1(g6),g6 # Increment dest_ptr + bne.t Lcloop # loop if more bytes to store + +Lexit: + bx (g13) +Lrett: + ret + +/* end of memset */ diff --git a/newlib/libc/machine/i960/setjmp.S b/newlib/libc/machine/i960/setjmp.S new file mode 100644 index 0000000..804df0e --- /dev/null +++ b/newlib/libc/machine/i960/setjmp.S @@ -0,0 +1,96 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + +/******************************************************************************/ +/* */ +/* setjmp(), longjmp() */ +/* */ +/******************************************************************************/ + .file "setjmp.as" + .text + /* .link_pix */ + + .align 4 + .globl _setjmp +_setjmp: + flushreg + andnot 0xf,pfp,g1 /* get pfp, mask out return status bits */ + st g1, 0x58(g0) /* save fp of caller*/ + /* save globals not killed by the calling convention */ + stq g8, 0x40(g0) /* save g8-g11*/ + st g12, 0x50(g0) /* save g12*/ + st g14, 0x54(g0) /* save g14*/ + /* save previous frame local registers */ + ldq (g1), g4 /* get previous frame pfp, sp, rip, r3 */ + stq g4, (g0) /* save pfp, sp, rip, r3 */ + ldq 0x10(g1), g4 /* get previous frame r4-r7 */ + stq g4, 0x10(g0) /* save r4-r7 */ + ldq 0x20(g1), g4 /* get previous frame r8-r11 */ + stq g4, 0x20(g0) /* save r8-r11 */ + ldq 0x30(g1), g4 /* get previous frame r12-r15 */ + stq g4, 0x30(g0) /* save r12-r15 */ + + mov 0, g0 /* return 0 */ + ret + + /* + * fake a return to the place that called the corresponding _setjmp + */ + .align 4 + .globl _longjmp +_longjmp: + call 0f /* ensure there is at least one stack frame */ + +0: + flushreg /* do this before swapping stack */ + ld 0x58(g0), pfp /* get fp of caller of setjmp */ + /* restore local registers + * the following code modifies the frame of the function which originally + * called setjmp. + */ + ldq (g0), g4 /* get pfp, sp, rip, r3 */ + stq g4, (pfp) /* restore pfp, sp, rip, r3 */ + ldq 0x10(g0), g4 /* get r4-r7 */ + stq g4, 0x10(pfp) /* restore r4-r7 */ + ldq 0x20(g0), g4 /* get r8-r11 */ + stq g4, 0x20(pfp) /* restore r8-r11 */ + ldq 0x30(g0), g4 /* get r12-r15 */ + stq g4, 0x30(pfp) /* restore r12-r15 */ + /* restore global registers */ + ldq 0x40(g0), g8 /* get old g8-g11 values */ + ld 0x50(g0), g12 /* get old g12 value */ + ld 0x54(g0), g14 /* get old g14 value */ + + mov g1, g0 /* get return value */ + cmpo g0, 0 /* make sure it is not zero */ + bne 0f + mov 1, g0 /* return 1 by default */ +0: + ret /* return to caller of _setjmp */ diff --git a/newlib/libc/machine/i960/strchr.S b/newlib/libc/machine/i960/strchr.S new file mode 100644 index 0000000..bc50c2c --- /dev/null +++ b/newlib/libc/machine/i960/strchr.S @@ -0,0 +1,123 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strchr.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strchr (optimized assembler version for the 80960K series) + + src_addr = strchr (src_addr, char) + + return a pointer to the first byte that contains the indicated + byte in the source string. Return null if the byte is not found. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last two words of the program's + allocated memory space. This is so because strchr fetches ahead. + Disallowing the fetch ahead would impose a severe performance penalty. + + Strategy: + + Fetch the source string by words and scanbyte the words for the + char until either a word with the byte is found or the null byte is + encountered. In the former case, move through the word to find the + matching byte and return its memory address. In the latter case, + return zero (null). + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble that would be necessary to assure alignment. This + is supported by the intuition that most source arrays (even more + true of most big source arrays) will be word aligned to begin with. +*/ + + .globl _strchr + .globl __strchr + .leafproc _strchr, __strchr + .align 2 +_strchr: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strchr: + + ld (g0),g4 # fetch first word + lda 0xff,g7 # byte extraction mask + and g1,g7,g1 # make char an 8-bit ordinal + shlo 8,g1,g2 # broadcast the char to four bytes + or g1,g2,g2 + shlo 16,g2,g5 + or g2,g5,g3 + mov g14,g13 # preserve return address + addo 4,g0,g0 # post-increment src pointer + mov 0,g14 # conform to register linkage standard + +Lsearch_for_word_with_char_or_null: + mov g4,g5 # copy word + scanbyte g3,g5 # check for byte with char + ld (g0),g4 # fetch next word of src + bo Lsearch_for_char # branch if char found + scanbyte 0,g5 # check for null byte + addo 4,g0,g0 # post-increment src pointer + bno Lsearch_for_word_with_char_or_null # branch if not null + +Lnot_found: + mov 0,g0 # char not found. Return null +Lexit_code: + bx (g13) # g0 = addr of char in src (or null); g14 = 0 +Lrett: + ret + +Lsearch_for_char: + subo 5,g0,g0 # back up the byte pointer +Lsearch_for_char.a: + and g5,g7,g6 # extract byte + cmpo g1,g6 # is it char? + addo 1,g0,g0 # bump src byte ptr + shro 8,g5,g5 # shift word to position next byte + be Lexit_code + cmpobne 0,g6,Lsearch_for_char.a # quit if null comes before char + b Lnot_found + +/* end of strchr */ diff --git a/newlib/libc/machine/i960/strchr_ca.S b/newlib/libc/machine/i960/strchr_ca.S new file mode 100644 index 0000000..f52eae2 --- /dev/null +++ b/newlib/libc/machine/i960/strchr_ca.S @@ -0,0 +1,152 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strch_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strchr (optimized assembler version for the CA) + + src_addr = strchr (src_addr, char) + + return a pointer to the first byte that contains the indicated + byte in the source string. Return null if the byte is not found. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last two words of the program's + allocated memory space. This is so because, in several cases, strchr + will fetch ahead. Disallowing the fetch ahead would impose a severe + performance penalty. + + This program handles two cases: + + 1) the argument starts on a word boundary + 2) the argument doesn't start on a word boundary + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 src ptr; upon return it is a pointer to the matching byte, or null + g1 char to seek + g2 mask to avoid unimportant bytes in first word + g3 char to seek, broadcast to all four bytes + g4 word of the source string + g5 copy of the word + g6 extracted character + g7 byte extraction mask + g13 return address + g14 +*/ + + .globl _strchr + .globl __strchr + .leafproc _strchr, __strchr + .align 2 +_strchr: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strchr: + + lda 0xff,g7 # byte extraction mask + and g1,g7,g1 # make char an 8-bit ordinal + shlo 8,g1,g2 # broadcast the char to four bytes + or g1,g2,g2 + shlo 16,g2,g4 + cmpo g1,g7 # is char being sought 0xff? + or g4,g2,g3 + lda (g14),g13 # preserve return address + notand g0,3,g5 # extract word addr of start of src + lda 0,g14 # conform to register linkage standard + and g0,3,g6 # extract byte offset of src + ld (g5),g4 # fetch word containing at least first byte + shlo 3,g6,g6 # get shift count for making mask for first word + lda 4(g5),g0 # post-increment src word pointer + subi 1,0,g5 # mask initially all ones +#if __i960_BIG_ENDIAN__ + shro g6,g5,g5 # get mask for bytes needed from first word +#else + shlo g6,g5,g5 # get mask for bytes needed from first word +#endif + notor g4,g5,g4 # set unneeded bytes to all ones + be.f Lsearch_for_0xff # branch if seeking 0xff + +Lsearch_for_word_with_char_or_null: + scanbyte g3,g4 # check for byte with char + lda (g4),g5 # copy word + ld (g0),g4 # fetch next word of src + bo.f Lsearch_for_char # branch if null found + scanbyte 0,g5 # check for null byte + lda 4(g0),g0 # post-increment src word pointer + bno.t Lsearch_for_word_with_char_or_null # branch if not null + +Lnot_found: + mov 0,g0 # char not found. Return null +Lexit_code: + bx (g13) # g0 = addr of char in src (or null); g14 = 0 +Lrett: + ret + +Lsearch_for_char: + subo 5,g0,g0 # back up the byte pointer +Lsearch_for_char.a: +#if __i960_BIG_ENDIAN__ + rotate 8,g5,g5 # shift word to position next byte +#endif + and g5,g7,g6 # extract byte + cmpo g1,g6 # is it char? + lda 1(g0),g0 # bump src byte ptr +#if ! __i960_BIG_ENDIAN__ + shro 8,g5,g5 # shift word to position next byte +#endif + be.f Lexit_code + cmpobne.t 0,g6,Lsearch_for_char.a # quit if null comes before char + b Lnot_found + +Lsearch_for_0xff: + lda 0xf0f0f0f0,g2 # make first comparison mask for char=-1 case. + or g5,g2,g2 + and g4,g2,g4 # make unimportant bytes of first word 0x0f + b Lsearch_for_word_with_char_or_null + +/* end of strchr */ + diff --git a/newlib/libc/machine/i960/strcmp.S b/newlib/libc/machine/i960/strcmp.S new file mode 100644 index 0000000..c0cd4bd --- /dev/null +++ b/newlib/libc/machine/i960/strcmp.S @@ -0,0 +1,118 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strcmp.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure strcmp (optimized assembler version for the 80960K Series) + + result = strcmp (src1_addr, src2_addr) + + compare the null terminated string pointed to by src1_addr to + the string pointed to by src2_addr. Return 0 iff the strings + are equal, -1 if src1_addr is lexicographically less than src2_addr, + and 1 if it is lexicographically greater. + + Undefined behavior will occur if the end of either source string + (i.e. the terminating null byte) is in the last two words of the + program's allocated memory space. This is so because strcmp fetches + ahead. Disallowing the fetch ahead would impose a severe performance + penalty. + + Strategy: + + Fetch the source strings by words and compare the words until either + differing words are found or the null byte is encountered. In either + case, move through the word until either the differing byte if found, + in which case return -1 or 1 appropriately; or the null byte is + encountered, in which case, return zero (equality). + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. This is supported by the intuition that many source + strings will be word aligned to begin with. +*/ + + .globl _strcmp + .globl __strcmp + .leafproc _strcmp,__strcmp + .align 2 + +_strcmp: +#ifndef __PIC + lda .Lrett,g14 +#else + lda .Lrett-(.+8)(ip),g14 +#endif +__strcmp: + ld (g0), g5 # fetch first word of source_1 + mov g14,g7 # preserve return address + ldconst 0,g14 # conform to register conventions + ldconst 0xff,g4 # byte extraction mask +.Lwloop: + addo 4,g0,g0 # post-increment source_1 byte ptr + ld (g1), g3 # fetch word of source_2 + scanbyte 0,g5 # does word have a null byte? + mov g5,g2 # save a copy of the source_1 word + be .Lcloop # branch if null byte encountered + cmpo g2,g3 # are the source words the same? + addo 4,g1,g1 # post-increment source_2 byte ptr + ld (g0), g5 # fetch ahead next word of source_1 + be .Lwloop # fall thru if words are unequal + +.Lcloop: and g4,g2,g5 # extract and compare individual bytes + and g4,g3,g6 + cmpobne g5,g6,.diff # if they differ, go return 1 or -1 + cmpo 0,g6 # they are the same. Are they null? + shlo 8,g4,g4 # position mask for next extraction + bne .Lcloop # loop if null not encountered + + mov 0,g0 # return equality + bx (g7) +.Lrett: + ret +.diff: bl .neg + mov 1,g0 + bx (g7) +.neg: subi 1,0,g0 +.Lexit: + bx (g7) diff --git a/newlib/libc/machine/i960/strcmp_ca.S b/newlib/libc/machine/i960/strcmp_ca.S new file mode 100644 index 0000000..0298ffa --- /dev/null +++ b/newlib/libc/machine/i960/strcmp_ca.S @@ -0,0 +1,246 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strcm_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strcmp (optimized assembler version for the CA) + + result = strcmp (src1_addr, src2_addr) + + compare the null terminated string pointed to by src1_addr to + the string space pointed to by src2_addr. Return 0 iff the strings + are equal, -1 if src1_addr is lexicly less than src2_addr, and 1 + if it is lexicly greater. + + Undefined behavior will occur if the end of either source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, strcmp + will fetch ahead one word. Disallowing the fetch ahead would impose + a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source1 is word aligned, source2 is not + 4) source2 is word aligned, source1 is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g14 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers are sufficient to implement the routine. + The registers are used as follows: + + g0 original src1 ptr; return result + g1 src2 ptr; 0xff -- byte extraction mask + g2 src1 word ptr + g3 src2 word ptr + Little endian: + g4 lsw of src1 + g5 msw of src1 + g6 src2 word + g7 extracted src1 + Big endian: + g4 msw of src1 + g5 lsw of src1 + g6 extracted src1 + g7 src2 word + g13 return address + g14 shift count +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g4 +#define LSW g5 +#define SRC1 g6 +#define SRC2 g7 +#else +#define LSW g4 +#define MSW g5 +#define SRC2 g6 +#define SRC1 g7 +#endif + + .globl _strcmp + .globl __strcmp + .leafproc _strcmp, __strcmp + .align 2 +_strcmp: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif + +__strcmp: +Lrestart: + notand g0,3,g2 # extract word addr of start of src1 + lda (g14),g13 # preserve return address +#if __i960_BIG_ENDIAN__ + cmpo g0,g2 # check alignment of src1 +#endif + ld (g2),LSW # fetch word with at least first byte of src1 + notand g1,3,g3 # extract word addr of start of src2 + ld 4(g2),MSW # fetch second word of src1 +#if __i960_BIG_ENDIAN__ + bne Lsrc1_unaligned # branch if src1 is unaligned + cmpo g3,g1 # check alignment of src2 + ld (g3),SRC2 # fetch word with at least first byte of src2 + mov LSW,SRC1 # extract word of src1 + lda 8(g2),g2 # advance src1 word addr + bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned + + /* src2 is word aligned */ + +Lwloop2: # word comparing loop + cmpo SRC2,SRC1 # compare src1 and src2 words + lda 0xff000000,g1 # byte extraction mask + mov MSW,LSW # move msw of src1 to lsw + ld (g2),MSW # pre-fetch next msw of src1 + addo 4,g2,g2 # post-increment src1 addr + lda 4(g3),g3 # pre-increment src2 addr + bne.f Lcloop # branch if src1 and src2 unequal + scanbyte 0,SRC1 # check for null byte in src1 word + ld (g3),SRC2 # pre-fetch next word of src2 + mov LSW,SRC1 # extract word of src1 + lda 0,g0 # prepare to return zero, indicating equality + bno.t Lwloop2 # branch if null byte not encountered + + /* words were equal and contained null byte */ + + mov 0,g14 # conform to register conventions + bx (g13) # return + + +Lsrc1_unaligned: +#endif + cmpo g3,g1 # check alignment of src2 + ld (g3),SRC2 # fetch word with at least first byte of src2 + shlo 3,g0,g14 # compute shift count for src1 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # 32 - shift count for big endian. +#endif + eshro g14,g4,SRC1 # extract word of src1 + lda 8(g2),g2 # advance src1 word addr + bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned + + /* at least src2 is word aligned */ + +Lwloop: # word comparing loop + cmpo SRC2,SRC1 # compare src1 and src2 words +#if __i960_BIG_ENDIAN__ + lda 0xff000000,g1 # byte extraction mask +#else + lda 0xff,g1 # byte extraction mask +#endif + mov MSW,LSW # move msw of src1 to lsw + ld (g2),MSW # pre-fetch next msw of src1 + addo 4,g2,g2 # post-increment src1 addr + lda 4(g3),g3 # pre-increment src2 addr + bne.f Lcloop # branch if src1 and src2 unequal + scanbyte 0,SRC1 # check for null byte in src1 word + ld (g3),SRC2 # pre-fetch next word of src2 + eshro g14,g4,SRC1 # extract word of src1 + lda 0,g0 # prepare to return zero, indicating equality + bno.t Lwloop # branch if null byte not encountered + + /* words were equal and contained null byte */ + + mov 0,g14 # conform to register conventions + bx (g13) # return + +Lcloop_setup: # setup for coming from Lsrc2_unaligned + mov LSW,SRC1 # restore extracted src1 word +#if __i960_BIG_ENDIAN__ + lda 0xff000000,g1 # byte extraction mask +#else + lda 0xff,g1 # byte extraction mask +#endif + +Lcloop: # character comparing loop + and SRC2,g1,g3 # extract next char of src2 + and SRC1,g1,g0 # extract next char of src1 + cmpobne.f g0,g3,.diff # check for equality + cmpo 0,g0 # check for null byte +#if __i960_BIG_ENDIAN__ + shro 8,g1,g1 # shift mask for next byte +#else + shlo 8,g1,g1 # shift mask for next byte +#endif + bne.t Lcloop # branch if null not reached + + /* words are equal up thru null byte */ + + mov 0,g14 + bx (g13) # g0 = 0 (src1 == src2) +Lrett: + ret + +.diff: + mov 0,g14 + bl Lless_than_exit +Lgreater_than_exit: + mov 1,g0 + bx (g13) # g0 = 1 (src1 > src2) +Lless_than_exit: + subi 1,0,g0 + bx (g13) # g0 = -1 (src1 < src2) + +Lsrc2_unaligned: + mov SRC1,LSW # retain src1 extracted word + ld 4(g3),SRC1 # fetch second word of src2 + shlo 3,g1,MSW # compute shift count for src2 +#if __i960_BIG_ENDIAN__ + subo MSW,0,MSW # 32 - shift count for big endian. +#endif + eshro MSW,g6,SRC2 # extract word of src2 + cmpo LSW,SRC2 # compare src1 and src2 words + notor g1,3,MSW # first step in computing new src1 ptr + lda 4(g3),g1 # set new src2 ptr + bne.f Lcloop_setup # first four bytes differ + scanbyte 0,LSW # check for null byte + lda (g13),g14 # prepare return pointer for Lrestart + subo MSW,g0,g0 # second (final) step in computing new src1 ptr + bno.t Lrestart # if null byte not encountered, continue + /* with both string fetches shifted such that */ + /* src2 is now word aligned. */ + mov 0,g14 # conform to register conventions. + lda 0,g0 # return indicator of equality. + bx (g13) diff --git a/newlib/libc/machine/i960/strcpy.S b/newlib/libc/machine/i960/strcpy.S new file mode 100644 index 0000000..ed8bb72 --- /dev/null +++ b/newlib/libc/machine/i960/strcpy.S @@ -0,0 +1,177 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strcpy.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure strcpy (optimized assembler version for the 80960K series) + procedure strcat (optimized assembler version for the 80960K series) + + dest_addr = strcpy (dest_addr, src_addr) + + copy the null terminated string pointed to by src_addr to + the string space pointed to by dest_addr. Return the original + dest_addr. + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last two words of the + program's allocated memory space. This is so because strcpy fetches + ahead. Disallowing the fetch ahead would impose a severe performance + penalty. + + Strategy: + + Fetch the source string and store the destination string by words + until the null byte is encountered. When the word with the null + byte is reached, store it by bytes up through the null byte only. + + Tactics: + + 1) Do NOT try to fetch and store the words in a word aligned manner + because, in my judgement, the performance degradation experienced due + to non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. This is supported by the intuition that most source and + destination strings will be word aligned to begin with. + + + procedure strcat + + dest_addr = strcat (dest_addr, src_addr) + + Appends the string pointed to by src_addr to the string pointed + to by dest_addr. The first character of the source string is + copied to the location initially occupied by the trailing null + byte of the destination string. Thereafter, characters are copied + from the source to the destination up thru the null byte that + trails the source string. + + See the strcpy routine, above, for its caveats, as they apply here too. + + Strategy: + + Skip to the end (null byte) of the destination string, and then drop + into the strcpy code. + + Tactics: + + Skipping to the null byte is Ldone by reading the destination string + in long-words and scanbyte'ing them, then examining the bytes of the + word that contains the null byte, until the address of the null byte is + known. Then we drop into the strcpy routine. It is probable (approx. + three out of four times) that the destination string as strcpy sees + it will NOT be word aligned (i.e. that the null byte won't be the + last byte of a word). But it is not worth the complication to that + routine to force word aligned memory accesses to be gaurenteed. +*/ + .globl _strcpy, _strcat + .globl __strcpy, __strcat + .leafproc _strcpy,__strcpy + .leafproc _strcat,__strcat + .align 2 +_strcat: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strcat: + mov g14,g13 # preserve return address + ldl (g0),g4 # fetch first two words + addo 8,g0,g2 # post-increment src word pointer + lda 0xff,g3 # byte extraction mask + +Lsearch_for_word_with_null_byte: + scanbyte 0,g4 # check for null byte + mov g5,g7 # copy second word + bo.f Lsearch_for_null # branch if null found + scanbyte 0,g7 # check for null byte + ldl (g2),g4 # fetch next pair of word of src + addo 8,g2,g2 # post-increment src word pointer + bno Lsearch_for_word_with_null_byte # branch if null not found yet + + subo 4,g2,g2 # back up the byte pointer + mov g7,g4 # move word with null to search word +Lsearch_for_null: + subo 9,g2,g5 # back up the byte pointer +Lsearch_for_null.a: + and g4,g3,g6 # extract byte + cmpo 0,g6 # is it null? + addo 1,g5,g5 # bump src byte ptr + shro 8,g4,g4 # shift word to position next byte + bne Lsearch_for_null.a + b Lend_of_dest_found + +_strcpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strcpy: + mov g0, g5 +Lend_of_dest_found: + ld (g1), g2 # fetch first word of source + mov g14,g6 # preserve return address + lda 0xff, g3 # byte extraction mask = 0xff; +Lwloop: # word copying loop + addo 4, g1, g1 # post-increment source ptr + scanbyte 0, g2 # does source word contain null byte? + mov g2, g4 # save a copy of the source word + be Lcloop # branch if null present + ld (g1), g2 # pre-fetch next word of source + st g4, (g5) # store current word + addo 4, g5, g5 # post-increment dest ptr + b Lwloop + +Lcloop: # character copying loop + and g3, g4, g14 # extract next char + shro 8, g4, g4 # position word for next byte extraction + cmpo 0, g14 # is it null? + stob g14, (g5) # store the byte + addo 1, g5, g5 # post-increment dest ptr + bne Lcloop # quit if null encountered + + bx (g6) # g0 = dest string address; g14 = 0 +Lrett: + ret diff --git a/newlib/libc/machine/i960/strcpy_ca.S b/newlib/libc/machine/i960/strcpy_ca.S new file mode 100644 index 0000000..dbb9444 --- /dev/null +++ b/newlib/libc/machine/i960/strcpy_ca.S @@ -0,0 +1,284 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strcp_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strcpy (optimized assembler version for the CA) + + dest_addr = strcpy (dest_addr, src_addr) + + copy the null terminated string pointed to by src_addr to + the string space pointed to by dest_addr. Return the original + dest_addr. + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, strcpy + will fetch ahead one word. Disallowing the fetch ahead would impose + a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source is word aligned, destination is not + 4) destination is word aligned, source is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 original dest ptr; not modified, so that it may be returned. + g1 src ptr; shift count + g2 dest ptr; 4 bytes of src + g3 src ptr (word aligned) + g4 dest ptr (word aligned) + g5 0xff -- byte extraction mask + g6 lsw of double word for extraction of 4 bytes (little endian) + msw of double word for extraction of 4 bytes (big endian) + g7 msw of double word for extraction of 4 bytes (little endian) + lsw of double word for extraction of 4 bytes (big endian) + g13 return address + g14 byte extracted. When reaches null byte, which is zero, we will + be in conformance with register conventions, and can return to + the caller with a clear conscience. + + procedure strcat + + dest_addr = strcat (dest_addr, src_addr) + + Appends the string pointed to by src_addr to the string pointed + to by dest_addr. The first character of the source string is + copied to the location initially occupied by the trailing null + byte of the destination string. Thereafter, characters are copied + from the source to the destination up thru the null byte that + trails the source string. +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g6 +#define LSW g7 +#else +#define LSW g6 +#define MSW g7 +#endif + + .globl _strcpy, _strcat + .globl __strcpy, __strcat + .leafproc _strcpy, __strcpy + .leafproc _strcat, __strcat + .align 2 +_strcat: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strcat: + notand g0,3,g4 # extract word addr of start of dest + lda (g14),g13 # preserve return address + and g0,3,LSW # extract byte offset of dest + ld (g4),MSW # fetch word containing at least first byte + shlo 3,LSW,g14 # get shift count for making mask for first word + subi 1,0,LSW # mask initially all ones +#if __i960_BIG_ENDIAN__ + shro g14,LSW,LSW # get mask for bytes needed from first word + lda 0xff000000,g5 # byte extraction mask +#else + shlo g14,LSW,LSW # get mask for bytes needed from first word + lda 0xff,g5 # byte extraction mask +#endif + notor MSW,LSW,MSW # set unneeded bytes to all ones +Lsearch_for_word_with_null: + scanbyte 0,MSW # check for null byte + lda 4(g4),g4 # post-increment dest word pointer + mov MSW,LSW # keep a copy of current word + ld (g4),MSW # fetch next word of dest + bno.t Lsearch_for_word_with_null # branch if null not found yet + and g5,LSW,g14 # extract byte + cmpo 0,g14 # branch if null is first byte of word + subo 4,g4,g4 # move dest word ptr back to word with null + notand g1,3,g3 # extract word addr of start of src + lda (g4),g2 # set dest byte ptr to 1st byte of word w/ null + be.f Lcase_14 +Lsearch_for_null: +#if __i960_BIG_ENDIAN__ + shro 8,g5,g5 # move mask down to next byte +#else + shlo 8,g5,g5 # move mask up to next byte +#endif + lda 1(g2),g2 # move dest byte ptr to next byte + and g5,LSW,g14 # extract byte + cmpobne.t 0,g14,Lsearch_for_null # branch if null is not yet found + lda 0xff,g5 # byte extraction mask + b Lcase_235.a + + +_strcpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strcpy: + notand g0,3,g4 # extract word addr of start of dest + lda (g14),g13 # preserve return address + cmpo g0,g4 # check alignment of dest + lda 0xff,g5 # load mask for byte extraction + notand g1,3,g3 # extract word addr of start of src + bne.f Lcase_235 # branch if dest is NOT word aligned + +Lcase_14: + cmpo g3,g1 # check alignment of src + ld (g3),LSW # fetch word containing at least first byte + shlo 3,g1,g1 # compute shift count + lda 4(g3),g3 # advance src word addr +#if __i960_BIG_ENDIAN__ + lda 0xff,g5 # byte extraction mask +#endif + bne.f Lcase_4 # branch if src is NOT word aligned + +Lcase_1: # src and dest are word aligned + subo 4,g4,g4 # store is pre-incrementing; back up dest addr +Lcase_1_wloop: # word copying loop + scanbyte 0,LSW # check for null byte in src word + lda (LSW),g2 # keep a copy of the src word + addo 4,g4,g4 # pre-increment dest addr + ld (g3),LSW # pre-fetch next word of src + addo 4,g3,g3 # post-increment src addr + bo.f Lcase_1_cloop # branch if word contains null byte + st g2,(g4) # store word in dest string + b Lcase_1_wloop + +Lcase_3_cloop: +Lcase_1_cloop: # character copying loop +#if __i960_BIG_ENDIAN__ + rotate 8,g2,g2 # move next byte into position for extraction + and g5,g2,g14 # extract next char +#else + and g5,g2,g14 # extract next char + shro 8,g2,g2 # move next byte into position for extraction +#endif + cmpo 0,g14 # check for null byte + stob g14,(g4) # store the byte in dest + lda 1(g4),g4 # post-increment dest byte addr + bne.t Lcase_1_cloop # branch if null not reached + +Lexit_code: + bx (g13) # g0 = addr of dest; g14 = 0 +Lrett: + ret + +Lcase_3: # src is word aligned; dest is not + addo 4,g4,g4 # move dest word ptr to first word boundary + mov LSW,MSW # make copy of first word of src + lda 0,g1 # initialize shift count to zero + +Lcase_25: +Lcase_3_cloop_at_start: # character copying loop for start of dest str +#if __i960_BIG_ENDIAN__ + rotate 8,MSW,MSW # move next byte into position for extraction + and g5,MSW,g14 # extract next char +#else + and g5,MSW,g14 # extract next char + shro 8,MSW,MSW # move next byte into position for extraction +#endif + cmpo 0,g14 # check for null byte + stob g14,(g2) # store the byte in dest + lda 1(g2),g2 # post-increment dest ptr + be.f Lexit_code # branch if null byte reached + cmpo g2,g4 # have we reached word boundary in dest? + lda 8(g1),g1 # augment the shift counter + bne.t Lcase_3_cloop_at_start + +Lcase_4: + ld (g3),MSW # fetch msw of operand for double shift +#if __i960_BIG_ENDIAN__ + subo g1,0,g1 # Adjust shift count for big endian. +#endif + +Lcase_3_wloop: + eshro g1,g6,g2 # extract 4 bytes of src + lda 4(g3),g3 # post-increment src word addr + scanbyte 0,g2 # check for null byte + lda (MSW),LSW # move msw to lsw + ld (g3),MSW # pre-fetch msw of operand for double shift + bo.f Lcase_3_cloop # branch if word contains null byte + st g2,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop + +Lcase_235: + lda (g0),g2 # copy dest ptr +Lcase_235.a: + cmpo g3,g1 # check alignment of src + ld (g3),LSW # fetch word containing at least first byte + and 3,g1,g14 # compute shift count + lda 4(g3),g3 # advance src word addr + shlo 3,g14,g1 + be.t Lcase_3 # branch if dest is word aligned + or g4,g14,g14 # is src earlier in word, later, or sync w/ dst + ld (g3),MSW # pre-fetch second half + cmpo g2,g14 # < indicates first word of dest has more bytes + lda 4(g4),g4 # move dest word addr to first word boundary + /* than first word of source. */ +#if __i960_BIG_ENDIAN__ + subo g1,0,g14 # Adjust shift count for big endian. + eshro g14,g6,g14 # extract four bytes + bge.f 1f +#else + eshro g1,g6,g14 # extract four bytes + bg.f 1f +#endif + mov MSW,LSW + lda 4(g3),g3 # move src word addr to second word boundary +1: + mov g14,MSW + b Lcase_25 + +/* end of strcpy */ + diff --git a/newlib/libc/machine/i960/strcspn.S b/newlib/libc/machine/i960/strcspn.S new file mode 100644 index 0000000..cd7b2e6 --- /dev/null +++ b/newlib/libc/machine/i960/strcspn.S @@ -0,0 +1,94 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strcspn.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ + +/* + procedure strcspn (optimized assembler version: 80960K series, 80960CA) + + len = strcspn (string, charset) + + Return the number of characters in the maximum leading segment + of string which consists solely of characters NOT from charset. + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. +*/ + + .globl _strcspn + .globl __strcspn + .leafproc _strcspn, __strcspn + .align 2 + +_strcspn: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strcspn: + mov g14,g13 # save return address + lda (g0),g3 # copy string pointer + mov 0,g14 # conform to register conventions + +Lnext_char: + ldob (g3),g7 # fetch next character of string + addo 1,g1,g2 # g2 will be the charset ptr + ldob (g1),g6 # fetch first character of charset + cmpobe.f 0,g7,Lexit # quit if at end of string +Lscan_set: + cmpo g6,g7 # is charset char same as string char? + ldob (g2),g5 # fetch next charset char + addo 1,g2,g2 # bump charset ptr + be.f Lexit + cmpo g6,0 # is charset exhausted? + lda (g5),g6 + bne.t Lscan_set # check next character of charset + addo 1,g3,g3 # check next character of string + b Lnext_char + +Lexit: + subo g0,g3,g0 # compute string length + bx (g13) +Lrett: + ret + +/* end of strcspn */ diff --git a/newlib/libc/machine/i960/strdup.S b/newlib/libc/machine/i960/strdup.S new file mode 100644 index 0000000..7e879ff --- /dev/null +++ b/newlib/libc/machine/i960/strdup.S @@ -0,0 +1,66 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strdup.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif + +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ + +/* + procedure strdup (optimized assembler version: 80960K series, 80960CA) + + dest_addr = strdup (src_addr) + + Allocate memory and copy thereto the string pointed to by src_addr. + Return the address of the copy, or null if unable to perform the + operation. +*/ + + .text + .align 2 + .globl _strdup +_strdup: + mov g0,r3 # Keep a copy of the original string addr + callj _strlen # Determine how much to allocate + addo 1,g0,g0 # Add one byte for the null byte at end + callj _malloc # Allocate the storage + cmpo 0,g0 + mov r3,g1 # Original string addr is now src for copy + bne.t _strcpy # Jump if allocation was successful + ret # Return the null ptr otherwise + +/* end of strdup */ diff --git a/newlib/libc/machine/i960/strlen.S b/newlib/libc/machine/i960/strlen.S new file mode 100644 index 0000000..dfbeec2 --- /dev/null +++ b/newlib/libc/machine/i960/strlen.S @@ -0,0 +1,117 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strlen.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif + +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strlen (optimized assembler version for the 80960K series) + + src_addr = strlen (src_addr) + + return the number of bytes that precede the null byte in the + string pointed to by src_addr. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last four words of the program's + allocated memory space. This is so because strlen fetches ahead + several words. Disallowing the fetch ahead would impose a severe + performance penalty. + + Strategy: + + Fetch the source array by long-words and scanbyte the words for the + null byte until found. Examine the word in which the null byte is + found, to determine its actual position, and return the length. + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble that would be necessary to assure alignment. This + is supported by the intuition that many source strings will be word + aligned to begin with. +*/ + + .globl _strlen + .globl __strlen + .leafproc _strlen, __strlen + .align 2 +_strlen: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strlen: + + mov g14,g13 # preserve return address + ldl (g0),g4 # fetch first two words + addo 8,g0,g2 # post-increment src word pointer + lda 0xff,g3 # byte extraction mask + + +Lsearch_for_word_with_null_byte: + scanbyte 0,g4 # check for null byte + mov g5,g7 # copy second word + bo.f Lsearch_for_null # branch if null found + scanbyte 0,g7 # check for null byte + ldl (g2),g4 # fetch next pair of word of src + addo 8,g2,g2 # post-increment src word pointer + bno Lsearch_for_word_with_null_byte # branch if null not found yet + + subo 4,g2,g2 # back up the byte pointer + mov g7,g4 # move word with null to search word +Lsearch_for_null: + subo 9,g2,g2 # back up the byte pointer +Lsearch_for_null.a: + and g4,g3,g14 # extract byte + cmpo 0,g14 # is it null? + addo 1,g2,g2 # bump src byte ptr + shro 8,g4,g4 # shift word to position next byte + bne Lsearch_for_null.a + +Lexit_code: + subo g0,g2,g0 # calculate string length + bx (g13) # g0 = addr of src; g14 = 0 +Lrett: + ret + +/* end of strlen */ diff --git a/newlib/libc/machine/i960/strlen_ca.S b/newlib/libc/machine/i960/strlen_ca.S new file mode 100644 index 0000000..350423b --- /dev/null +++ b/newlib/libc/machine/i960/strlen_ca.S @@ -0,0 +1,146 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strle_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strlen (optimized assembler version for the CA) + + src_addr = strlen (src_addr) + + return the number of bytes that precede the null byte in the + string pointed to by src_addr. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last four words of the program's + allocated memory space. This is so because, in several cases, strlen + will fetch ahead several words. Disallowing the fetch ahead would + impose a severe performance penalty. + + This program handles two cases: + + 1) the argument starts on a word boundary + 2) the argument doesn't start on a word boundary + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 original src ptr; upon return it is the byte count. + g1 + g2 src ptr + g3 mask + g4 even word of the source string + g5 odd word of the source string + g6 copy of even word, shift count + g7 copy of odd word + g13 return address + g14 byte extracted. +*/ + + .globl _strlen + .globl __strlen + .leafproc _strlen, __strlen + .align 2 +_strlen: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strlen: + + notand g0,3,g2 # extract word addr of start of src + lda (g14),g13 # preserve return address + and g0,3,g7 # extract byte offset of src + ld (g2),g5 # fetch word containing at least first byte + shlo 3,g7,g7 # get shift count for making mask for first word + lda 4(g2),g2 # post-increment src word pointer + subi 1,0,g3 # mask initially all ones + chkbit 2,g2 # are we on an even word boundary or an odd one? +#if __i960_BIG_ENDIAN__ + shro g7,g3,g3 # get mask for bytes needed from first word + notor g5,g3,g7 # set unneeded bytes to all ones + lda 0xff000000,g3 # byte extraction mask +#else + shlo g7,g3,g3 # get mask for bytes needed from first word + notor g5,g3,g7 # set unneeded bytes to all ones + lda 0xff,g3 # byte extraction mask +#endif + bno.f Lodd_word # branch if first word is odd + mov g7,g4 # move first word to copy thereof + ld (g2),g5 # load odd word + lda 4(g2),g2 # post-increment src word pointer + + +Leven_word: + scanbyte 0,g4 # check for null byte + movl g4,g6 # copy both words +Lodd_word: # trickery! if we branch here, following branch + /* instruction will fall thru, as we want, */ + /* effecting the load of g4 and g5 only. */ + ldl (g2),g4 # fetch next pair of word of src + bo.f Lsearch_for_null # branch if null found + scanbyte 0,g7 # check for null byte + lda 8(g2),g2 # post-increment src word pointer + bno.t Leven_word # branch if null not found yet + + subo 4,g2,g2 # back up the byte pointer + lda (g7),g6 # move odd word to search word +Lsearch_for_null: + subo 9,g2,g2 # back up the byte pointer +Lsearch_for_null.a: + and g6,g3,g14 # extract byte + cmpo 0,g14 # is it null? + lda 1(g2),g2 # bump src byte ptr +#if __i960_BIG_ENDIAN__ + shlo 8,g6,g6 # shift word to position next byte +#else + shro 8,g6,g6 # shift word to position next byte +#endif + bne.t Lsearch_for_null.a + +Lexit_code: + subo g0,g2,g0 # calculate string length + bx (g13) # g0 = addr of src; g14 = 0 +Lrett: + ret + +/* end of strlen */ diff --git a/newlib/libc/machine/i960/strncat.S b/newlib/libc/machine/i960/strncat.S new file mode 100644 index 0000000..a655824 --- /dev/null +++ b/newlib/libc/machine/i960/strncat.S @@ -0,0 +1,155 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strncat.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure strncat (optimized assembler version for the 80960K Series) + + dest_addr = strncat (dest_addr, src_addr, max_bytes) + + append the null terminated string pointed to by src_addr to the null + terminated string pointed to by dest_addr. Return the original + dest_addr. If the source string is longer than max_bytes, then + append only max_bytes bytes, and tack on a null byte on the end. + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last two words of the + program's allocated memory space. This is so because strncat fetches + ahead. Disallowing the fetch ahead would impose a severe performance + penalty. + + Strategy: + + First, skip to the null byte in the destination string. Then + fetch the source string by words and store them by words to the + destination string, until there are fewer than three bytes left + to copy. Then, using the last word of the source (the one that + contains the remaining 0, 1, 2, or 3 bytes to be copied), store + a byte at a time until Ldone. + + If, before exhausting the max_byte count, the null byte is encountered + in the source string, then just copy up thru the null byte. + + Tactics: + + 1) Do NOT try to fetch and store the words in a word aligned manner + because, in my judgement, the performance degradation experienced due + to non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. +*/ + + .globl _strncat + .globl __strncat + .leafproc _strncat,__strncat + .align 2 +_strncat: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strncat: + mov g14,g6 + cmpibge 0, g2, Lno_operation # Lexit early if max_bytes <= 0 + mov g0, g5 +Lskip_word_loop: + ld (g5), g7 # fetch word of dest string + addo 4, g5, g5 # post-increment dest ptr + scanbyte 0, g7 # does it contain null byte? + bno Lskip_word_loop # if not, loop + subo 5, g5, g5 # adjust dest ptr + lda 0xff, g3 # byte extraction mask = 0xff; +Lskip_byte_loop: + and g7, g3, g14 # extract byte of last word of dest string + cmpo 0, g14 # is it null? + addo 1, g5, g5 # adjust dest ptr + shro 8, g7, g7 # position next byte for extraction + bne Lskip_byte_loop # loop if null not found yet + + ld (g1), g7 # fetch first word of source string +Lwloop: # word copying loop + cmpo 4, g2 # max_bytes < 4 ? + addo 4, g1, g1 # post-increment source ptr + bge Lcloop.a # branch if less than 4 bytes to move + scanbyte 0, g7 # is null byte reached yet? + mov g7, g4 # keep a copy of the source word + be Lcloop # branch if null byte reached + ld (g1), g7 # pre-fetch next word of source + subo 4, g2, g2 # reduce max_byte counter + st g4, (g5) # store current word + addo 4, g5, g5 # post-increment destination ptr + b Lwloop + +Lcloop.b: + addo 1, g5, g5 # post-increment destination ptr + shro 8, g7, g7 # position next byte for extraction +Lcloop: # character copying loop (max_byte > 3) + and g3, g7, g4 # extract character + cmpo 0, g4 # is it null? + stob g4, (g5) # store it + bne Lcloop.b # loop if null not encountered yet + + bx (g6) # g0 = dest string address; g14 = 0 +Lrett: + ret + +Lcloop.c: + addo 1, g5, g5 # post-increment destination ptr + shro 8, g7, g7 # position next byte for extraction +Lcloop.a: # character copying loop (max_byte <= 3) + cmpdeco 0,g2,g2 # max_byte == 0? + and g3, g7, g4 # extract character + be Ldone # store null and Lexit if max_byte exhausted + cmpo 0, g4 # is it null? + stob g4, (g5) # store it + bne Lcloop.c # loop if null not encountered yet + +Ldone: stob g14, (g5) # store trailing null + bx (g6) # g0 = dest string address; g14 = 0 + +Lno_operation: mov 0, g14 # conform to register conventions + bx (g6) + +/* end of strncat */ diff --git a/newlib/libc/machine/i960/strncat_ca.S b/newlib/libc/machine/i960/strncat_ca.S new file mode 100644 index 0000000..45c5e17 --- /dev/null +++ b/newlib/libc/machine/i960/strncat_ca.S @@ -0,0 +1,300 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "sncat_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strncat (optimized assembler version for the CA) + + dest_addr = strncat (dest_addr, src_addr, max_bytes) + + append the null terminated string pointed to by src_addr to the null + terminated string pointed to by dest_addr. Return the original + dest_addr. If the source string is longer than max_bytes, then + append only max_bytes bytes, and tack on a null byte on the end + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, strncat + will fetch ahead one word. Disallowing the fetch ahead would impose + a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source is word aligned, destination is not + 4) destination is word aligned, source is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 original dest ptr; not modified, so that it may be returned. + g1 src ptr; shift count + g2 max_bytes + g3 src ptr (word aligned) + g4 dest ptr (word aligned) + g5 0xff -- byte extraction mask + Little endian: + g6 lsw of double word for extraction of 4 bytes + g7 msw of double word for extraction of 4 bytes + Big endian: + g6 msw of double word for extraction of 4 bytes + g7 lsw of double word for extraction of 4 bytes + g13 return address + g14 byte extracted. +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g6 +#define LSW g7 +#else +#define LSW g6 +#define MSW g7 +#endif + + .globl _strncat + .globl __strncat + .leafproc _strncat, __strncat + .align 2 +_strncat: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strncat: + notand g0,3,g4 # extract word addr of start of dest + lda (g14),g13 # preserve return address + cmpibge.f 0,g2,Lexit_code # Lexit if number of bytes to move is <= zero. + and g0,3,LSW # extract byte offset of dest + ld (g4),MSW # fetch word containing at least first byte + shlo 3,LSW,g14 # get shift count for making mask for first word + subi 1,0,LSW # mask initially all ones +#if __i960_BIG_ENDIAN__ + shro g14,LSW,LSW # get mask for bytes needed from first word +#else + shlo g14,LSW,LSW # get mask for bytes needed from first word +#endif + notor MSW,LSW,MSW # set unneeded bytes to all ones + lda 0xff,g5 # byte extraction mask +Lsearch_for_word_with_null: + scanbyte 0,MSW # check for null byte + lda 4(g4),g4 # post-increment dest word pointer + mov MSW,LSW # keep a copy of current word + ld (g4),MSW # fetch next word of dest + bno.t Lsearch_for_word_with_null # branch if null not found yet +#if __i960_BIG_ENDIAN__ + shro 24,LSW,g14 # extract byte +#else + and g5,LSW,g14 # extract byte +#endif + cmpo 0,g14 # branch if null is first byte of word + subo 4,g4,g4 # move dest word ptr to word with null + notand g1,3,g3 # extract word addr of start of src + bne.t Lsearch_for_null + +Lcase_14: + cmpo g1,g3 # check alignment of source + ld (g3),LSW # fetch first word of source + shlo 3,g1,g14 # compute shift count + lda 4(g3),g3 # post-increment src addr + bne.f Lcase_4 # branch if source is unaligned +Lcase_1: +Lcase_1_wloop: # word copying loop + cmpi g2,4 # check for fewer than four bytes to move + lda (LSW),g1 # keep a copy of the src word + bl.f Lcase_1_cloop # branch if fewer than four bytes to copy + scanbyte 0,g1 # check for null byte in src word + ld (g3),LSW # pre-fetch next word of src + addo 4,g3,g3 # post-increment src addr + bo.f Lcase_1_cloop # branch if word contains null byte + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + st g1,(g4) # store word in dest string + addo 4,g4,g4 # post-increment dest addr + b Lcase_1_wloop + +Lcase_3_cloop: +Lcase_1_cloop: # character copying loop (max_bytes <= 3) + cmpdeci 0,g2,g2 # is max_bytes exhausted? +#if __i960_BIG_ENDIAN__ + rotate 8,g1,g1 # move next byte into position for extraction +#endif + and g5,g1,g14 # extract next char + be.f Lstore_null # if max_bytes is exhausted, store null and quit + cmpo 0,g14 # check for null byte + stob g14,(g4) # store the byte in dest +#if ! __i960_BIG_ENDIAN__ + shro 8,g1,g1 # move next byte into position for extraction +#endif + lda 1(g4),g4 # post-increment dest byte addr + bne.t Lcase_1_cloop # branch if null not reached + bx (g13) # Lexit (g14 == 0) + +Lstore_null: + mov 0,g14 # store null, and set g14 to zero + stob g14,(g4) + bx (g13) + + +Lsearch_for_null: +#if __i960_BIG_ENDIAN__ + shlo 8,LSW,LSW # check next byte + shro 24,LSW,g14 +#else + shlo 8,g5,g5 # move mask up to next byte + and g5,LSW,g14 # extract byte +#endif + lda 1(g4),g4 # move dest byte ptr to next byte + cmpobne.t 0,g14,Lsearch_for_null # branch if null is not yet found + +Lcase_235: + cmpo g1,g3 # check alignment of src + ld (g3),LSW # pre-fetch word with start of src + and 3,g1,g1 # compute shift count + lda 0xff,g5 # load mask for byte extraction + shlo 3,g1,g14 + lda 4(g3),g3 # post-increment src word counter + be.t Lcase_3 # branch if src is word aligned + and g4,3,MSW # extract byte offset for dest string + cmpo MSW,g1 # < indicates first word of dest has more bytes + /* than first word of source. */ + ld (g3),MSW # fetch second word of src +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian +#endif + eshro g14,g6,g5 # extract four bytes +#if __i960_BIG_ENDIAN__ + bge.f 1f +#else + bg.f 1f +#endif + mov MSW,LSW + lda 4(g3),g3 # move src word addr to second word boundary +1: + mov g5,MSW + lda 0xff,g5 + b Lcase_25 + +Lcase_3: # src is word aligned; dest is not + mov LSW,MSW # make copy of first word of src + lda 32,g14 # initialize shift count to zero (mod 32) +Lcase_25: + +Lcase_3_cloop_at_start: # character copying loop for start of dest str + cmpdeci 0,g2,g2 # is max_bytes exhausted? +#if __i960_BIG_ENDIAN__ + shro 24,MSW,g5 # extract next char +#else + and g5,MSW,g5 # extract next char +#endif + be.f Lstore_null # Lexit if max_bytes is exhausted + cmpo 0,g5 # check for null byte + stob g5,(g4) # store the byte in dest + addo 1,g4,g4 # post-increment dest ptr + lda 0xff,g5 # re-initialize byte extraction mask + notand g4,3,g1 # extract word address + be.t Lexit_code # Lexit if null byte reached + cmpo g1,g4 # have we reached word boundary in dest yet? +#if __i960_BIG_ENDIAN__ + lda -8(g14),g14 # augment the shift counter + rotate 8,MSW,MSW # move next byte into position for extraction +#else + lda 8(g14),g14 # augment the shift counter + shro 8,MSW,MSW # move next byte into position for extraction +#endif + bne.t Lcase_3_cloop_at_start # branch if reached word boundary? + +#if __i960_BIG_ENDIAN__ + cmpo 0,g14 + ld (g3),MSW # fetch msw of operand for double shift + bne Lcase_3_wloop # branch if src is still unaligned. + +Lcase_3_wloop2: + cmpi g2,4 # less than four bytes to move? + mov LSW,g1 # extract 4 bytes of src + lda 4(g3),g3 # post-increment src word addr + bl.f Lcase_3_cloop # branch if < four bytes left to move + scanbyte 0,g1 # check for null byte + mov MSW,LSW # move msw to lsw + ld (g3),MSW # pre-fetch msw of operand for double shift + bo.f Lcase_3_cloop # branch if word contains null byte + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + st g1,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop2 +Lcase_4: + subo g14,0,g14 # adjust shift count for big endian +#else +Lcase_4: +#endif + + ld (g3),MSW # fetch msw of operand for double shift + +Lcase_3_wloop: + cmpi g2,4 # less than four bytes to move? + eshro g14,g6,g1 # extract 4 bytes of src + lda 4(g3),g3 # post-increment src word addr + bl.f Lcase_3_cloop # branch if < four bytes left to move + scanbyte 0,g1 # check for null byte + mov MSW,LSW # move msw to lsw + ld (g3),MSW # pre-fetch msw of operand for double shift + bo.f Lcase_3_cloop # branch if word contains null byte + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + st g1,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop + + +Lexit_code: + mov 0,g14 # conform to register conventions + bx (g13) # g0 = addr of dest; g14 = 0 +Lrett: + ret + +/* end of strncat */ + diff --git a/newlib/libc/machine/i960/strncmp.S b/newlib/libc/machine/i960/strncmp.S new file mode 100644 index 0000000..030b750 --- /dev/null +++ b/newlib/libc/machine/i960/strncmp.S @@ -0,0 +1,129 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strncmp.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure strncmp (optimized assembler version for the 80960K Series) + + result = strncmp (src1_addr, src2_addr, max_bytes) + + compare the null terminated string pointed to by src1_addr to + the string pointed to by src2_addr. Return 0 iff the strings + are equal, -1 if src1_addr is lexicographically less than src2_addr, + and 1 if it is lexicographically greater. Do not compare more than + max_bytes bytes. + + Undefined behavior will occur if the end of either source string + (i.e. the terminating null byte) is in the last two words of the + program's allocated memory space. This is so because strncmp + will fetch ahead. Disallowing the fetch ahead would impose + a severe performance penalty. + + Strategy: + + Fetch and compare the strings by words and go to a character + comparison loop as soon as a pair of words differ. If the + words are equal up through either the exhaustion of max_bytes + or the presence of the null byte, return 0 (equality). Otherwise, + the character comparator will return -1 or 1 for inequality, or + 0 if the differing byte is after the null byte or after the + exhaustion of max_bytes. + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. +*/ + + .globl _strncmp + .globl __strncmp + .leafproc _strncmp,__strncmp + .align 2 + +_strncmp: +#ifndef __PIC + lda .Lrett,g14 +#else + lda .Lrett-(.+8)(ip),g14 +#endif +__strncmp: + mov g14,g13 + ldconst 0,g14 + cmpibge 0,g2,Lequal_exit # Lexit early if max_bytes <= 0 + addo g2,g0,g2 +.Lwloop: + cmpo g0,g2 # are max_bytes exhausted? + ld (g0), g5 # fetch word of source_1 + bge Lequal_exit # Lexit (equality) if max_bytes exhausted + ld (g1), g3 # fetch word of source_2 + addo 4,g0,g0 # post-increment source_1 ptr + scanbyte 0,g5 # is a null byte present? + addo 4,g1,g1 # post-increment source_1 ptr + be .Lcloop.a # perform char comparator if null byte found + cmpobe g5,g3,.Lwloop # perform char comparator if words are unequal + +.Lcloop.a: subo 4,g0,g0 # adjust max_byte counter + ldconst 0xff,g4 # byte extraction mask + +.Lcloop: and g4,g5,g7 # compare individual bytes + and g4,g3,g6 + cmpobne g7,g6,.diff # if different, return -1 or 1 + cmpo 0,g6 # they are equal. are they null? + shlo 8,g4,g4 # position mask to extract next byte + be Lequal_exit # if they are null, Lexit (equality) + addo 1,g0,g0 # is max_bytes exhausted? + cmpobl g0,g2,.Lcloop # if not, loop. if so, Lexit (equality) + +Lequal_exit: + mov 0,g0 + bx (g13) +.Lrett: + ret +.diff: bl .neg + mov 1,g0 + bx (g13) + +.neg: subi 1,0,g0 +.Lexit: + bx (g13) + +/* end of strncmp */ diff --git a/newlib/libc/machine/i960/strncmp_ca.S b/newlib/libc/machine/i960/strncmp_ca.S new file mode 100644 index 0000000..0b1a8ff --- /dev/null +++ b/newlib/libc/machine/i960/strncmp_ca.S @@ -0,0 +1,253 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "sncmp_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strncmp (optimized assembler version for the CA) + + result = strncmp (src1_addr, src2_addr, max_bytes) + + compare the null terminated string pointed to by src1_addr to + the string space pointed to by src2_addr. Return 0 iff the strings + are equal, -1 if src1_addr is lexicly less than src2_addr, and 1 + if it is lexicly greater. Do not compare more than max_bytes bytes. + + Undefined behavior will occur if the end of either source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, strncmp + will fetch ahead one word. Disallowing the fetch ahead would impose + a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source1 is word aligned, source2 is not + 4) source2 is word aligned, source1 is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g14 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers are sufficient to implement the routine. + The registers are used as follows: + + g0 original src1 ptr; extracted word; return result + g1 src2 ptr; 0xff -- byte extraction mask + g2 maximum number of bytes to compare + g3 src2 word ptr + Little endian: + g4 lsw of src1 + g5 msw of src1 + g6 src2 word + g7 src1 word ptr + Big endian: + g4 msw of src1 + g5 lsw of src1 + g6 src1 word ptr + g7 src2 word + g13 return address + g14 shift count +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g4 +#define LSW g5 +#define SRC1 g6 +#define SRC2 g7 +#else +#define LSW g4 +#define MSW g5 +#define SRC2 g6 +#define SRC1 g7 +#endif + + .globl _strncmp + .globl __strncmp + .leafproc _strncmp, __strncmp + .align 2 +_strncmp: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strncmp: +Lrestart: + notand g0,3,SRC1 # extract word addr of start of src1 + lda (g14),g13 # preserve return address + cmpibge.f 0,g2,Lequal_exit # return equality if number of bytes to + /* compare is none. */ +#if __i960_BIG_ENDIAN__ + cmpo g0,SRC1 # check alignment of src1 +#endif + ld (SRC1),LSW # fetch word with at least first byte of src1 + notand g1,3,g3 # extract word addr of start of src2 + ld 4(SRC1),MSW # fetch second word of src1 +#if __i960_BIG_ENDIAN__ + bne Lsrc1_unaligned # branch if src1 is unaligned + cmpo g3,g1 # check alignment of src2 + ld (g3),SRC2 # fetch word with at least first byte of src2 + shlo 3,g0,g14 # compute shift count for src1 + subo g14,0,g14 # adjust shift count for big endian + lda 8(SRC1),SRC1 # advance src1 word addr + bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned + + /* src2 is word aligned */ + + mov LSW,g0 + +Lwloop2: # word comparing loop + cmpo SRC2,g0 # compare src1 and src2 words + lda 0xff000000,g1 # byte extraction mask + mov MSW,LSW # move msw of src1 to lsw + ld (SRC1),MSW # pre-fetch next msw of src1 + addo 4,SRC1,SRC1 # post-increment src1 addr + lda 4(g3),g3 # pre-increment src2 addr + bne.f Lcloop # branch if src1 and src2 unequal + scanbyte 0,g0 # check for null byte in src1 word + ld (g3),SRC2 # pre-fetch next word of src2 + mov LSW,g0 # extract word of src1 + subi 4,g2,g2 # decrement maximum byte count + bo.f Lequal_exit # branch if null byte encountered + cmpibl.t 0,g2,Lwloop2 # branch if max_bytes not reached yet + + b Lequal_exit # strings were equal up through max_bytes + +Lsrc1_unaligned: +#endif + cmpo g3,g1 # check alignment of src2 + ld (g3),SRC2 # fetch word with at least first byte of src2 + shlo 3,g0,g14 # compute shift count for src1 +#if __i960_BIG_ENDIAN__ + subo g14,0,g14 # adjust shift count for big endian +#endif + eshro g14,g4,LSW # extract word of src1 + lda 8(SRC1),SRC1 # advance src1 word addr + bne.f Lsrc2_unaligned # branch if src2 is NOT word aligned + + /* at least src2 is word aligned */ + + mov LSW,g0 + +Lwloop: # word comparing loop + cmpo SRC2,g0 # compare src1 and src2 words +#if __i960_BIG_ENDIAN__ + lda 0xff000000,g1 # byte extraction mask +#else + lda 0xff,g1 # byte extraction mask +#endif + mov MSW,LSW # move msw of src1 to lsw + ld (SRC1),MSW # pre-fetch next msw of src1 + addo 4,SRC1,SRC1 # post-increment src1 addr + lda 4(g3),g3 # pre-increment src2 addr + bne.f Lcloop # branch if src1 and src2 unequal + scanbyte 0,g0 # check for null byte in src1 word + ld (g3),SRC2 # pre-fetch next word of src2 + eshro g14,g4,g0 # extract word of src1 + subi 4,g2,g2 # decrement maximum byte count + bo.f Lequal_exit # branch if null byte encountered + cmpibl.t 0,g2,Lwloop # branch if max_bytes not reached yet + + b Lequal_exit # strings were equal up through max_bytes + +Lcloop_setup: # setup for coming from Lsrc2_unaligned + mov LSW,g0 # restore extracted src1 word +#if __i960_BIG_ENDIAN__ + lda 0xff000000,g1 # byte extraction mask +#else + lda 0xff,g1 # byte extraction mask +#endif + +Lcloop: # character comparing loop + and SRC2,g1,g3 # extract next char of src2 + and g0,g1,LSW # extract next char of src1 + cmpobne.f LSW,g3,.diff # check for equality + cmpo 0,LSW # check for null byte +#if __i960_BIG_ENDIAN__ + shro 8,g1,g1 # shift mask for next byte +#else + shlo 8,g1,g1 # shift mask for next byte +#endif + subi 1,g2,g2 # decrement character counter + bne.t Lcloop # branch if null not reached + + /* words are equal up thru null byte */ + +Lequal_exit: + mov 0,g14 # conform to register conventions + lda 0,g0 # return zero, indicating equality + bx (g13) # return + +Lrett: + ret + +.diff: + mov 0,g14 + bl Lless_than_exit +Lgreater_than_exit: + cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes + mov 1,g0 + bx (g13) # g0 = 1 (src1 > src2) +Lless_than_exit: + cmpibge.f 0,g2,Lequal_exit # branch if difference is beyond max_bytes + subi 1,0,g0 + bx (g13) # g0 = -1 (src1 < src2) + +Lsrc2_unaligned: + notor g1,3,g14 # first step in computing new src1 ptr + ld 4(g3),SRC1 # fetch second word of src2 + shlo 3,g1,MSW # compute shift count for src2 +#if __i960_BIG_ENDIAN__ + subo MSW,0,MSW # adjust shift count for big endian +#endif + eshro MSW,g6,SRC2 # extract word of src2 + cmpo LSW,SRC2 # compare src1 and src2 words + lda 4(g3),g1 # set new src2 ptr + bne.f Lcloop_setup # first four bytes differ + scanbyte 0,LSW # check for null byte + subo g14,g0,g0 # second (final) step in computing new src1 ptr + addi g14,g2,g2 # compute new max_bytes too + lda (g13),g14 # prepare return pointer for Lrestart + bno.t Lrestart # if null byte not encountered, continue + /* with both string fetches shifted such that*/ + /* src2 is now word aligned.*/ + mov 0,g14 # conform to register conventions. + lda 0,g0 # return indicator of equality. + bx (g13) diff --git a/newlib/libc/machine/i960/strncpy.S b/newlib/libc/machine/i960/strncpy.S new file mode 100644 index 0000000..9f51b60 --- /dev/null +++ b/newlib/libc/machine/i960/strncpy.S @@ -0,0 +1,154 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strncpy.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ +/* + procedure strncpy (optimized assembler version for the 80960K Series) + + dest_addr = strncpy (dest_addr, src_addr, max_bytes) + + copy the null terminated string pointed to by src_addr to the + string pointed to by dest_addr. Return the original dest_addr. + If the source string is shorter than max_bytes, then null-pad + the destination string. If it is longer than max_bytes, the + copy stops at max_bytes bytes (and no terminating null appears + in the destination string). + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last two words of the + program's allocated memory space. This is so because strncpy fetches + ahead. Disallowing the fetch ahead would impose a severe performance + penalty. + + Strategy: + + Fetch and store the strings by words and go to a character move loop + as soon as a null byte is encountered. If max_bytes is exhausted + first, then terminate after moving only max_bytes (with the last + 0, 1, 2, or 3 bytes moved as single bytes, not as a word). + Otherwise, the character move loop moves the last bytes or the + source string, and then null-pads the destination string until + max_bytes is exhausted. + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble and convoluted body that would be necessary to assure + alignment. + + 2) When the null byte is encountered in a source word, null out the + higher-numbered bytes in that word, store the word in the destination, + and go to the word null-padder, which may eventually go to the byte + null-padder. +*/ + + .globl _strncpy + .globl __strncpy + .leafproc _strncpy,__strncpy + .align 2 +_strncpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strncpy: + mov g14, g13 + cmpibge 0,g2,Lexit # quit early if max_bytes <= 0 + ld (g1), g7 # fetch the first word of the source + mov g0, g5 + lda 0xff, g3 # byte extraction mask + addo g1, g2, g6 + addo g2, g5, g2 +Lwloop: # word copying loop + addo 4, g1, g1 # post-increment source ptr + cmpo g6, g1 # max_bytes < 4 ? + mov g7, g4 # keep a copy of source word + bl Lcloop.a # if less than four bytes to go, go to char loop + scanbyte 0, g4 # null byte found? + ld (g1), g7 # pre-fetch next word of the source + be Lcloop.c # go to char loop if null encountered + st g4, (g5) # store current word + addo 4, g5, g5 # post-increment destination ptr + b Lwloop + +Lcloop.a: # character copying loop (max_bytes < 3) + and g3, g4, g14 # extract byte +Lcloop.b: + cmpo g2, g5 # max_bytes <= 0 ? + shro 8, g4, g4 # position word to extract next byte + be Lexit # exit if max_bytes exhausted + cmpo 0, g14 # is it null? + stob g14, (g5) # store it + addo 1, g5, g5 # post-increment dest ptr + bne Lcloop.a # branch if we are NOT null padding + b Lcloop.b # branch if we are null padding + +Lexit: + mov 0, g14 + bx (g13) # g0 = dest string address; g14 = 0 +Lrett: + ret + +Lcloop.c: # character copying loop + and g3, g4, g14 # extract byte + cmpo 0, g14 # is it null? + mov g3, g7 # save mask + shlo 8, g3, g3 # shift mask to next byte position + bne Lcloop.c # loop until null found + subo 1, g7, g3 # mask to null pad after null byte + and g3, g4, g4 # null-out stuff after null byte + st g4, (g5) # store last part of src and first of null-pad + subo 8,g2,g6 # adjust max_byte counter + +Lzwloop: + cmpo g5, g6 # max_bytes < 4 ? + addo 4, g5, g5 + bg Lcloop.b # if so, goto character loop + st g14, (g5) # store four null bytes + b Lzwloop + +/* end of strncpy */ diff --git a/newlib/libc/machine/i960/strncpy_ca.S b/newlib/libc/machine/i960/strncpy_ca.S new file mode 100644 index 0000000..1f90acf --- /dev/null +++ b/newlib/libc/machine/i960/strncpy_ca.S @@ -0,0 +1,289 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "sncpy_ca.s" +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strncpy (optimized assembler version for the CA) + + dest_addr = strncpy (dest_addr, src_addr, max_bytes) + + copy the null terminated string pointed to by src_addr to + the string space pointed to by dest_addr. Return the original + dest_addr. If the source string is shorter than max_bytes, + then null-pad the destination string. + + This routine will fail if the source and destination string + overlap (in particular, if the end of the source is overlapped + by the beginning of the destination). The behavior is undefined. + This is acceptable according to the draft C standard. + + Undefined behavior will also occur if the end of the source string + (i.e. the terminating null byte) is in the last word of the program's + allocated memory space. This is so because, in several cases, strcpy + will fetch ahead one word. Disallowing the fetch ahead would impose + a severe performance penalty. + + This program handles five cases: + + 1) both arguments start on a word boundary + 2) neither are word aligned, but they are offset by the same amount + 3) source is word aligned, destination is not + 4) destination is word aligned, source is not + 5) neither is word aligned, and they are offset by differing amounts + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. The registers are used as follows: + + g0 original dest ptr; not modified, so that it may be returned. + g1 src ptr; shift count + g2 max_bytes + g3 src ptr (word aligned) + g4 dest ptr (word aligned) + g5 0xff -- byte extraction mask + Little endian: + g6 lsw of double word for extraction of 4 bytes + g7 msw of double word for extraction of 4 bytes + Big endian: + g6 msw of double word for extraction of 4 bytes + g7 lsw of double word for extraction of 4 bytes + g13 return address + g14 byte extracted. +*/ + +#if __i960_BIG_ENDIAN__ +#define MSW g6 +#define LSW g7 +#else +#define LSW g6 +#define MSW g7 +#endif + + .globl _strncpy + .globl __strncpy + .leafproc _strncpy, __strncpy + .align 2 +_strncpy: +#ifndef __PIC + lda Lrett,g14 +#else + lda Lrett-(.+8)(ip),g14 +#endif +__strncpy: + notand g1,3,g3 # extract word addr of start of src + lda (g14),g13 # preserve return address + cmpibge.f 0,g2,Lexit_code # Lexit if number of bytes to move is <= zero. + cmpo g3,g1 # check alignment of src + ld (g3),LSW # fetch word containing at least first byte + notand g0,3,g4 # extract word addr of start of dest + lda 4(g3),g3 # advance src word addr + bne.f Lcase_245 # branch if src is NOT word aligned + +Lcase_13: + cmpo g0,g4 # check alignment of dest + lda 0xff,g5 # load mask for byte extraction + subo 4,g4,g4 # store is pre-incrementing; back up dest addr + bne.f Lcase_3 # branch if dest not word aligned + +Lcase_1: # src and dest are word aligned +Lcase_1_wloop: # word copying loop + cmpi g2,4 # check for fewer than four bytes to move + lda (LSW),g1 # keep a copy of the src word + addo 4,g4,g4 # pre-increment dest addr + bl.f Lcase_1_cloop.a # branch if fewer than four bytes to copy + scanbyte 0,g1 # check for null byte in src word + ld (g3),LSW # pre-fetch next word of src + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + bo.f Lcase_1_cloop.c # branch if word contains null byte + addo 4,g3,g3 # post-increment src addr + st g1,(g4) # store word in dest string + b Lcase_1_wloop + +Lcase_3_cloop.a: +Lcase_1_cloop.a: # character copying loop (max_bytes <= 3) +#if __i960_BIG_ENDIAN__ + rotate 8,g1,g1 # move next byte into position for extraction +#endif + and g5,g1,g14 # extract next char +Lcase_1_cloop.b: + cmpdeci 0,g2,g2 # is max_bytes exhausted? + be.f Lexit_code # Lexit if max_bytes is exhausted + cmpo 0,g14 # check for null byte + stob g14,(g4) # store the byte in dest +#if ! __i960_BIG_ENDIAN__ + shro 8,g1,g1 # move next byte into position for extraction +#endif + lda 1(g4),g4 # post-increment dest byte addr + bne.t Lcase_1_cloop.a # branch if null not reached + b Lcase_1_cloop.b + +Lexit_code: + mov 0,g14 # conform to register conventions + bx (g13) # g0 = addr of dest; g14 = 0 +Lrett: + ret + +Lcase_1_cloop.c: +Lcase_3_cloop.c: +#if __i960_BIG_ENDIAN__ + rotate 24,g5,g5 # move mask into position for testing next byte +#endif + and g5,g1,g14 # extract next char + cmpo 0,g14 # check for null byte +#if ! __i960_BIG_ENDIAN__ + lda (g5),LSW # keep a copy of the current mask + shlo 8,g5,g5 # move mask into position for testing next byte +#endif + bne.t Lcase_1_cloop.c # branch if null not reached +#if __i960_BIG_ENDIAN__ + subo 1,g5,g5 # null pad. + andnot g5,g1,g1 # last bytes to copy, and null pad rest of word +#else + subo 1,LSW,g5 # mask to get last bytes to copy, and null pad + and g5,g1,g1 # last bytes to copy, and null pad rest of word +#endif + st g1,(g4) + +Lcase_1_zwloop: # zero word loop + cmpi g2,4 # check for fewer than four bytes to move + addo 4,g4,g4 # pre-increment dest addr + bl.f Lcase_1_cloop.b # branch if fewer than four bytes to copy + subo 4,g2,g2 # decrease max_byte count by the 4 bytes moved + st g14,(g4) # store word in dest string + b Lcase_1_zwloop + +Lcase_3: # src is word aligned; dest is not + addo 8,g4,g4 # move dest word ptr to first word boundary + lda (g0),g1 # copy dest byte ptr + mov LSW,MSW # make copy of first word of src + lda 32,g14 # initialize shift count to zero (mod 32) + +Lcase_25: +Lcase_3_cloop_at_start: # character copying loop for start of dest str + cmpdeci 0,g2,g2 # is max_bytes exhausted? +#if __i960_BIG_ENDIAN__ + shro 24,MSW,g5 # extract next char +#else + and g5,MSW,g5 # extract next char +#endif + be.f Lexit_code # Lexit if max_bytes is exhausted + cmpo 0,g5 # check for null byte + stob g5,(g1) # store the byte in dest + addo 1,g1,g1 # post-increment dest ptr + lda 0xff,g5 # re-initialize byte extraction mask + bne.t 1f # drop thru if null byte reached (to pad) + movl 0,g6 # blank out remainder of input buffer +1: + cmpo g1,g4 # have we reached word boundary in dest yet? +#if __i960_BIG_ENDIAN__ + lda -8(g14),g14 # augment the shift counter + rotate 8,MSW,MSW # move next byte into position for extraction +#else + lda 8(g14),g14 # augment the shift counter + shro 8,MSW,MSW # move next byte into position for extraction +#endif + bne.t Lcase_3_cloop_at_start # branch if reached word boundary? + + ld (g3),MSW # fetch msw of operand for double shift + +Lcase_4: + +#if __i960_BIG_ENDIAN__ + cmpobne 0,g14,Lcase_3_wloop # branch if src is still unaligned. + +Lcase_3_wloop2: + cmpi g2,4 # less than four bytes to move? + lda (LSW),g1 # extract 4 bytes of src + lda 4(g3),g3 # post-increment src word addr + bl.f Lcase_3_cloop.a # branch if < four bytes left to move + scanbyte 0,g1 # check for null byte + lda (MSW),LSW # move msw to lsw + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + ld (g3),MSW # pre-fetch msw of operand for double shift + bo.f Lcase_3_cloop.c # branch if word contains null byte + st g1,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop2 + +#endif + +Lcase_3_wloop: + cmpi g2,4 # less than four bytes to move? + eshro g14,g6,g1 # extract 4 bytes of src + lda 4(g3),g3 # post-increment src word addr + bl.f Lcase_3_cloop.a # branch if < four bytes left to move + scanbyte 0,g1 # check for null byte + lda (MSW),LSW # move msw to lsw + subi 4,g2,g2 # decrease max_byte count by the 4 bytes moved + ld (g3),MSW # pre-fetch msw of operand for double shift + bo.f Lcase_3_cloop.c # branch if word contains null byte + st g1,(g4) # store 4 bytes to dest + addo 4,g4,g4 # post-increment dest ptr + b Lcase_3_wloop + +Lcase_245: + cmpo g0,g4 # check alignment of dest + ld (g3),MSW # pre-fetch second half + and 3,g1,g1 # compute shift count + lda 0xff,g5 # load mask for byte extraction +#if __i960_BIG_ENDIAN__ + subo g1,4,g14 # adjust shift count for big endian. + shlo 3,g14,g14 +#else + shlo 3,g1,g14 +#endif + be.t Lcase_4 # branch if dest is word aligned + or g4,g1,g1 # is src earlier in word, later, or sync w/ dst + cmpo g0,g1 # < indicates first word of dest has more bytes + /* than first word of source. */ + lda 4(g4),g4 # move dest word addr to first word boundary + eshro g14,g6,g5 # extract four bytes + lda (g0),g1 + bg.f 1f + mov MSW,LSW + lda 4(g3),g3 # move src word addr to second word boundary +1: + mov g5,MSW + lda 0xff,g5 + b Lcase_25 + +/* end of strncpy */ + diff --git a/newlib/libc/machine/i960/strpbrk.S b/newlib/libc/machine/i960/strpbrk.S new file mode 100644 index 0000000..bae909f --- /dev/null +++ b/newlib/libc/machine/i960/strpbrk.S @@ -0,0 +1,100 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + +/* + * (c) copyright 1989,1993 Intel Corp., all rights reserved + */ + +/* + procedure strpbrk (optimized assembler version: 80960K series, 80960CA) + + char_addr = strpbrk (string, brkset_string) + + Return the address of the first character in string that is NOT + in the brkset_string. Return NULL if none exists. + + At the time of this writing, only g0 thru g7 and g13 are available + for use in this leafproc; other registers would have to be saved and + restored. These nine registers, plus tricky use of g14 are sufficient + to implement the routine. + + This routine stays out of g3 and g4 altogether. They may be used by + the strtok routine, which calls this routine in an incestuous way. +*/ +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif + + .file "strprk.s" + .globl _strpbrk + .globl __strpbrk + .leafproc _strpbrk, __strpbrk + .align 2 + +_strpbrk: +#ifdef __PIC + lda Lrett-(.+8)(ip),g14 + b __strpbrk +#else + lda Lrett,g14 + b __strpbrk +#endif + +Lrett: ret + +__strpbrk: + +Lnext_char_strpbrk: + addo 1,g1,g2 # g2 will be the brkset ptr + ldob (g0),g7 # fetch next character of string + ldob (g1),g6 # fetch first character of brkset + cmpobe.f 0,g7,Lexit_char_not_found # quit if at end of string +Lscan_set_strpbrk: + cmpo g6,g7 # is brkset char equal to string char? + ldob (g2),g5 # fetch next brkset char + addo 1,g2,g2 # bump brkset ptr + be.f Lexit_char_found + cmpo g6,0 # is brkset_string exhausted? + lda (g5),g6 + bne.t Lscan_set_strpbrk # check next character of brkset + addo 1,g0,g0 # check next character of string + b Lnext_char_strpbrk + +Lexit_char_not_found: + mov 0,g0 # return null if brkset char not found in string +Lexit_char_found: + mov g14,g13 # save return address + lda 0,g14 # conform to register conventions + bx (g13) + +/* end of strpbrk */ diff --git a/newlib/libc/machine/i960/strrchr.S b/newlib/libc/machine/i960/strrchr.S new file mode 100644 index 0000000..96fe5c2 --- /dev/null +++ b/newlib/libc/machine/i960/strrchr.S @@ -0,0 +1,137 @@ +/******************************************************************************* + * + * Copyright (c) 1993 Intel Corporation + * + * Intel hereby grants you permission to copy, modify, and distribute this + * software and its documentation. Intel grants this permission provided + * that the above copyright notice appears in all copies and that both the + * copyright notice and this permission notice appear in supporting + * documentation. In addition, Intel grants this permission provided that + * you prominently mark as "not part of the original" any modifications + * made to this software or documentation, and that the name of Intel + * Corporation not be used in advertising or publicity pertaining to + * distribution of the software or the documentation without specific, + * written prior permission. + * + * Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR + * IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY + * OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or + * representations regarding the use of, or the results of the use of, + * the software and documentation in terms of correctness, accuracy, + * reliability, currentness, or otherwise; and you rely on the software, + * documentation and results solely at your own risk. + * + * IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, + * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES + * OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM + * PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. + * + ******************************************************************************/ + + .file "strrchr.s" +#ifdef __i960_BIG_ENDIAN__ +#error "This does not work in big-endian" +#endif + +#ifdef __PIC + .pic +#endif +#ifdef __PID + .pid +#endif + +/* + * (c) copyright 1988,1993 Intel Corp., all rights reserved + */ + +/* + procedure strrchr (optimized assembler version for the 80960K series) + + src_addr = strrchr (src_addr, char) + + return a pointer to the last byte that contains the indicated + byte in the source string. Return null if the byte is not found. + + Undefined behavior will occur if the end of the source string (i.e. + the terminating null byte) is in the last two words of the program's + allocated memory space. This is so because strrchr fetches ahead. + Disallowing the fetch ahead would impose a severe performance penalty. + + Strategy: + + Fetch the source string by words and scanbyte the words for the + char until either a word with the byte is found or the null byte is + encountered. In the former case, move through the word to find the + matching byte and save its memory address, then continue the search. + In the latter case, return the saved address, or zero (null) if none + was ever found to save. + + Tactics: + + 1) Do NOT try to fetch the words in a word aligned manner because, + in my judgement, the performance degradation experienced due to + non-aligned accesses does NOT outweigh the time and complexity added + by the preamble that would be necessary to assure alignment. This + is supported by the intuition that most source arrays (even more + true of most big source arrays) will be word aligned to begin with. +*/ + + .globl _strrchr + .globl __strrchr + .leafproc _strrchr, __strrchr + .align 2 +_strrchr: +#ifdef __PIC + lda Lrett-(.+8)(ip),g14 +#else + lda Lrett,g14 +#endif +__strrchr: + + ld (g0),g4 # fetch first word + lda 0xff,g7 # byte extraction mask + and g1,g7,g1 # make char an 8-bit ordinal + shlo 8,g1,g2 # broadcast the char to four bytes + or g1,g2,g2 + shlo 16,g2,g5 + or g2,g5,g3 + mov g14,g13 # preserve return address + addo 4,g0,g2 # post-increment src pointer + mov 1,g0 # prepare to return null pointer + mov g3,g6 # prepare to return null pointer + +Lsearch_for_word_with_char_or_null: + mov g4,g5 # copy word + scanbyte 0,g5 # check for null byte + ld (g2),g4 # fetch next word of src + bo Lword_has_null # branch if null found + scanbyte g3,g5 # check for byte with char + addo 4,g2,g2 # post-increment src pointer + bno Lsearch_for_word_with_char_or_null # branch if no copy of char + mov g5,g6 # save word that has char in it (at least once) + subo 4,g2,g0 # save addr of byte after word with char + b Lsearch_for_word_with_char_or_null + +Lword_has_null: + subo 4,g2,g2 # move src pointer back to word with null +Lfind_null: + addo 1,g2,g2 # advance src pointer to byte after current + and g7,g5,g14 # extract next byte + cmpo g1,g14 # is current byte char? + shro 8,g5,g5 # position next byte for extraction + bne 1f # skip if not char sought after + mov g2,g0 # save addr of byte after char + mov g3,g6 # save word of all char to short circuit search +1: cmpobne 0,g14,Lfind_null # is current byte null? + +Lfind_last_char: + rotate 8,g6,g6 # position next highest byte + and g7,g6,g5 # extract byte + subo 1,g0,g0 # move pointer to that byte (or nullify) + cmpobne g5,g1,Lfind_last_char # branch if not at char + + bx (g13) # g0 = addr of char in src (or null); g14 = 0 +Lrett: + ret + +/* end of strrchr */ |