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path: root/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
AgeCommit message (Expand)AuthorFilesLines
2020-01-28[PowerPC][Future] Add pld and pstd to future CPUVictor Huang1-0/+29
2020-01-24[PowerPC][Future] Add prefixed instruction paddi to future CPUVictor Huang1-2/+32
2020-01-14CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2020-01-11[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song1-3/+1
2019-09-12[PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC re...Craig Topper1-6/+0
2019-06-27[PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and othersJinsong Ji1-6/+0
2019-06-11Revert CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2019-06-10CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2019-05-15[PowerPC] Create a TargetInfo header. NFCRichard Trieu1-0/+1
2019-02-12[PowerPC] Fix printing of negative offsets in call instruction dissasembly.Sean Fertile1-0/+8
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-12-29[PowerPC][NFC] Macro for register set defs for the Asm ParserNemanja Ivanovic1-191/+18
2018-09-10[Target] Untangle disassemblersBenjamin Kramer1-1/+1
2018-07-18Introduce codegen for the Signal Processing EngineJustin Hibbits1-0/+23
2018-07-18Complete the SPE instruction set patternsJustin Hibbits1-0/+50
2017-05-11[PPC] Change the register constraint of the first source operand of instructi...Guozhi Wei1-0/+17
2016-10-09Move the global variables representing each Target behind accessor functionMehdi Amini1-3/+3
2016-10-04[Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic1-8/+25
2016-04-28This reverts commit r265505.Kit Barton1-6/+0
2016-04-06[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu...Chuang-Yu Cheng1-0/+6
2016-03-08[Power9] Implement new vsx instructions: load, store instructions for vector ...Kit Barton1-0/+15
2016-01-26Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer1-1/+1
2015-08-11Explicitly clear the MI operand list when getInstruction() is called. Call M...Cameron Esfahani1-2/+0
2015-07-15[PPC] Disassemble little endian ppc instructions in the right byte orderBenjamin Kramer1-8/+17
2015-05-26Use std::bitset for SubtargetFeatures.Michael Kuperstein1-1/+1
2015-05-13MC: Modernize MCOperand API naming. NFC.Jim Grosbach1-12/+12
2015-05-13Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein1-1/+1
2015-05-13Use std::bitset for SubtargetFeaturesMichael Kuperstein1-1/+1
2015-05-07Add VSX Scalar loads and stores to the PPC back endNemanja Ivanovic1-0/+26
2015-04-11Use 'override/final' instead of 'virtual' for overridden methodsAlexander Kornienko1-1/+1
2015-03-25Add Hardware Transactional Memory (HTM) SupportKit Barton1-0/+6
2015-03-24Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein1-1/+1
2015-03-24Use std::bitset for SubtargetFeaturesMichael Kuperstein1-1/+1
2015-02-25[PowerPC] Add support for the QPX vector instruction setHal Finkel1-0/+29
2014-11-12Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola1-5/+3
2014-11-10Misc style fixes. NFC.Rafael Espindola1-13/+9
2014-09-03Add override to overriden virtual methods, remove virtual keywords.Benjamin Kramer1-6/+4
2014-04-21[Modules] Make Support/Debug.h modular. This requires it to not changeChandler Carruth1-0/+2
2014-04-15[MC] Require an MCContext when constructing an MCDisassembler.Lang Hames1-4/+5
2014-03-29[PowerPC] Add subregister classes for f64 VSX valuesHal Finkel1-0/+26
2014-03-13[PowerPC] Initial support for the VSX instruction setHal Finkel1-0/+26
2014-03-02Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper1-1/+1
2013-12-19Add a disassembler to the PowerPC backendHal Finkel1-0/+293
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