aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-12-10AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault1-25/+119
2016-11-29AMDGPU: Disallow exec as SMEM instruction operandMatt Arsenault1-4/+9
2016-11-15AMDGPU: Replace assert(false) with unreachableMatt Arsenault1-3/+11
2016-11-01AMDGPU: Whitespace fixesMatt Arsenault1-3/+3
2016-10-09Move the global variables representing each Target behind accessor functionMehdi Amini1-2/+4
2016-10-06[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton1-0/+58
2016-09-26Revert "[AMDGPU] Disassembler: print label names in branch instructions"Sam Kolton1-58/+0
2016-09-26[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton1-0/+58
2016-07-19AMDGPU: Expand register indexing pseudos in custom inserterMatt Arsenault1-0/+5
2016-06-10AMDGPU: Fix trailing whitespaceMatt Arsenault1-1/+1
2016-06-09[AMDGPU] Disassembler: Support for sdwa instructionsSam Kolton1-1/+5
2016-05-26Fix build warning introduced in r270552 "[AMDGPU][llvm-mc] Disassembler: supp...Artem Tamazov1-1/+2
2016-05-24[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.Artem Tamazov1-42/+82
2016-04-29Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov1-5/+6
2016-04-27Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier1-6/+0
2016-04-27[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov1-0/+6
2016-03-31[AMDGPU] Disassembler: support for DPPSam Kolton1-7/+19
2016-03-10[AMDGPU] Fix SMEM instructions encoding/operand namingsValery Pykhtin1-0/+2
2016-03-04test commitValery Pykhtin1-1/+1
2016-03-01[AMDGPU] Remove unused disassembler code.Nikolay Haustov1-2/+0
2016-03-01[AMDGPU] Fix build warnings.Nikolay Haustov1-2/+2
2016-03-01[AMDGPU] Disassembler code refactored + error messages.Nikolay Haustov1-346/+266
2016-02-25[AMDGPU] Disassembler: Support for all VOP1 instructions.Nikolay Haustov1-49/+206
2016-02-18[AMDGPU] Disassembler: Added basic disassembler for AMDGPU targetTom Stellard1-0/+302