aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-09-09AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton1-142/+365
2016-09-09[AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton1-23/+64
2016-08-16AMDGPU: Remove excessive padding from ImmOp and RegOp.Matt Arsenault1-4/+4
2016-07-14[AMDGPU] Assembler: fix row_bcast parsingSam Kolton1-0/+2
2016-07-11[AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.Artem Tamazov1-0/+2
2016-07-05[AMDGPU] Assembler: Fix parsing error with floating-point literals passed to ...Sam Kolton1-6/+1
2016-07-01[AMDGPU] Assembler: support SDWA for VOPC instructionsSam Kolton1-7/+30
2016-06-23[AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields.Valery Pykhtin1-4/+1
2016-06-21Delete more dead code.Rafael Espindola1-46/+0
2016-06-21Delete some dead code.Rafael Espindola1-5/+0
2016-06-15AMDGPU/AsmParser: Add support for parsing symbol operandsTom Stellard1-2/+46
2016-06-14[AMDGPU][llvm-mc] Predefined symbols to access -mcpu from the assembly source...Artem Tamazov1-2/+15
2016-06-10[AMDGPU] AsmParser: Support for sext() modifier in SDWA. Some code cleaning i...Sam Kolton1-187/+245
2016-06-10AMDGPU: Fix trailing whitespaceMatt Arsenault1-17/+17
2016-06-03[test/AMDGPU] Square-braced-syntax for registers: add macro test/example.Artem Tamazov1-19/+45
2016-06-03[AMDGPU] Assembler: Custom converters for SDWA instructions. Support for _dpp...Sam Kolton1-54/+154
2016-05-27[AMDGPU][llvm-mc] Square-braced-syntax for registers - make ":expr2" optional.Artem Tamazov1-6/+10
2016-05-26[AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.Artem Tamazov1-86/+38
2016-05-24[AMDGPU] Assembler: rework parsing of optional operands.Sam Kolton1-280/+84
2016-05-23[AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modif...Sam Kolton1-175/+244
2016-05-19[AMDGPU][llvm-mc] Fixes to support buffer atomics.Artem Tamazov1-5/+81
2016-05-06[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.Artem Tamazov1-0/+239
2016-05-06[TableGen] AsmMatcher: support for default values for optional operandsSam Kolton1-100/+111
2016-05-05AMDGPU/SI: Add support for AMD code object version 2.Tom Stellard1-1/+1
2016-04-29Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov1-1/+2
2016-04-29AMDGPU/SI: Assembler: Unify parsing/printing of operands.Nikolay Haustov1-238/+224
2016-04-27Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier1-2/+1
2016-04-27Silence a -Wdangling-elseReid Kleckner1-1/+2
2016-04-27[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov1-1/+2
2016-04-27[AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware regis...Artem Tamazov1-9/+28
2016-04-26[AMDGPU] Assembler: basic support for SDWA instructionsSam Kolton1-0/+112
2016-04-25[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.Artem Tamazov1-0/+94
2016-04-21[AMDGPU] Assembler: prevent parseDPPCtrlOps from eating invalid tokensSam Kolton1-2/+14
2016-04-20AMDGPU/SI: Assembler: improvements to support trap handlers.Nikolay Haustov1-69/+123
2016-04-18[NFC] Header cleanupMehdi Amini1-1/+0
2016-04-13[AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)gi...Artem Tamazov1-21/+34
2016-03-18[AMDGPU] Assembler: Change dpp_ctrl syntax to match sp3Sam Kolton1-46/+88
2016-03-14[AMDGPU] AsmParser: Factor out parseRegister. NFC.Valery Pykhtin1-24/+40
2016-03-14[AMDGPU] AsmParser: refactor post push_back vector access. NFC.Valery Pykhtin1-6/+5
2016-03-14[AMDGPU] AsmParser: remove redundant isReg checks. NFC.Valery Pykhtin1-7/+7
2016-03-09[AMDGPU] Assembler: Support DPP instructions.Sam Kolton1-5/+175
2016-03-09[AMDGPU] Assembler: Support abs() syntax.Nikolay Haustov1-2/+19
2016-03-06[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.Valery Pykhtin1-157/+6
2016-03-04Test commit accessSam Kolton1-1/+1
2016-03-04AMDGPU/SI: add llvm.amdgcn.image.atomic.* intrinsicsNikolay Haustov1-3/+47
2016-03-02Revert "[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembl...Nikolay Haustov1-6/+157
2016-03-02[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.Nikolay Haustov1-157/+6
2016-03-01[TableGen] AsmMatcher: Skip optional operands in the midle of instruction if ...Nikolay Haustov1-18/+11
2016-02-26[AMDGPU] Assembler: Basic support for MIMGNikolay Haustov1-6/+70
2016-02-25[AMDGPU] Assembler: Simplify handling of optional operandsNikolay Haustov1-72/+59
generated by cgit v1.1 at 2025-10-16 14:17:19 +0000