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path: root/llvm/lib/CodeGen/TargetPassConfig.cpp
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2021-08-18[SampleFDO] Flow Sensitive Sample FDO (FSAFDO) profile loaderRong Xu1-2/+54
2021-08-11[SampleFDO] Add two passes of MIRAddFSDiscriminatorsPassRong Xu1-0/+9
2021-07-14[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEsDjordje Todorovic1-0/+2
2021-07-13RegAlloc: Allow targets to split register allocationMatt Arsenault1-2/+2
2021-07-07[AMDGPU] Disable garbage collection passesStanislav Mekhanoshin1-2/+2
2021-06-02[SampleFDO] New hierarchical discriminator for FS SampleFDO (ProfileData part)Rong Xu1-2/+6
2021-05-31Remove "Rewrite Symbols" from codegen pipelineArthur Eubanks1-1/+0
2021-05-18[SampleFDO] New hierarchical discriminator for Flow Sensitive SampleFDORong Xu1-0/+14
2021-05-08[X86] Support AMX fast register allocationXiang1 Zhang1-0/+4
2021-05-08Revert "[X86] Support AMX fast register allocation"Xiang1 Zhang1-4/+0
2021-05-08[X86] Support AMX fast register allocationXiang1 Zhang1-0/+4
2021-05-04Recommit "[VP,Integer,#2] ExpandVectorPredication pass"Simon Moll1-0/+5
2021-04-30Revert "[VP,Integer,#2] ExpandVectorPredication pass"Adrian Prantl1-5/+0
2021-04-30[VP,Integer,#2] ExpandVectorPredication passSimon Moll1-0/+5
2021-04-29Revert "[X86] Support AMX fast register allocation"Benjamin Kramer1-4/+0
2021-04-25[X86] Support AMX fast register allocationXiang1 Zhang1-0/+4
2021-04-10Revert "Remove "Rewrite Symbols" from codegen pipeline"Arthur Eubanks1-0/+1
2021-04-10Remove "Rewrite Symbols" from codegen pipelineArthur Eubanks1-1/+0
2021-03-01Move EntryExitInstrumentation pass locationArthur Eubanks1-3/+0
2021-02-12[CodeGen] New pass: Replace vector intrinsics with call to vector libraryLukas Sommer1-0/+3
2021-02-11[CodeGen] Basic block sections should take precendence over splitting.Snehasish Kumar1-5/+7
2021-02-05Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics wi...Sanjay Patel1-3/+0
2021-02-05[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls...Lukas Sommer1-0/+3
2021-01-07CodeGen: Refactor regallocator command line and target selectionMatt Arsenault1-10/+10
2020-12-29Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen p...Yuanfang Chen1-10/+151
2020-12-29Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build c...Yuanfang Chen1-151/+10
2020-12-29Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen p...Yuanfang Chen1-10/+151
2020-12-28Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen p...Yuanfang Chen1-151/+10
2020-12-28[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipelineYuanfang Chen1-10/+151
2020-12-16[Debugify] Support checking Machine IR debug infoXiang1 Zhang1-3/+20
2020-12-16Revert "[Debugify] Support checking Machine IR debug info"Xiang1 Zhang1-20/+3
2020-12-16[Debugify] Support checking Machine IR debug infoXiang1 Zhang1-3/+20
2020-12-14Revert "[Debugify] Support checking Machine IR debug info"Nico Weber1-20/+3
2020-12-14[Debugify] Support checking Machine IR debug infoXiang1 Zhang1-3/+20
2020-12-14Revert "[Debugify] Support checking Machine IR debug info"Xiang1 Zhang1-20/+3
2020-12-14[Debugify] Support checking Machine IR debug infoXiang1 Zhang1-3/+20
2020-12-08[ScalarizeMaskedMemIntrin] Add new PM supportAnna Thomas1-1/+1
2020-12-02[CSSPGO] Pseudo probes for function calls.Hongtao Yu1-0/+4
2020-12-02[XCOFF][AIX] Generate LSDA data and compact unwind section on AIXjasonliu1-0/+1
2020-10-16[GlobalISel] Add translation support for vector reduction intrinsics.Amara Emerson1-1/+8
2020-09-21TargetPassConfig.cpp - use auto const& iterator in for-range loop to avoid co...Simon Pilgrim1-1/+1
2020-09-11Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen p...Yuanfang Chen1-151/+10
2020-09-11[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipelineYuanfang Chen1-10/+151
2020-08-28[llvm][CodeGen] Machine Function SplitterSnehasish Kumar1-1/+13
2020-08-06[NFC] Rename BBSectionsPrepare -> BasicBlockSections.Snehasish Kumar1-1/+1
2020-07-23[CodeGen][TargetPassConfig] Add unreachable-mbb-elimination pass explicitlyEvgeny Leviant1-0/+5
2020-07-20[llc] (almost) remove `--print-machineinstrs`Yuanfang Chen1-40/+18
2020-07-18[CodeGen][TargetPassConfig] Add TargetTransformInfo pass correctlyEvgeny Leviant1-1/+1
2020-07-06[NFC] change getLimitedCodeGenPipelineReason to static functionYuanfang Chen1-1/+1
2020-05-28[TargetPassConfig] Add CanonicalizeFreezeInLoops before LSRJuneyoung Lee1-0/+1
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