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path: root/llvm/lib/CodeGen/MachineVerifier.cpp
AgeCommit message (Expand)AuthorFilesLines
2018-02-28[GlobalISel] Print/Parse FailedISel MachineFunction propertyRoman Tereshin1-5/+9
2018-02-23[MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry1-7/+3
2018-02-09[GISel]: Verify COPIES involving generic registers.Aditya Nandakumar1-0/+30
2018-01-29[MachineVerifier] Add check that renamable operands aren't reserved registers.Geoff Berry1-6/+8
2017-12-18LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFCMatthias Braun1-1/+1
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-2/+2
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun1-1/+1
2017-12-12[MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry1-0/+8
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih1-1/+1
2017-12-04MachineVerifier: undef phi arg doesn't need to be live-out from predecessorMatthias Braun1-1/+2
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih1-24/+23
2017-11-30[CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih1-5/+5
2017-11-30[CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih1-1/+1
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-6/+6
2017-11-28MachineVerifier: Improve register operand checksMatthias Braun1-78/+81
2017-11-28MachineVerifier: Improve PHI operand checkingMatthias Braun1-28/+54
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-3/+3
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie1-1/+1
2017-10-12Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun1-2/+4
2017-10-12TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun1-4/+2
2017-09-11[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko1-30/+60
2017-09-01LiveIntervalAnalysis: Fix alias regunit reserved definitionMatthias Braun1-0/+2
2017-08-23[GISEl]: Translate phi into G_PHIAditya Nandakumar1-0/+17
2017-07-06[MachineVerifier] Add check that tied physregs aren't different.Mikael Holmen1-0/+8
2017-06-08RegAllocPBQP: Do not assign reserved physical registerMatthias Braun1-4/+5
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth1-1/+1
2017-06-02Verify a couple more fields in STATEPOINT instructionsPhilip Reames1-0/+14
2017-06-02Add placeholder for more extensive verification of psuedo opsPhilip Reames1-8/+21
2017-05-26MachineVerifier: Remove unused set; NFCMatthias Braun1-5/+0
2017-05-17BitVector: add iterators for set bitsFrancis Visoiu Mistrih1-1/+1
2017-05-09Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov1-2/+2
2017-05-05ARM: Compute MaxCallFrame size earlyMatthias Braun1-3/+5
2017-04-20Do not run frame verification if target does not use frame instructionsSerge Pavlov1-0/+2
2017-04-13Use methods to access data stored with frame instructionsSerge Pavlov1-11/+2
2017-04-11MIR: Allow parsing of empty machine functionsJustin Bogner1-2/+4
2017-03-29[MachineVerifier] Drop a spurious constSven van Haastregt1-1/+1
2017-03-29[MachineVerifier] Avoid reference to nullptrSven van Haastregt1-2/+2
2017-02-17GlobalISel: verify that generic loads & stores have a mem operand.Tim Northover1-0/+8
2017-02-15Fix typosMatt Arsenault1-1/+1
2017-01-05CodeGen: Assert that liveness is up to date when reading block live-ins.Matthias Braun1-8/+10
2016-12-22[GlobalISel] More fix for the size vs. type typo. NFC.Quentin Colombet1-1/+1
2016-12-22[MachineVerifier] Check that even generic vregs comply to regclass constraints.Quentin Colombet1-0/+15
2016-12-16Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek1-10/+10
2016-12-15Extract LaneBitmask into a separate typeKrzysztof Parzyszek1-25/+27
2016-11-30Clarify rules for reserved regs, fix aarch64 ones.Matthias Braun1-10/+0
2016-10-05Modify df_iterator to support post-order actionsDavid Callahan1-2/+2
2016-09-15GlobalISel: remove "unsized" LLTTim Northover1-1/+1
2016-09-09GlobalISel: remove G_TYPE and G_PHITim Northover1-2/+1
2016-09-09GlobalISel: move type information to MachineRegisterInfo.Tim Northover1-12/+24
2016-09-03ADT: Remove external uses of ilist_iterator, NFCDuncan P. N. Exon Smith1-5/+2
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