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path: root/llvm/lib/CodeGen/MachineInstr.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-08-15[llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere1-1/+1
2019-08-06CodeGen: Migration to using RegisterMatt Arsenault1-29/+29
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-17/+15
2019-06-05Allow target to handle STRICT floating-point nodesUlrich Weigand1-1/+3
2019-06-02[X86] Fix several places that weren't passing what they though they were to M...Craig Topper1-1/+1
2019-05-20[DebugInfoMetadata] Refactor DIExpression::prepend constants (NFC)Petar Jovanovic1-1/+1
2019-04-24Recommitting r358783 and r358786 "[MS] Emit S_HEAPALLOCSITE debug info" with ...Amy Huang1-0/+13
2019-04-19[CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson1-2/+2
2019-03-19Allow unordered loads to be considered invariant in CodeGenPhilip Reames1-3/+5
2019-03-14Allow code motion (and thus folding) for atomic (but unordered) memory operandsPhilip Reames1-3/+1
2019-02-20[NFC] add/modify wrapper function for findRegisterDefOperand().Chen Zheng1-1/+1
2019-02-11Be conservative about unordered accesses for the momentPhilip Reames1-1/+3
2019-02-06Move IR flag handling directly into builder calls for cases translated from I...Michael Berg1-11/+18
2019-02-04[DEBUGINFO] Reposting r352642: Handle restore instructions in LiveDebugValuesWolfgang Pieb1-1/+53
2019-02-01[CodeGen] Be as conservative about atomic accesses as for volatilePhilip Reames1-0/+2
2019-01-30Reverting r352642 - Handle restore instructions in LiveDebugValues - as it's ...Wolfgang Pieb1-53/+1
2019-01-30[DEBUGINFO] Handle restore instructions in LiveDebugValuesWolfgang Pieb1-1/+53
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2019-01-17[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25Vladimir Stefanovic1-2/+3
2018-11-12Fix MachineInstr::findRegisterUseOperandIdx subreg checksStanislav Mekhanoshin1-3/+1
2018-10-01[DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal.Carlos Alberto Enciso1-0/+10
2018-09-26[CodeGen] Always print register ties in MI::dump()Francis Visoiu Mistrih1-1/+1
2018-09-19Copy utilities updated and added for MI flagsMichael Berg1-0/+36
2018-09-13[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operand...Craig Topper1-2/+4
2018-09-11add IR flags to MIMichael Berg1-0/+6
2018-09-06Fix argument type in MachineInstr::hasPropertyInBundleSven van Haastregt1-1/+1
2018-08-30[DWARF] Missing location debug information with -O2.Carlos Alberto Enciso1-0/+17
2018-08-20Consistently use MemoryLocation::UnknownSize to indicate unknown access sizeKrzysztof Parzyszek1-7/+14
2018-08-16[x86/MIR] Implement support for pre- and post-instruction symbols, asChandler Carruth1-25/+67
2018-08-16[MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth1-55/+161
2018-06-21[DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug propertyMikael Holmen1-12/+34
2018-06-18[NFC] make MIFlag accessor functions consistant with usage modelMichael Berg1-1/+1
2018-06-12[MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs()Roman Tereshin1-6/+24
2018-05-09[DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen1-3/+4
2018-05-09[DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr.Shiva Chen1-0/+16
2018-05-07[MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all v...Roman Tereshin1-2/+6
2018-05-03MachineInst support mapping SDNode fast math flags for support in Back End co...Michael Berg1-0/+14
2018-04-30IWYU for llvm-config.h in llvm, additions.Nico Weber1-0/+1
2018-04-24[CodeGen] Print user-friendly debug locations as MI commentsFrancis Visoiu Mistrih1-1/+14
2018-04-10[CodeGen] Fix printing bundles in MIR outputKrzysztof Parzyszek1-3/+5
2018-03-14[CodeGen] Use MIR syntax for MachineMemOperand printingFrancis Visoiu Mistrih1-10/+18
2018-03-14[AArch64] Keep track of MIFlags in the LoadStoreOptimizerFrancis Visoiu Mistrih1-0/+6
2018-03-13[MIR] Allow frame-setup and frame-destroy on the same instructionFrancis Visoiu Mistrih1-1/+1
2018-02-26The final step to close D41278 [MachineCombiner] Improve debug output (NFC).Andrew V. Tischenko1-0/+2
2018-02-23[MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry1-5/+1
2018-02-19Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasic...Francis Visoiu Mistrih1-0/+2
2018-02-08[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::p...Francis Visoiu Mistrih1-2/+0
2018-01-29[AMDGPU][X86][Mips] Make sure renamable bit not set for reserved regsGeoff Berry1-3/+6
2018-01-19[CodeGen] Unify printing format of debug-location in both MIR and -debugFrancis Visoiu Mistrih1-7/+12
2018-01-18[CodeGen][NFC] Rename IsVerbose to IsStandalone in Machine*::printFrancis Visoiu Mistrih1-7/+7
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