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path: root/llvm/lib/CodeGen/MIRParser/MIParser.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-08-13GlobalISel: Change representation of shuffle masksMatt Arsenault1-0/+46
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-5/+5
2019-06-05Allow target to handle STRICT floating-point nodesUlrich Weigand1-1/+4
2019-05-09Make sub-registers index names case sensitive in the MIRParserMarkus Lavin1-1/+1
2019-04-30[DebugInfo] DW_OP_deref_size in PrologEpilogInserter.Markus Lavin1-0/+5
2019-04-12Revert r358268 "[DebugInfo] DW_OP_deref_size in PrologEpilogInserter."Hans Wennborg1-5/+0
2019-04-12[DebugInfo] DW_OP_deref_size in PrologEpilogInserter.Markus Lavin1-0/+5
2019-03-14MIR: Allow targets to serialize MachineFunctionInfoMatt Arsenault1-1/+1
2019-03-12MIR: Stop reinitializing target information for every useMatt Arsenault1-257/+253
2019-02-04MIR: Validate LLT types when parsingMatt Arsenault1-6/+35
2019-01-30MIR: Reject non-power-of-4 alignments in MMO parsingMatt Arsenault1-0/+4
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-12-18[AArch64] - Return address signing dwarf supportLuke Cheeseman1-0/+4
2018-12-13[mir] Fix uninitialized variable in r349035 noticed by clang-atom-d525-fedora...Daniel Sanders1-1/+1
2018-12-13[mir] Serialize DILocation inline when not possible to use a metadata referenceDaniel Sanders1-4/+115
2018-11-23Revert r347490 as it breaks address sanitizer buildsLuke Cheeseman1-4/+0
2018-11-23Revert r343341Luke Cheeseman1-0/+4
2018-10-30MachineOperand/MIParser: Do not print debug-use flag, infer itMatthias Braun1-0/+2
2018-10-01MIRParser: Check that instructions only reference DILocation metadataMatthias Braun1-0/+2
2018-09-28Revert r343317Luke Cheeseman1-4/+0
2018-09-28Reapply changes reverted by r343235Luke Cheeseman1-0/+4
2018-09-27Revert r343192 as an ubsan build is currently failingLuke Cheeseman1-4/+0
2018-09-27Reapply changes reverted in r343114, lldb patch to follow shortlyLuke Cheeseman1-0/+4
2018-09-26Revert r343112 as CallFrameString API change has broken lldb buildsLuke Cheeseman1-4/+0
2018-09-26[AArch64] - Return address signing dwarf supportLuke Cheeseman1-0/+4
2018-09-26Revert r343089 "[AArch64] - Return address signing dwarf support"Hans Wennborg1-4/+0
2018-09-26[AArch64] - Return address signing dwarf supportLuke Cheeseman1-0/+4
2018-09-11add IR flags to MIMichael Berg1-1/+10
2018-08-20Consistently use MemoryLocation::UnknownSize to indicate unknown access sizeKrzysztof Parzyszek1-6/+13
2018-08-16[x86/MIR] Implement support for pre- and post-instruction symbols, asChandler Carruth1-4/+63
2018-08-16[MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth1-4/+1
2018-07-26CodeGen: Cleanup regmask construction; NFCMatthias Braun1-6/+2
2018-07-16[CodeGen] Fix inconsistent declaration parameter nameFangrui Song1-2/+2
2018-06-19[MIRParser] Update a diagnostic message to use the correct register sigil. NFCMatt Davis1-1/+1
2018-06-05[MIRParser] Add parser support for 'true' and 'false' i1s.Amara Emerson1-2/+5
2018-05-08[MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>)Roman Tereshin1-13/+20
2018-05-05[MIRPraser] Improve error checking for typed immediate operandsHeejin Ahn1-6/+13
2018-05-05[MIRParser] Allow register class names in the form of integer/scalarHeejin Ahn1-7/+18
2018-05-03MachineInst support mapping SDNode fast math flags for support in Back End co...Michael Berg1-6/+29
2018-03-30[MIR] Adding support for Named Virtual Registers in MIR.Puyan Lotfi1-0/+26
2018-03-13[MIR] Allow frame-setup and frame-destroy on the same instructionFrancis Visoiu Mistrih1-5/+7
2018-01-26[MIR] Add support for addrspace in MIRFrancis Visoiu Mistrih1-0/+16
2018-01-09[MIR] Add support for the frame-destroy MachineInstr flagFrancis Visoiu Mistrih1-0/+3
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-11/+11
2017-12-15[MIR] Add support for missing CFI directivesFrancis Visoiu Mistrih1-0/+67
2017-12-13Remove redundant includes from lib/CodeGen.Michael Zolotukhin1-1/+0
2017-12-12[MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry1-1/+6
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih1-0/+2
2017-11-28[mir] Print/Parse both MOLoad and MOStore when they occur together.Daniel Sanders1-1/+11
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-2/+2
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