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2023-11-07Reland "[lldb] Add template method for getting const or mutable regs from ↵David Spickett1-1/+3
DynamicRegisterInfo (#71402)" This reverts commit 75b195cc4cee8d6f3216b7602f8247f5888a47af. I've moved the specialisations out of the class to fix the g++ compilation.
2023-11-07Revert "[lldb] Add template method for getting const or mutable regs from ↵David Spickett1-3/+1
DynamicRegisterInfo (#71402)" This reverts commit 4989c62b318229bff2643c244ebbd03c20e2f781 as it fails to build with g++.
2023-11-07[lldb] Add template method for getting const or mutable regs from ↵David Spickett1-1/+3
DynamicRegisterInfo (#71402) GDBRemoteRegisterContext only needs to iterate them, ArchitectureAArch64 needs to mutate them if scalable registers change size.
2023-11-06[lldb][AArch64] Move register info reconfigure into architecture plugin (#70950)David Spickett1-87/+26
This removes AArch64 specific code from the GDB* classes. To do this I've added 2 new methods to Architecture: * RegisterWriteCausesReconfigure to check if what you are about to do will trash the register info. * ReconfigureRegisterInfo to do the reconfiguring. This tells you if anything changed so that we only invalidate registers when needed. So that ProcessGDBRemote can call ReconfigureRegisterInfo in SetThreadStopInfo, I've added forwarding calls to GDBRemoteRegisterContext and the base class RegisterContext. (which removes a slightly sketchy static cast as well) RegisterContext defaults to doing nothing for both the methods so anything other than GDBRemoteRegisterContext will do nothing.
2023-11-02[lldb][AArch64] Simplify handing of scalable registers using vg and svg (#70914)David Spickett1-12/+5
This removes explicit invalidation of vg and svg that was done in `GDBRemoteRegisterContext::AArch64Reconfigure`. This was in fact covering up a bug elsehwere. Register information says that a write to vg also invalidates svg (it does not unless you are in streaming mode, but we decided to keep it simple and say it always does). This invalidation was not being applied until *after* AArch64Reconfigure was called. This meant that without those manual invalidates this happened: * vg is written * svg is not invalidated * Reconfigure uses the written vg value * Reconfigure uses the *old* svg value I have moved the AArch64Reconfigure call to after we've processed the invalidations caused by the register write, so we no longer need the manual invalidates in AArch64Reconfigure. In addition I have changed the order in which expedited registers as parsed. These registers come with a stop notification and include, amongst others, vg and svg. So now we: * Parse them and update register values (including vg and svg) * AArch64Reconfigure, which uses those values, and invalidates every register, because offsets may have changed. * Parse the expedited registers again, knowing that none of the values will have changed due to the scaling. This means we use the expedited registers during the reconfigure, but the invalidate does not mean we throw all of them away. The cost is we parse them twice client side, but this is cheap compared to a network packet, and is limited to AArch64 targets only. On a system with SVE and SME, these are the packets sent for a step: ``` (lldb) b-remote.async> < 803> read packet: $T05thread:p1f80.1f80;name:main.o;threads:1f80;thread-pcs:000000000040056c<...>a1:0800000000000000;d9:0400000000000000;reason:trace;#fc intern-state < 21> send packet: $xfffffffff200,200#5e intern-state < 516> read packet: $e4f2ffffffff000000<...>#71 intern-state < 15> send packet: $Z0,400568,4#4d intern-state < 6> read packet: $OK#9a dbg.evt-handler < 16> send packet: $jThreadsInfo#c1 dbg.evt-handler < 224> read packet: $[{"name":"main.o","reason":"trace","registers":{"161":"0800000000000000",<...>}],"signal":5,"tid":8064}]]#73 ``` You can see there are no extra register reads which means we're using the expedited registers. For a write to vg: ``` (lldb) register write vg 4 lldb < 37> send packet: $Pa1=0400000000000000;thread:1f80;#4a lldb < 6> read packet: $OK#9a lldb < 20> send packet: $pa1;thread:1f80;#29 lldb < 20> read packet: $0400000000000000#04 lldb < 20> send packet: $pd9;thread:1f80;#34 lldb < 20> read packet: $0400000000000000#04 ``` There is the initial P write, and lldb correctly assumes that SVG is invalidated by this also so we read back the new vg and svg values afterwards.
2023-10-25Reland "[lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef ↵David Spickett1-0/+5
(#66768)"" This reverts commit 8d80a452b841a211e0f3bce01a01c9a015d287f3. The pointer to the invalidates lists needs to be non-const. Though in this case I don't think it's ever modified. Also I realised that the invalidate list was being set on svg not vg. Should be the other way around.
2023-10-25Revert "[lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef ↵David Spickett1-5/+0
(#66768)" This reverts commit f2c09e5e16d592303b5a1c158cdef28ef08104f0, due to compilation failures on buildbots.
2023-10-25[lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef (#66768)David Spickett1-0/+5
This fixes a bug where writing vg during streaming mode could prevent you reading za directly afterwards. vg is invalidated just prior to us reading it in AArch64Reconfigure, but svg was not. This lead to some situations where vg would be updated or cleared and re-read, but svg would not be. This meant it had some undefined value which lead to errors that prevented us reading ZA. Likely we received a lot more data than we were expecting. There are at least 2 ways to get into this situation: * Explicit write by the user to vg. * We have just stopped and need to get the potentially new svg and vg. The first is handled by invalidating svg client side before fetching the new one. This also covers some but not all of the second scenario. For the second, I've made writes to vg invalidate svg by noting this in the register information. Whichever one of those kicks in, we'll get the latest value of svg. The bug may depend on timing, I could not find a consistent way to trigger it. I originally found it when checking whether za is disabled after a vg change, so I've added checks for that to TestZAThreadedDynamic. The SVE VG version of the bug did show up on the buildbot, but not consistently. So it's possible that TestZAThreadedDynamic does in fact cover this, but I haven't run it enough times to know.
2023-09-20[lldb][AArch64] Invalidate cached VG value before reconfiguring SVE registersDavid Spickett1-0/+2
This fixes 46b961f36bc5b1105356d1701f0c7c9d439be9c8. Prior to the SME changes the steps were: * Invalidate all registers. * Update value of VG and use that to reconfigure the registers. * Invalidate all registers again. With the changes for SME I removed the initial invalidate thinking that it didn't make sense to do if we were going to invalidate them all anyway after reconfiguring. Well the reason it made sense was that it forced us to get the latest value of vg which we needed to reconfigure properly. Not doing so caused a test failure on our Graviton bot which has SVE (https://lab.llvm.org/buildbot/#/builders/96/builds/45722). It was flaky and looping it locally would always fail within a few minutes. Presumably it was using an invalid value of vg, which caused some offsets to be calculated incorrectly. To fix this I've invalided vg in AArch64Reconfigure just before we read it. This is the same as the fix I have in review for SME's svg register. Pushing this directly to fix the ongoing test failure.
2023-09-19[lldb][AArch64] Implement resizing of SME's ZA registerDavid Spickett1-39/+58
The size of ZA depends on the streaming vector length regardless of the active mode. So in addition to vg (which reports the active mode) we must send the client svg. Otherwise the mechanics are the same as for non-streaming SVE. Use the svg value to update the defined size of ZA, accounting for the fact that ZA is not a single vector but a suqare matrix. So if svg is 8, a single streaming vector would be 8*8 = 64 bytes. ZA is that squared, so 64*64 = 4096 bytes. Testing is included in a later patch. Reviewed By: omjavaid Differential Revision: https://reviews.llvm.org/D159504
2023-09-05[lldb][AArch64] Remove bool return from UpdateARM64SVERegistersInfosDavid Spickett1-16/+16
This always succeeds. While I'm here, document why we check the size of p0 against the value of VG. Reviewed By: omjavaid Differential Revision: https://reviews.llvm.org/D157845
2023-07-11Add a generic Process method to dump plugin history.Jim Ingham1-3/+3
I need to call this to figure out why the assert in StopInfoMachException::CreateStopReasonWithMachException is triggering, but it isn't appropriate to directly access the GDBRemoteCommunication there. And dumping whatever history the process plugin has collected during the run isn't gdb-remote specific... Differential Revision: https://reviews.llvm.org/D154992
2022-10-12[LLDB] Pass const RegisterInfo& to RegisterValue::SetValueFromDataDavid Spickett1-1/+1
Familiar story, callers are either checking upfront that the pointer wasn't null or not checking at all. SetValueFromData itself didn't check either. So make the parameter a ref and fixup the few places where a nullptr check seems needed. Depends on D135668 Reviewed By: clayborg Differential Revision: https://reviews.llvm.org/D135670
2022-10-12[LLDB] Change RegisterValue::SetFromMemoryData to const RegisterInfo&David Spickett1-1/+1
All callers were either assuming their pointer was not null before calling this, or checking beforehand. Reviewed By: clayborg Differential Revision: https://reviews.llvm.org/D135668
2022-04-05[lldb] Refactor DataBuffer so we can map files as read-onlyJonas Devlieghere1-4/+8
Currently, all data buffers are assumed to be writable. This is a problem on macOS where it's not allowed to load unsigned binaries in memory as writable. To be more precise, MAP_RESILIENT_CODESIGN and MAP_RESILIENT_MEDIA need to be set for mapped (unsigned) binaries on our platform. Binaries are mapped through FileSystem::CreateDataBuffer which returns a DataBufferLLVM. The latter is backed by a llvm::WritableMemoryBuffer because every DataBuffer in LLDB is considered to be writable. In order to use a read-only llvm::MemoryBuffer I had to split our abstraction around it. This patch distinguishes between a DataBuffer (read-only) and WritableDataBuffer (read-write) and updates LLDB to use the appropriate one. rdar://74890607 Differential revision: https://reviews.llvm.org/D122856
2022-02-01[lldb] Convert ProcessGDBRemoteLog to the new APIPavel Labath1-8/+4
2021-10-25[lldb] [gdb-remote] Remove HardcodeARMRegisters() hackMichał Górny1-263/+0
HardcodeARMRegisters() is a hack that was supposed to be used "until we can get an updated debugserver down on the devices". Since it was introduced back in 2012, there is a good chance that the debugserver has been updated at least once since then. Removing this code makes transition to the new DynamicRegisterInfo API easier. Differential Revision: https://reviews.llvm.org/D111491
2021-10-20[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*Michał Górny1-6/+60
gdbserver does not expose combined ymm* registers but rather XSAVE-style split xmm* and ymm*h portions. Extend value_regs to support combining multiple registers and use it to create user-friendly ymm* registers that are combined from split xmm* and ymm*h portions. Differential Revision: https://reviews.llvm.org/D108937
2021-10-19Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*"Michał Górny1-60/+6
This reverts commit 5352ea4a721ef252129994111b83dc350ecc71da. It seems to have broken the arm buildbot.
2021-10-19[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*Michał Górny1-6/+60
gdbserver does not expose combined ymm* registers but rather XSAVE-style split xmm* and ymm*h portions. Extend value_regs to support combining multiple registers and use it to create user-friendly ymm* registers that are combined from split xmm* and ymm*h portions. Differential Revision: https://reviews.llvm.org/D108937
2021-10-07[lldb] [DynamicRegisterInfo] Support iterating over registers()Michał Górny1-10/+5
Add DynamicRegisterInfo::registers() method that returns llvm::iterator_range<> over RegisterInfos. This is a convenient replacement for GetNumRegisters() + GetRegisterInfoAtIndex(). Differential Revision: https://reviews.llvm.org/D111136
2021-10-07Recommit: [lldb] Remove "dwarf dynamic register size expressions" from ↵Pavel Labath1-117/+110
RegisterInfo The previous version of the patch did not update the definitions in conditionally compiled code. This patch includes changes to ARC and windows targets. Original commit message was: These were added to support some mips registers on linux, but linux mips support has now been removed due. They are still referenced in the freebds mips implementation, but the completeness of that implementation is also unknown. All other architectures just set these fields to zero, which is a cause of significant bloat in our register info definitions. Arm also has registers with variable sizes, but they were implemented in a more gdb-compatible fashion and don't use this feature. Differential Revision: https://reviews.llvm.org/D110914
2021-10-06Revert "[lldb] Remove "dwarf dynamic register size expressions" from ↵Michael Forster1-110/+117
RegisterInfo" This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969. This commit should should have updated llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other architectures.
2021-10-06[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfoPavel Labath1-117/+110
These were added to support some mips registers on linux, but linux mips support has now been removed due. They are still referenced in the freebds mips implementation, but the completeness of that implementation is also unknown. All other architectures just set these fields to zero, which is a cause of significant bloat in our register info definitions. Arm also has registers with variable sizes, but they were implemented in a more gdb-compatible fashion and don't use this feature. Differential Revision: https://reviews.llvm.org/D110914
2021-09-23[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regsMichał Górny1-3/+3
Switch the gdb-remote client logic to use local (LLDB) register numbers in value_regs/invalidate_regs rather than remote regnos. This involves translating regnos received from lldb-server. Differential Revision: https://reviews.llvm.org/D110027
2021-09-23Revert "[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs"Michał Górny1-3/+3
This reverts commit 6fbed33d4a7de2229c40e6318f223092d3a23848. The prerequisite commit is causing regressions.
2021-09-23[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regsMichał Górny1-3/+3
Switch the gdb-remote client logic to use local (LLDB) register numbers in value_regs/invalidate_regs rather than remote regnos. This involves translating regnos received from lldb-server. Differential Revision: https://reviews.llvm.org/D110027
2021-09-20[lldb] [gdb-remote] Remove unused arg from ↵Michał Górny1-20/+3
GDBRemoteRegisterContext::ReadRegisterBytes() Differential Revision: https://reviews.llvm.org/D110020
2021-09-16[lldb] [DynamicRegisterInfo] Pass name/alt_name via RegisterInfoMichał Górny1-15/+4
Remove the name and alt_name parameters from AddRegister() and instead pass them via RegisterInfo.name and .alt_name fields. This makes the API simpler and removes some duplication. Differential Revision: https://reviews.llvm.org/D109872
2021-09-13[lldb] Remove redundant register alt_namesMichał Górny1-5/+5
Remove redundant register alt_names that correspond to their respective generic names. D108554 makes it possible to query registers through their generic names directly, therefore making repeating them via alt_name unnecessary. While at it, also remove alt_names that are equal to register names on PPC. This patch does not alter register definitions where the generic names are listed as primary names, and other names are provided as alt_name (e.g. ARM). Differential Revision: https://reviews.llvm.org/D109626
2021-07-12Revert "Revert "Reset the wakeup timeout when we re-enter the continue wait.""Jim Ingham1-3/+3
This reverts commit 82a38837150099288a1262391ef43e1fd69ffde4. The original version had a copy-paste error: using the Interrupt timeout for the ResumeSynchronous wait, which is clearly wrong. This error would have been evident with real use, but the interrupt is long enough that it only caused one testsuite failure (in the Swift fork). Anyway, I found that mistake and fixed it and checked all the other places where I had to plumb through a timeout, and added a test with a short interrupt timeout stepping over a function that takes 3x the interrupt timeout to complete, so that should detect a similar mistake in the future.
2021-07-02[lldb] Replace default bodies of special member functions with = default;Jonas Devlieghere1-1/+1
Replace default bodies of special member functions with = default; $ run-clang-tidy.py -header-filter='lldb' -checks='-*,modernize-use-equals-default' -fix , https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-equals-default.html Differential revision: https://reviews.llvm.org/D104041
2021-05-17Revert "Reset the wakeup timeout when we re-enter the continue wait."Jim Ingham1-3/+3
This reverts commit bd5751f3d249ec0798060bd98c07272174c52af0. This patch series is causing us to every so often miss switching the state from eStateRunning to eStateStopped when we get the stop packet from the debug server. Reverting till I can figure out how that could be happening.
2021-05-11Add an "interrupt timeout" to Process, and pipe that through theJim Ingham1-3/+3
ProcessGDBRemote plugin layers. Also fix a bug where if we tried to interrupt, but the ReadPacket wakeup timer woke us up just after the timeout, we would break out the switch, but then since we immediately check if the response is empty & fail if it is, we could end up actually only giving a small interval to the interrupt. Differential Revision: https://reviews.llvm.org/D102085
2021-03-02Support GDB remote g packet partial readMuhammad Omair Javaid1-4/+8
GDB remote protocol does not specify length of g packet for register read. It depends on remote to include all or exclude certain registers from g packet. In case a register or set of registers is not included as part of g packet then we should fall back to p packet for reading all registers excluded from g packet by remote. This patch adds support for above feature and adds a test-case for the same. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D97498
2021-02-08Use remote regnums in expedited list, value regs and invalidate regsMuhammad Omair Javaid1-5/+8
Native register descriptions in LLDB specify lldb register numbers in value_regs and invalidate_regs lists. These register numbers may not match with Process gdb-remote register numbers which are generated by native process after counting all registers in its register sets. It was coincidentally not causing any problems as we never came across a native target with dynamically changing register sets and register numbers generated by counter matched with LLDB native register numbers. This came up while testing target AArch64 SVE which can choose register sets based on underlying hardware. This patch fixes this behavior and always tries to use remote register numbers while reading/writing registers over gdb-remote protocol. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D77043
2021-01-19[LLDB] Add support to resize SVE registers at run-timeMuhammad Omair Javaid1-5/+76
This patch builds on previously submitted SVE patches regarding expedited register set and per thread register infos. (D82853 D82855 and D82857) We need to resize SVE register based on value received in expedited list. Also we need to resize SVE registers when we write vg register using register write vg command. The resize will result in a updated offset for all of fpr and sve register set. This offset will be configured in native register context by RegisterInfoInterface and will also be be updated on client side in GDBRemoteRegisterContext. A follow up patch will provide a API test to verify this change. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D82863
2021-01-15[LLDB] Add per-thread register infos shared pointer in gdb-remoteMuhammad Omair Javaid1-13/+15
In gdb-remote process we have register infos defind as a refernce object of GDBRemoteDynamicRegisterInfo class. In past register infos have remained constant througout the life time of a process. This has changed after AArch64 SVE support where register infos will have per-thread configuration. SVE registers will have per-thread size and can be updated while running. This patch aims to build up for that support by changing GDBRemoteDynamicRegisterInfo reference to a shared pointer deinfed per-thread. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D82857
2020-01-24[lldb][NFC] Fix all formatting errors in .cpp file headersRaphael Isemann1-1/+1
Summary: A *.cpp file header in LLDB (and in LLDB) should like this: ``` //===-- TestUtilities.cpp -------------------------------------------------===// ``` However in LLDB most of our source files have arbitrary changes to this format and these changes are spreading through LLDB as folks usually just use the existing source files as templates for their new files (most notably the unnecessary editor language indicator `-*- C++ -*-` is spreading and in every review someone is pointing out that this is wrong, resulting in people pointing out that this is done in the same way in other files). This patch removes most of these inconsistencies including the editor language indicators, all the different missing/additional '-' characters, files that center the file name, missing trailing `===//` (mostly caused by clang-format breaking the line). Reviewers: aprantl, espindola, jfb, shafik, JDevlieghere Reviewed By: JDevlieghere Subscribers: dexonsmith, wuzish, emaste, sdardis, nemanjai, kbarton, MaskRay, atanasyan, arphaman, jfb, abidh, jsji, JDevlieghere, usaxena95, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D73258
2019-11-20Handle the case where the 'g' packet doesn't get all regs.Jason Molenda1-0/+15
lldb would silently accept a response to the 'g' packet (read all registers) which was too large; this handles the case where it is too small. Differential Revision: https://reviews.llvm.org/D70417 <rdar://problem/34916465>
2019-11-07[lldb-server] Add setting to force 'g' packet useGuilherme Andrade1-3/+5
Following up on https://reviews.llvm.org/D62221, this change introduces the settings plugin.process.gdb-remote.use-g-packet-for-reading. When they are on, 'g' packets are used for reading registers. Using 'g' packets can improve performance by reducing the number of packets exchanged between client and server when a large number of registers needs to be fetched. Differential revision: https://reviews.llvm.org/D62931
2019-10-16Add arm64_32 support to lldb, an ILP32 codegen Jason Molenda1-1/+3
that runs on arm64 ISA targets, specifically Apple watches. Differential Revision: https://reviews.llvm.org/D68858 llvm-svn: 375032
2019-07-24[Logging] Replace Log::Printf with LLDB_LOG macro (NFC)Jonas Devlieghere1-21/+30
This patch replaces explicit calls to log::Printf with the new LLDB_LOGF macro. The macro is similar to LLDB_LOG but supports printf-style format strings, instead of formatv-style format strings. So instead of writing: if (log) log->Printf("%s\n", str); You'd write: LLDB_LOG(log, "%s\n", str); This change was done mechanically with the command below. I replaced the spurious if-checks with vim, since I know how to do multi-line replacements with it. find . -type f -name '*.cpp' -exec \ sed -i '' -E 's/log->Printf\(/LLDB_LOGF\(log, /g' "{}" + Differential revision: https://reviews.llvm.org/D65128 llvm-svn: 366936
2019-05-23[lldb] NFC modernize codebase with modernize-use-nullptrKonrad Kleine1-18/+19
Summary: NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]] This commit is the result of modernizing the LLDB codebase by using `nullptr` instread of `0` or `NULL`. See https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-nullptr.html for more information. This is the command I ran and I to fix and format the code base: ``` run-clang-tidy.py \ -header-filter='.*' \ -checks='-*,modernize-use-nullptr' \ -fix ~/dev/llvm-project/lldb/.* \ -format \ -style LLVM \ -p ~/llvm-builds/debug-ninja-gcc ``` NOTE: There were also changes to `llvm/utils/unittest` but I did not include them because I felt that maybe this library shall be updated in isolation somehow. NOTE: I know this is a rather large commit but it is a nobrainer in most parts. Reviewers: martong, espindola, shafik, #lldb, JDevlieghere Reviewed By: JDevlieghere Subscribers: arsenm, jvesely, nhaehnle, hiraditya, JDevlieghere, teemperor, rnkovacs, emaste, kubamracek, nemanjai, ki.stfu, javed.absar, arichardson, kbarton, jrtc27, MaskRay, atanasyan, dexonsmith, arphaman, jfb, jsji, jdoerfert, lldb-commits, llvm-commits Tags: #lldb, #llvm Differential Revision: https://reviews.llvm.org/D61847 llvm-svn: 361484
2019-04-10[NFC] Remove ASCII lines from commentsJonas Devlieghere1-4/+0
A lot of comments in LLDB are surrounded by an ASCII line to delimit the begging and end of the comment. Its use is not really consistent across the code base, sometimes the lines are longer, sometimes they are shorter and sometimes they are omitted. Furthermore, it looks kind of weird with the 80 column limit, where the comment actually extends past the line, but not by much. Furthermore, when /// is used for Doxygen comments, it looks particularly odd. And when // is used, it incorrectly gives the impression that it's actually a Doxygen comment. I assume these lines were added to improve distinguishing between comments and code. However, given that todays editors and IDEs do a great job at highlighting comments, I think it's worth to drop this for the sake of consistency. The alternative is fixing all the inconsistencies, which would create a lot more churn. Differential revision: https://reviews.llvm.org/D60508 llvm-svn: 358135
2019-03-07Promote more debug-only assertions to regular assertions.Adrian Prantl1-4/+0
llvm-svn: 355568
2019-02-11Use std::make_shared in LLDB (NFC)Jonas Devlieghere1-2/+4
Unlike std::make_unique, which is only available since C++14, std::make_shared is available since C++11. Not only is std::make_shared a lot more readable compared to ::reset(new), it also performs a single heap allocation for the object and control block. Differential revision: https://reviews.llvm.org/D57990 llvm-svn: 353764
2019-02-06Add a warning to GDBRemoteRegisterContext (if packet logging enabled)Jason Molenda1-0/+8
if the size of the g packet response was smaller than expected and is going to be ignored. llvm-svn: 353269
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2018-12-15Simplify Boolean expressionsJonas Devlieghere1-2/+2
This patch simplifies boolean expressions acorss LLDB. It was generated using clang-tidy with the following command: run-clang-tidy.py -checks='-*,readability-simplify-boolean-expr' -format -fix $PWD Differential revision: https://reviews.llvm.org/D55584 llvm-svn: 349215