aboutsummaryrefslogtreecommitdiff
path: root/llvm/test
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/Analysis/ScalarEvolution/ptrtoint.ll78
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir4
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir4
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir276
-rw-r--r--llvm/test/CodeGen/AArch64/framelayout-sve-win.mir30
-rw-r--r--llvm/test/CodeGen/AArch64/win-sve.ll148
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll280
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll448
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll9323
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll875
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll988
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll1934
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll120
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll3482
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll455
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll395
-rw-r--r--llvm/test/CodeGen/AMDGPU/calling-conventions.ll20
-rw-r--r--llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll34
-rw-r--r--llvm/test/CodeGen/AMDGPU/frem.ll1300
-rw-r--r--llvm/test/CodeGen/AMDGPU/function-args.ll190
-rw-r--r--llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll152
-rw-r--r--llvm/test/CodeGen/AMDGPU/global-constant.ll20
-rw-r--r--llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll6
-rw-r--r--llvm/test/CodeGen/AMDGPU/idot4u.ll13
-rw-r--r--llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll2
-rw-r--r--llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll8
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir7
-rw-r--r--llvm/test/CodeGen/LoongArch/calling-conv-half.ll167
-rw-r--r--llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll5
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-redzone-boundary.mir4
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll8
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-exception.ll2
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll12
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir20
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir15
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir20
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir8
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir8
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/pr49087.ll50
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir4
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir27
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll21
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll12
-rw-r--r--llvm/test/CodeGen/X86/pr49087.ll30
-rw-r--r--llvm/test/DebugInfo/COFF/AArch64/codeview-sve.ll2
-rw-r--r--llvm/test/DebugInfo/XCOFF/empty.ll4
-rw-r--r--llvm/test/DebugInfo/XCOFF/explicit-section.ll4
-rw-r--r--llvm/test/DebugInfo/XCOFF/function-sections.ll4
-rw-r--r--llvm/test/Other/debugcounter-dce.ll10
-rw-r--r--llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll280
-rw-r--r--llvm/test/Transforms/InstCombine/add-sitofp.ll7
-rw-r--r--llvm/test/Transforms/InstCombine/binop-itofp.ll22
-rw-r--r--llvm/test/Transforms/InstCombine/ptrtoaddr.ll5
-rw-r--r--llvm/test/Transforms/LoopVectorize/loop-form.ll46
-rw-r--r--llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll103
-rw-r--r--llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll32
-rw-r--r--llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll118
-rw-r--r--llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll4
-rw-r--r--llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected8
-rw-r--r--llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected8
64 files changed, 10084 insertions, 11592 deletions
diff --git a/llvm/test/Analysis/ScalarEvolution/ptrtoint.ll b/llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
index e784d25..acac2c9 100644
--- a/llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
+++ b/llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
@@ -447,6 +447,84 @@ bb5:
ret void
}
+define void @pr46786_c26_char_cmp_ops_swapped(ptr %arg, ptr %arg1, ptr %arg2) {
+; X64-LABEL: 'pr46786_c26_char_cmp_ops_swapped'
+; X64-NEXT: Classifying expressions for: @pr46786_c26_char_cmp_ops_swapped
+; X64-NEXT: %i4 = ptrtoint ptr %arg to i64
+; X64-NEXT: --> (ptrtoint ptr %arg to i64) U: full-set S: full-set
+; X64-NEXT: %i7 = phi ptr [ %arg, %bb3 ], [ %i14, %bb6 ]
+; X64-NEXT: --> {%arg,+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64) + %arg) LoopDispositions: { %bb6: Computable }
+; X64-NEXT: %i8 = load i8, ptr %i7, align 1
+; X64-NEXT: --> %i8 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X64-NEXT: %i9 = ptrtoint ptr %i7 to i64
+; X64-NEXT: --> {(ptrtoint ptr %arg to i64),+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + (ptrtoint ptr %arg1 to i64)) LoopDispositions: { %bb6: Computable }
+; X64-NEXT: %i10 = sub i64 %i9, %i4
+; X64-NEXT: --> {0,+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64)) LoopDispositions: { %bb6: Computable }
+; X64-NEXT: %i11 = getelementptr inbounds i8, ptr %arg2, i64 %i10
+; X64-NEXT: --> {%arg2,+,1}<nw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64) + %arg2) LoopDispositions: { %bb6: Computable }
+; X64-NEXT: %i12 = load i8, ptr %i11, align 1
+; X64-NEXT: --> %i12 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X64-NEXT: %i13 = add i8 %i12, %i8
+; X64-NEXT: --> (%i12 + %i8) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X64-NEXT: %i14 = getelementptr inbounds i8, ptr %i7, i64 1
+; X64-NEXT: --> {(1 + %arg),+,1}<nuw><%bb6> U: full-set S: full-set Exits: ((-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64) + %arg) LoopDispositions: { %bb6: Computable }
+; X64-NEXT: Determining loop execution counts for: @pr46786_c26_char_cmp_ops_swapped
+; X64-NEXT: Loop %bb6: backedge-taken count is (-1 + (-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64))
+; X64-NEXT: Loop %bb6: constant max backedge-taken count is i64 -1
+; X64-NEXT: Loop %bb6: symbolic max backedge-taken count is (-1 + (-1 * (ptrtoint ptr %arg to i64)) + (ptrtoint ptr %arg1 to i64))
+; X64-NEXT: Loop %bb6: Trip multiple is 1
+;
+; X32-LABEL: 'pr46786_c26_char_cmp_ops_swapped'
+; X32-NEXT: Classifying expressions for: @pr46786_c26_char_cmp_ops_swapped
+; X32-NEXT: %i4 = ptrtoint ptr %arg to i64
+; X32-NEXT: --> (zext i32 (ptrtoint ptr %arg to i32) to i64) U: [0,4294967296) S: [0,4294967296)
+; X32-NEXT: %i7 = phi ptr [ %arg, %bb3 ], [ %i14, %bb6 ]
+; X32-NEXT: --> {%arg,+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32) + %arg) LoopDispositions: { %bb6: Computable }
+; X32-NEXT: %i8 = load i8, ptr %i7, align 1
+; X32-NEXT: --> %i8 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X32-NEXT: %i9 = ptrtoint ptr %i7 to i64
+; X32-NEXT: --> {(zext i32 (ptrtoint ptr %arg to i32) to i64),+,1}<nuw><%bb6> U: [0,8589934591) S: [0,8589934591) Exits: ((zext i32 (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32)) to i64) + (zext i32 (ptrtoint ptr %arg to i32) to i64)) LoopDispositions: { %bb6: Computable }
+; X32-NEXT: %i10 = sub i64 %i9, %i4
+; X32-NEXT: --> {0,+,1}<nuw><%bb6> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32)) to i64) LoopDispositions: { %bb6: Computable }
+; X32-NEXT: %i11 = getelementptr inbounds i8, ptr %arg2, i64 %i10
+; X32-NEXT: --> {%arg2,+,1}<%bb6> U: full-set S: full-set Exits: (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32) + %arg2) LoopDispositions: { %bb6: Computable }
+; X32-NEXT: %i12 = load i8, ptr %i11, align 1
+; X32-NEXT: --> %i12 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X32-NEXT: %i13 = add i8 %i12, %i8
+; X32-NEXT: --> (%i12 + %i8) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant }
+; X32-NEXT: %i14 = getelementptr inbounds i8, ptr %i7, i64 1
+; X32-NEXT: --> {(1 + %arg),+,1}<nuw><%bb6> U: full-set S: full-set Exits: ((-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32) + %arg) LoopDispositions: { %bb6: Computable }
+; X32-NEXT: Determining loop execution counts for: @pr46786_c26_char_cmp_ops_swapped
+; X32-NEXT: Loop %bb6: backedge-taken count is (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32))
+; X32-NEXT: Loop %bb6: constant max backedge-taken count is i32 -1
+; X32-NEXT: Loop %bb6: symbolic max backedge-taken count is (-1 + (-1 * (ptrtoint ptr %arg to i32)) + (ptrtoint ptr %arg1 to i32))
+; X32-NEXT: Loop %bb6: Trip multiple is 1
+;
+ %i = icmp eq ptr %arg1, %arg
+ br i1 %i, label %bb5, label %bb3
+
+bb3:
+ %i4 = ptrtoint ptr %arg to i64
+ br label %bb6
+
+bb6:
+ %i7 = phi ptr [ %arg, %bb3 ], [ %i14, %bb6 ]
+ %i8 = load i8, ptr %i7
+ %i9 = ptrtoint ptr %i7 to i64
+ %i10 = sub i64 %i9, %i4
+ %i11 = getelementptr inbounds i8, ptr %arg2, i64 %i10
+ %i12 = load i8, ptr %i11
+ %i13 = add i8 %i12, %i8
+ store i8 %i13, ptr %i11
+ %i14 = getelementptr inbounds i8, ptr %i7, i64 1
+ %i15 = icmp eq ptr %i14, %arg1
+ br i1 %i15, label %bb5, label %bb6
+
+bb5:
+ ret void
+}
+
+
; void pr46786_c26_int(int* start, int *end, int *other) {
; for (int* cur = start; cur != end; ++cur)
; other[cur - start] += *cur;
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
index 8552931..ee35447 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
@@ -102,8 +102,8 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
%0:_(<4 x s16>) = COPY $d0
- %2:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 3
+ %1:_(s16) = COPY $h0
+ %2:_(s16) = G_CONSTANT i16 3
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
%4:_(<4 x s16>) = G_ASHR %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
index 61d1c43..97bcb80 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
@@ -135,8 +135,8 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
%0:_(<4 x s16>) = COPY $d0
- %2:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 3
+ %1:_(s16) = COPY $h0
+ %2:_(s16) = G_CONSTANT i16 3
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
%4:_(<4 x s16>) = G_SHL %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
new file mode 100644
index 0000000..332049d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
@@ -0,0 +1,276 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=aarch64 -passes="print<gisel-value-tracking>" -filetype=null %s 2>&1 | FileCheck %s
+
+---
+name: Cst
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @Cst
+ ; CHECK-NEXT: %0:_ KnownBits:00000010 SignBits:6
+ ; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
+ ; CHECK-NEXT: %2:_ KnownBits:00100010 SignBits:2
+ %0:_(s8) = G_CONSTANT i8 2
+ %1:_(s8) = G_CONSTANT i8 224
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: CstZero
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @CstZero
+ ; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
+ ; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
+ ; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
+ %0:_(s8) = G_CONSTANT i8 0
+ %1:_(s8) = G_CONSTANT i8 0
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: CstNegOne
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @CstNegOne
+ ; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
+ ; CHECK-NEXT: %1:_ KnownBits:00000001 SignBits:7
+ ; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
+ %0:_(s8) = G_CONSTANT i8 0
+ %1:_(s8) = G_CONSTANT i8 1
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: CstNegFour
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @CstNegFour
+ ; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
+ ; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
+ ; CHECK-NEXT: %2:_ KnownBits:11111100 SignBits:6
+ %0:_(s8) = G_CONSTANT i8 0
+ %1:_(s8) = G_CONSTANT i8 4
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: CstNeg
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @CstNeg
+ ; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
+ ; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
+ ; CHECK-NEXT: %2:_ KnownBits:11011110 SignBits:2
+ %0:_(s8) = G_CONSTANT i8 224
+ %1:_(s8) = G_CONSTANT i8 2
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: ScalarVar
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @ScalarVar
+ ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
+ %0:_(s8) = COPY $b0
+ %1:_(s8) = COPY $b1
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: ScalarRhsEarlyOut
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @ScalarRhsEarlyOut
+ ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
+ ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
+ %0:_(s8) = COPY $b0
+ %1:_(s8) = G_CONSTANT i8 3
+ %2:_(s8) = G_SUB %0, %1
+...
+---
+name: ScalarNonNegative
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @ScalarNonNegative
+ ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
+ ; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
+ ; CHECK-NEXT: %3:_ KnownBits:00000000 SignBits:8
+ ; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:4
+ %0:_(s8) = COPY $b0
+ %1:_(s8) = G_CONSTANT i8 15
+ %2:_(s8) = G_AND %0, %1
+ %3:_(s8) = G_CONSTANT i8 0
+ %4:_(s8) = G_SUB %3, %2
+...
+---
+name: ScalarLhsEarlyOut
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @ScalarLhsEarlyOut
+ ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
+ ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
+ %0:_(s8) = COPY $b0
+ %1:_(s8) = G_CONSTANT i8 3
+ %2:_(s8) = G_SUB %1, %0
+...
+---
+name: ScalarPartKnown
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @ScalarPartKnown
+ ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
+ ; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
+ ; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
+ ; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:3
+ %0:_(s8) = COPY $b0
+ %1:_(s8) = G_CONSTANT i8 15
+ %2:_(s8) = G_AND %0, %1
+ %3:_(s8) = G_CONSTANT i8 5
+ %4:_(s8) = G_SUB %2, %3
+...
+---
+name: VectorCstZero
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorCstZero
+ ; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %1:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %3:_ KnownBits:0000000000000000 SignBits:16
+ %0:_(s16) = G_CONSTANT i16 0
+ %1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x s16>) = G_SUB %1, %2
+...
+---
+name: VectorCstNegOne
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorCstNegOne
+ ; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %1:_ KnownBits:0000000000000001 SignBits:15
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %3:_ KnownBits:0000000000000001 SignBits:15
+ ; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
+ %0:_(s16) = G_CONSTANT i16 0
+ %1:_(s16) = G_CONSTANT i16 1
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x s16>) = G_SUB %2, %3
+...
+---
+name: VectorVar
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorVar
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(<4 x s16>) = COPY $d1
+ %2:_(<4 x s16>) = G_SUB %0, %1
+...
+---
+name: VectorRhsEarlyOut
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorRhsEarlyOut
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(s16) = G_CONSTANT i16 3
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x s16>) = G_SUB %2, %0
+...
+---
+name: VectorNonNegative
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorNonNegative
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
+ ; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
+ ; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
+ ; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %5:_ KnownBits:0000000000000000 SignBits:16
+ ; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:8
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(s16) = G_CONSTANT i16 255
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x s16>) = G_AND %0, %2
+ %4:_(s16) = G_CONSTANT i16 0
+ %5:_(<4 x s16>) = G_BUILD_VECTOR %4, %4, %4, %4
+ %6:_(<4 x s16>) = G_SUB %5, %3
+...
+---
+name: VectorLhsEarlyOut
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorLhsEarlyOut
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(s16) = G_CONSTANT i16 3
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x s16>) = G_SUB %0, %2
+...
+---
+name: VectorPartKnown
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorPartKnown
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
+ ; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
+ ; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
+ ; CHECK-NEXT: %4:_ KnownBits:0000000000101010 SignBits:10
+ ; CHECK-NEXT: %5:_ KnownBits:0000000001001010 SignBits:9
+ ; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
+ ; CHECK-NEXT: %7:_ KnownBits:???????????????? SignBits:7
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(s16) = G_CONSTANT i16 255
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x s16>) = G_AND %0, %2
+ %4:_(s16) = G_CONSTANT i16 42
+ %5:_(s16) = G_CONSTANT i16 74
+ %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x s16>) = G_SUB %6, %3
+...
+---
+name: VectorCst36
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorCst36
+ ; CHECK-NEXT: %0:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %1:_ KnownBits:0000000000000110 SignBits:13
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
+ ; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:12
+ %0:_(s16) = G_CONSTANT i16 3
+ %1:_(s16) = G_CONSTANT i16 6
+ %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x s16>) = G_SUB %2, %3
+...
+
+---
+name: VectorCst3unknown
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @VectorCst3unknown
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
+ %0:_(<4 x s16>) = COPY $d0
+ %1:_(s16) = COPY $h0
+ %2:_(s16) = G_CONSTANT i16 3
+ %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x s16>) = G_SUB %0, %3
+...
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
index 5933c5d..b8302e6 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
@@ -380,10 +380,8 @@ body: |
; CHECK-NEXT: frame-destroy SEH_EpilogStart
; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 32, 0
; CHECK-NEXT: frame-destroy SEH_StackAlloc 32
- ; CHECK-NEXT: $lr = frame-destroy LDRXui $sp, 0 :: (load (s64) from %stack.1)
- ; CHECK-NEXT: frame-destroy SEH_SaveReg 30, 0
- ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
- ; CHECK-NEXT: frame-destroy SEH_StackAlloc 16
+ ; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1)
+ ; CHECK-NEXT: frame-destroy SEH_SaveReg_X 30, -16
; CHECK-NEXT: $p4 = frame-destroy LDR_PXI $sp, 0 :: (load (s16) from %stack.4)
; CHECK-NEXT: frame-destroy SEH_SavePReg 4, 0
; CHECK-NEXT: $p5 = frame-destroy LDR_PXI $sp, 1 :: (load (s16) from %stack.3)
@@ -430,10 +428,8 @@ body: |
; CHECK-NEXT: frame-destroy SEH_EpilogStart
; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 32, 0
; CHECK-NEXT: frame-destroy SEH_StackAlloc 32
- ; CHECK-NEXT: $lr = frame-destroy LDRXui $sp, 0 :: (load (s64) from %stack.1)
- ; CHECK-NEXT: frame-destroy SEH_SaveReg 30, 0
- ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
- ; CHECK-NEXT: frame-destroy SEH_StackAlloc 16
+ ; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1)
+ ; CHECK-NEXT: frame-destroy SEH_SaveReg_X 30, -16
; CHECK-NEXT: $z8 = frame-destroy LDR_ZXI $sp, 0 :: (load (s128) from %stack.4)
; CHECK-NEXT: frame-destroy SEH_SaveZReg 8, 0
; CHECK-NEXT: $z9 = frame-destroy LDR_ZXI $sp, 1 :: (load (s128) from %stack.3)
@@ -557,10 +553,8 @@ body: |
; CHECK-NEXT: frame-destroy SEH_StackAlloc 32
; CHECK-NEXT: $x21, $lr = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.2), (load (s64) from %stack.3)
; CHECK-NEXT: frame-destroy SEH_SaveRegP 21, 30, 16
- ; CHECK-NEXT: $x19, $x20 = frame-destroy LDPXi $sp, 0 :: (load (s64) from %stack.4), (load (s64) from %stack.5)
- ; CHECK-NEXT: frame-destroy SEH_SaveRegP 19, 20, 0
- ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 32, 0
- ; CHECK-NEXT: frame-destroy SEH_StackAlloc 32
+ ; CHECK-NEXT: early-clobber $sp, $x19, $x20 = frame-destroy LDPXpost $sp, 4 :: (load (s64) from %stack.4), (load (s64) from %stack.5)
+ ; CHECK-NEXT: frame-destroy SEH_SaveRegP_X 19, 20, -32
; CHECK-NEXT: $z8 = frame-destroy LDR_ZXI $sp, 2 :: (load (s128) from %stack.21)
; CHECK-NEXT: frame-destroy SEH_SaveZReg 8, 2
; CHECK-NEXT: $z9 = frame-destroy LDR_ZXI $sp, 3 :: (load (s128) from %stack.20)
@@ -745,10 +739,8 @@ body: |
; CHECK-NEXT: frame-destroy SEH_EpilogStart
; CHECK-NEXT: $sp = frame-destroy ADDXri $fp, 0, 0
; CHECK-NEXT: frame-destroy SEH_SetFP
- ; CHECK-NEXT: $fp, $lr = frame-destroy LDPXi $sp, 0 :: (load (s64) from %stack.2), (load (s64) from %stack.3)
- ; CHECK-NEXT: frame-destroy SEH_SaveFPLR 0
- ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
- ; CHECK-NEXT: frame-destroy SEH_StackAlloc 16
+ ; CHECK-NEXT: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.2), (load (s64) from %stack.3)
+ ; CHECK-NEXT: frame-destroy SEH_SaveFPLR_X -16
; CHECK-NEXT: $z8 = frame-destroy LDR_ZXI $sp, 2 :: (load (s128) from %stack.19)
; CHECK-NEXT: frame-destroy SEH_SaveZReg 8, 2
; CHECK-NEXT: $z9 = frame-destroy LDR_ZXI $sp, 3 :: (load (s128) from %stack.18)
@@ -869,10 +861,8 @@ body: |
; CHECK-NEXT: frame-destroy SEH_EpilogStart
; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 7, implicit $vg
; CHECK-NEXT: frame-destroy SEH_AllocZ 7
- ; CHECK-NEXT: $lr = frame-destroy LDRXui $sp, 0 :: (load (s64) from %stack.6)
- ; CHECK-NEXT: frame-destroy SEH_SaveReg 30, 0
- ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 16, 0
- ; CHECK-NEXT: frame-destroy SEH_StackAlloc 16
+ ; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.6)
+ ; CHECK-NEXT: frame-destroy SEH_SaveReg_X 30, -16
; CHECK-NEXT: $z8 = frame-destroy LDR_ZXI $sp, 1 :: (load (s128) from %stack.8)
; CHECK-NEXT: frame-destroy SEH_SaveZReg 8, 1
; CHECK-NEXT: $z23 = frame-destroy LDR_ZXI $sp, 2 :: (load (s128) from %stack.7)
diff --git a/llvm/test/CodeGen/AArch64/win-sve.ll b/llvm/test/CodeGen/AArch64/win-sve.ll
index 53ac934..3ba4a1c 100644
--- a/llvm/test/CodeGen/AArch64/win-sve.ll
+++ b/llvm/test/CodeGen/AArch64/win-sve.ll
@@ -75,10 +75,8 @@ define i32 @f(<vscale x 2 x i64> %x) {
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x30, 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x28, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 16
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -234,10 +232,8 @@ define void @f2(i64 %n, <vscale x 2 x i64> %x) {
; CHECK-NEXT: .seh_save_fplr 16
; CHECK-NEXT: ldr x28, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x28, 8
-; CHECK-NEXT: ldr x19, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x19, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x19, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 32
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -384,10 +380,8 @@ define void @f3(i64 %n, <vscale x 2 x i64> %x) {
; CHECK-NEXT: .seh_stackalloc 16
; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x30, 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x28, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 16
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -538,10 +532,8 @@ define void @f4(i64 %n, <vscale x 2 x i64> %x) {
; CHECK-NEXT: .seh_stackalloc 16
; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x30, 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x28, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 16
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -702,10 +694,8 @@ define void @f5(i64 %n, <vscale x 2 x i64> %x) {
; CHECK-NEXT: .seh_save_fplr 16
; CHECK-NEXT: ldr x28, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x28, 8
-; CHECK-NEXT: ldr x19, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x19, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x19, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 32
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -860,10 +850,10 @@ define void @f6(<vscale x 2 x i64> %x, [8 x i64] %pad, i64 %n9) personality ptr
; CHECK-NEXT: stur x0, [x8, #16]
; CHECK-NEXT: addvl x8, x29, #18
; CHECK-NEXT: ldr x1, [x8, #32]
-; CHECK-NEXT: .Ltmp0:
+; CHECK-NEXT: .Ltmp0: // EH_LABEL
; CHECK-NEXT: add x0, x19, #0
; CHECK-NEXT: bl g6
-; CHECK-NEXT: .Ltmp1:
+; CHECK-NEXT: .Ltmp1: // EH_LABEL
; CHECK-NEXT: // %bb.1: // %invoke.cont
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: add sp, sp, #64
@@ -872,10 +862,8 @@ define void @f6(<vscale x 2 x i64> %x, [8 x i64] %pad, i64 %n9) personality ptr
; CHECK-NEXT: .seh_save_fplr 16
; CHECK-NEXT: ldr x28, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x28, 8
-; CHECK-NEXT: ldr x19, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x19, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x19, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 32
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -932,8 +920,6 @@ define void @f6(<vscale x 2 x i64> %x, [8 x i64] %pad, i64 %n9) personality ptr
; CHECK-NEXT: .seh_save_preg p14, 10
; CHECK-NEXT: ldr p15, [sp, #11, mul vl] // 2-byte Folded Reload
; CHECK-NEXT: .seh_save_preg p15, 11
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
; CHECK-NEXT: addvl sp, sp, #18
; CHECK-NEXT: .seh_allocz 18
; CHECK-NEXT: add sp, sp, #16
@@ -1024,10 +1010,8 @@ define void @f6(<vscale x 2 x i64> %x, [8 x i64] %pad, i64 %n9) personality ptr
; CHECK-NEXT: .seh_save_fplr 16
; CHECK-NEXT: ldr x28, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x28, 8
-; CHECK-NEXT: ldr x19, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x19, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x19, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x19, 32
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -1144,10 +1128,8 @@ define void @f8(<vscale x 2 x i64> %v) {
; CHECK-NEXT: //APP
; CHECK-NEXT: //NO_APP
; CHECK-NEXT: .seh_startepilogue
-; CHECK-NEXT: ldr x30, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x30, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x30, 16
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1196,14 +1178,10 @@ define void @f9(<vscale x 2 x i64> %v, ...) {
; CHECK-NEXT: //APP
; CHECK-NEXT: //NO_APP
; CHECK-NEXT: .seh_startepilogue
-; CHECK-NEXT: ldr x30, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x30, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x30, 16
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
-; CHECK-NEXT: add sp, sp, #64
-; CHECK-NEXT: .seh_stackalloc 64
; CHECK-NEXT: addvl sp, sp, #1
; CHECK-NEXT: .seh_allocz 1
; CHECK-NEXT: add sp, sp, #64
@@ -1301,10 +1279,8 @@ define void @f10(i64 %n, <vscale x 2 x i64> %x) "frame-pointer"="all" {
; CHECK-NEXT: .seh_stackalloc 16
; CHECK-NEXT: ldp x29, x30, [sp, #8] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_fplr 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x28, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 32
; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 2
; CHECK-NEXT: ldr z9, [sp, #3, mul vl] // 16-byte Folded Reload
@@ -1390,10 +1366,8 @@ define i32 @f11(double %d, <vscale x 4 x i32> %vs) "aarch64_pstate_sm_compatible
; CHECK-NEXT: //NO_APP
; CHECK-NEXT: str d0, [sp, #8]
; CHECK-NEXT: .seh_startepilogue
-; CHECK-NEXT: ldr x30, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x30, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x30, 16
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1431,10 +1405,8 @@ define i32 @f12(double %d, <vscale x 4 x i32> %vs) "aarch64_pstate_sm_compatible
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: addvl sp, sp, #1
; CHECK-NEXT: .seh_allocz 1
-; CHECK-NEXT: ldr x30, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x30, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x30, 16
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1475,10 +1447,8 @@ define i32 @f13(double %d, <vscale x 4 x i32> %vs) "frame-pointer"="all" {
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: ldp x29, x30, [sp, #8] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_fplr 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x28, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 32
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1521,10 +1491,8 @@ define i32 @f14(double %d, <vscale x 4 x i32> %vs) "frame-pointer"="all" {
; CHECK-NEXT: .seh_allocz 1
; CHECK-NEXT: ldp x29, x30, [sp, #8] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_fplr 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #32
-; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr x28, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 32
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1572,10 +1540,8 @@ define tailcc void @f15(double %d, <vscale x 4 x i32> %vs, [9 x i64], i32 %i) {
; CHECK-NEXT: .seh_stackalloc 16
; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
; CHECK-NEXT: .seh_save_reg x30, 8
-; CHECK-NEXT: ldr x28, [sp] // 8-byte Folded Reload
-; CHECK-NEXT: .seh_save_reg x28, 0
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldr x28, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: .seh_save_reg_x x28, 16
; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_zreg z8, 0
; CHECK-NEXT: addvl sp, sp, #1
@@ -1594,3 +1560,53 @@ define tailcc void @f15(double %d, <vscale x 4 x i32> %vs, [9 x i64], i32 %i) {
store i32 %i, ptr %a
ret void
}
+
+declare ptr @llvm.swift.async.context.addr()
+
+define void @f16(ptr swiftasync %ctx, <vscale x 2 x i64> %foo) {
+; CHECK-LABEL: f16:
+; CHECK: .seh_proc f16
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: orr x29, x29, #0x1000000000000000
+; CHECK-NEXT: .seh_nop
+; CHECK-NEXT: addvl sp, sp, #-1
+; CHECK-NEXT: .seh_allocz 1
+; CHECK-NEXT: str z8, [sp] // 16-byte Folded Spill
+; CHECK-NEXT: .seh_save_zreg z8, 0
+; CHECK-NEXT: sub sp, sp, #32
+; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: stp x29, x30, [sp, #8] // 16-byte Folded Spill
+; CHECK-NEXT: .seh_save_fplr 8
+; CHECK-NEXT: str x22, [sp]
+; CHECK-NEXT: .seh_nop
+; CHECK-NEXT: add x29, sp, #8
+; CHECK-NEXT: .seh_add_fp 8
+; CHECK-NEXT: .seh_endprologue
+; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NEXT: //APP
+; CHECK-NEXT: //NO_APP
+; CHECK-NEXT: ldr x8, [x22]
+; CHECK-NEXT: stur x8, [x29, #-8]
+; CHECK-NEXT: .seh_startepilogue
+; CHECK-NEXT: add sp, sp, #16
+; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: ldp x29, x30, [sp, #8] // 16-byte Folded Reload
+; CHECK-NEXT: .seh_save_fplr 8
+; CHECK-NEXT: add sp, sp, #32
+; CHECK-NEXT: .seh_stackalloc 32
+; CHECK-NEXT: ldr z8, [sp] // 16-byte Folded Reload
+; CHECK-NEXT: .seh_save_zreg z8, 0
+; CHECK-NEXT: and x29, x29, #0xefffffffffffffff
+; CHECK-NEXT: .seh_nop
+; CHECK-NEXT: addvl sp, sp, #1
+; CHECK-NEXT: .seh_allocz 1
+; CHECK-NEXT: .seh_endepilogue
+; CHECK-NEXT: ret
+; CHECK-NEXT: .seh_endfunclet
+; CHECK-NEXT: .seh_endproc
+ tail call void asm sideeffect "", "~{z8}"()
+ %1 = load ptr, ptr %ctx, align 8
+ %2 = tail call ptr @llvm.swift.async.context.addr()
+ store ptr %1, ptr %2, align 8
+ ret void
+}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
index 549af87..a43bfb5 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
@@ -1047,7 +1047,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v1, |s1|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v2, v1
; CI-NEXT: s_cbranch_vccz .LBB9_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else20
; CI-NEXT: s_and_b32 s2, s0, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v2, v1
; CI-NEXT: v_mov_b32_e32 v0, s2
@@ -1058,7 +1058,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB9_8
-; CI-NEXT: ; %bb.3: ; %frem.compute
+; CI-NEXT: ; %bb.3: ; %frem.compute19
; CI-NEXT: v_frexp_mant_f32_e32 v3, v1
; CI-NEXT: v_frexp_exp_i32_f32_e32 v6, v1
; CI-NEXT: v_ldexp_f32_e64 v1, v3, 1
@@ -1083,10 +1083,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v2
; CI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB9_6
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; CI-NEXT: v_add_i32_e32 v2, vcc, 11, v5
; CI-NEXT: v_sub_i32_e32 v2, vcc, v2, v6
-; CI-NEXT: .LBB9_5: ; %frem.loop_body
+; CI-NEXT: .LBB9_5: ; %frem.loop_body27
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v5, v4
; CI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -1102,7 +1102,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB9_7
; CI-NEXT: .LBB9_6:
; CI-NEXT: v_mov_b32_e32 v5, v4
-; CI-NEXT: .LBB9_7: ; %frem.loop_exit
+; CI-NEXT: .LBB9_7: ; %frem.loop_exit28
; CI-NEXT: v_add_i32_e32 v2, vcc, -10, v2
; CI-NEXT: v_ldexp_f32_e32 v2, v5, v2
; CI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -1125,7 +1125,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; implicit-def: $vgpr1
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v3, v2
; CI-NEXT: s_cbranch_vccz .LBB9_10
-; CI-NEXT: ; %bb.9: ; %frem.else20
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: s_and_b32 s4, s2, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v3, v2
; CI-NEXT: v_mov_b32_e32 v1, s4
@@ -1136,7 +1136,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s4, s4, 1
; CI-NEXT: s_cmp_lg_u32 s4, 0
; CI-NEXT: s_cbranch_scc1 .LBB9_16
-; CI-NEXT: ; %bb.11: ; %frem.compute19
+; CI-NEXT: ; %bb.11: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e32 v4, v2
; CI-NEXT: v_frexp_exp_i32_f32_e32 v7, v2
; CI-NEXT: v_ldexp_f32_e64 v2, v4, 1
@@ -1161,10 +1161,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v3
; CI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB9_14
-; CI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_add_i32_e32 v3, vcc, 11, v6
; CI-NEXT: v_sub_i32_e32 v3, vcc, v3, v7
-; CI-NEXT: .LBB9_13: ; %frem.loop_body27
+; CI-NEXT: .LBB9_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v6, v5
; CI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -1180,7 +1180,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB9_15
; CI-NEXT: .LBB9_14:
; CI-NEXT: v_mov_b32_e32 v6, v5
-; CI-NEXT: .LBB9_15: ; %frem.loop_exit28
+; CI-NEXT: .LBB9_15: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v3, vcc, -10, v3
; CI-NEXT: v_ldexp_f32_e32 v3, v6, v3
; CI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -1237,7 +1237,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v1, |s1|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v2, v1
; VI-NEXT: s_cbranch_vccz .LBB9_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else20
; VI-NEXT: s_and_b32 s2, s0, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v2, v1
; VI-NEXT: v_mov_b32_e32 v0, s2
@@ -1248,7 +1248,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB9_8
-; VI-NEXT: ; %bb.3: ; %frem.compute
+; VI-NEXT: ; %bb.3: ; %frem.compute19
; VI-NEXT: v_frexp_mant_f32_e32 v3, v1
; VI-NEXT: v_frexp_exp_i32_f32_e32 v6, v1
; VI-NEXT: v_ldexp_f32 v1, v3, 1
@@ -1273,10 +1273,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v2
; VI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB9_6
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; VI-NEXT: v_add_u32_e32 v2, vcc, 11, v5
; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v6
-; VI-NEXT: .LBB9_5: ; %frem.loop_body
+; VI-NEXT: .LBB9_5: ; %frem.loop_body27
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v5, v4
; VI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -1292,7 +1292,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB9_7
; VI-NEXT: .LBB9_6:
; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: .LBB9_7: ; %frem.loop_exit
+; VI-NEXT: .LBB9_7: ; %frem.loop_exit28
; VI-NEXT: v_add_u32_e32 v2, vcc, -10, v2
; VI-NEXT: v_ldexp_f32 v2, v5, v2
; VI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -1315,7 +1315,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v3, v2
; VI-NEXT: s_cbranch_vccz .LBB9_10
-; VI-NEXT: ; %bb.9: ; %frem.else20
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: s_and_b32 s3, s4, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v3, v2
; VI-NEXT: v_mov_b32_e32 v1, s3
@@ -1326,7 +1326,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s3, s3, 1
; VI-NEXT: s_cmp_lg_u32 s3, 0
; VI-NEXT: s_cbranch_scc1 .LBB9_16
-; VI-NEXT: ; %bb.11: ; %frem.compute19
+; VI-NEXT: ; %bb.11: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e32 v4, v2
; VI-NEXT: v_frexp_exp_i32_f32_e32 v7, v2
; VI-NEXT: v_ldexp_f32 v2, v4, 1
@@ -1351,10 +1351,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v3
; VI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB9_14
-; VI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_add_u32_e32 v3, vcc, 11, v6
; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v7
-; VI-NEXT: .LBB9_13: ; %frem.loop_body27
+; VI-NEXT: .LBB9_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v6, v5
; VI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -1370,7 +1370,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB9_15
; VI-NEXT: .LBB9_14:
; VI-NEXT: v_mov_b32_e32 v6, v5
-; VI-NEXT: .LBB9_15: ; %frem.loop_exit28
+; VI-NEXT: .LBB9_15: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v3, vcc, -10, v3
; VI-NEXT: v_ldexp_f32 v3, v6, v3
; VI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -1425,7 +1425,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v1, |s2|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v2, v1
; CI-NEXT: s_cbranch_vccz .LBB10_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else86
; CI-NEXT: s_and_b32 s0, s4, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v2, v1
; CI-NEXT: v_mov_b32_e32 v0, s0
@@ -1436,7 +1436,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s0, s0, 1
; CI-NEXT: s_cmp_lg_u32 s0, 0
; CI-NEXT: s_cbranch_scc1 .LBB10_8
-; CI-NEXT: ; %bb.3: ; %frem.compute
+; CI-NEXT: ; %bb.3: ; %frem.compute85
; CI-NEXT: v_frexp_mant_f32_e32 v3, v1
; CI-NEXT: v_frexp_exp_i32_f32_e32 v6, v1
; CI-NEXT: v_ldexp_f32_e64 v1, v3, 1
@@ -1461,10 +1461,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v2
; CI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_6
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; CI-NEXT: v_add_i32_e32 v2, vcc, 11, v5
; CI-NEXT: v_sub_i32_e32 v2, vcc, v2, v6
-; CI-NEXT: .LBB10_5: ; %frem.loop_body
+; CI-NEXT: .LBB10_5: ; %frem.loop_body93
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v5, v4
; CI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -1480,7 +1480,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_7
; CI-NEXT: .LBB10_6:
; CI-NEXT: v_mov_b32_e32 v5, v4
-; CI-NEXT: .LBB10_7: ; %frem.loop_exit
+; CI-NEXT: .LBB10_7: ; %frem.loop_exit94
; CI-NEXT: v_add_i32_e32 v2, vcc, -10, v2
; CI-NEXT: v_ldexp_f32_e32 v2, v5, v2
; CI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -1503,7 +1503,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; implicit-def: $vgpr1
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v3, v2
; CI-NEXT: s_cbranch_vccz .LBB10_10
-; CI-NEXT: ; %bb.9: ; %frem.else20
+; CI-NEXT: ; %bb.9: ; %frem.else53
; CI-NEXT: s_and_b32 s1, s6, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v3, v2
; CI-NEXT: v_mov_b32_e32 v1, s1
@@ -1514,7 +1514,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s1, s1, 1
; CI-NEXT: s_cmp_lg_u32 s1, 0
; CI-NEXT: s_cbranch_scc1 .LBB10_16
-; CI-NEXT: ; %bb.11: ; %frem.compute19
+; CI-NEXT: ; %bb.11: ; %frem.compute52
; CI-NEXT: v_frexp_mant_f32_e32 v4, v2
; CI-NEXT: v_frexp_exp_i32_f32_e32 v7, v2
; CI-NEXT: v_ldexp_f32_e64 v2, v4, 1
@@ -1539,10 +1539,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v3
; CI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_14
-; CI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; CI-NEXT: v_add_i32_e32 v3, vcc, 11, v6
; CI-NEXT: v_sub_i32_e32 v3, vcc, v3, v7
-; CI-NEXT: .LBB10_13: ; %frem.loop_body27
+; CI-NEXT: .LBB10_13: ; %frem.loop_body60
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v6, v5
; CI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -1558,7 +1558,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_15
; CI-NEXT: .LBB10_14:
; CI-NEXT: v_mov_b32_e32 v6, v5
-; CI-NEXT: .LBB10_15: ; %frem.loop_exit28
+; CI-NEXT: .LBB10_15: ; %frem.loop_exit61
; CI-NEXT: v_add_i32_e32 v3, vcc, -10, v3
; CI-NEXT: v_ldexp_f32_e32 v3, v6, v3
; CI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -1579,7 +1579,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; implicit-def: $vgpr2
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v4, v3
; CI-NEXT: s_cbranch_vccz .LBB10_18
-; CI-NEXT: ; %bb.17: ; %frem.else53
+; CI-NEXT: ; %bb.17: ; %frem.else20
; CI-NEXT: s_and_b32 s1, s5, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v4, v3
; CI-NEXT: v_mov_b32_e32 v2, s1
@@ -1590,7 +1590,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s1, s1, 1
; CI-NEXT: s_cmp_lg_u32 s1, 0
; CI-NEXT: s_cbranch_scc1 .LBB10_24
-; CI-NEXT: ; %bb.19: ; %frem.compute52
+; CI-NEXT: ; %bb.19: ; %frem.compute19
; CI-NEXT: v_frexp_mant_f32_e32 v5, v3
; CI-NEXT: v_frexp_exp_i32_f32_e32 v8, v3
; CI-NEXT: v_ldexp_f32_e64 v3, v5, 1
@@ -1615,10 +1615,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v4
; CI-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_22
-; CI-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; CI-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; CI-NEXT: v_add_i32_e32 v4, vcc, 11, v7
; CI-NEXT: v_sub_i32_e32 v4, vcc, v4, v8
-; CI-NEXT: .LBB10_21: ; %frem.loop_body60
+; CI-NEXT: .LBB10_21: ; %frem.loop_body27
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v7, v6
; CI-NEXT: v_mul_f32_e32 v6, v7, v5
@@ -1634,7 +1634,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_23
; CI-NEXT: .LBB10_22:
; CI-NEXT: v_mov_b32_e32 v7, v6
-; CI-NEXT: .LBB10_23: ; %frem.loop_exit61
+; CI-NEXT: .LBB10_23: ; %frem.loop_exit28
; CI-NEXT: v_add_i32_e32 v4, vcc, -10, v4
; CI-NEXT: v_ldexp_f32_e32 v4, v7, v4
; CI-NEXT: v_mul_f32_e32 v5, v4, v5
@@ -1657,7 +1657,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; implicit-def: $vgpr3
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v5, v4
; CI-NEXT: s_cbranch_vccz .LBB10_26
-; CI-NEXT: ; %bb.25: ; %frem.else86
+; CI-NEXT: ; %bb.25: ; %frem.else
; CI-NEXT: s_and_b32 s1, s7, 0x8000
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v5, v4
; CI-NEXT: v_mov_b32_e32 v3, s1
@@ -1668,7 +1668,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s1, s1, 1
; CI-NEXT: s_cmp_lg_u32 s1, 0
; CI-NEXT: s_cbranch_scc1 .LBB10_32
-; CI-NEXT: ; %bb.27: ; %frem.compute85
+; CI-NEXT: ; %bb.27: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e32 v6, v4
; CI-NEXT: v_frexp_exp_i32_f32_e32 v9, v4
; CI-NEXT: v_ldexp_f32_e64 v4, v6, 1
@@ -1693,10 +1693,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v5
; CI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_30
-; CI-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; CI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; CI-NEXT: v_add_i32_e32 v5, vcc, 11, v8
; CI-NEXT: v_sub_i32_e32 v5, vcc, v5, v9
-; CI-NEXT: .LBB10_29: ; %frem.loop_body93
+; CI-NEXT: .LBB10_29: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v8, v7
; CI-NEXT: v_mul_f32_e32 v7, v8, v6
@@ -1712,7 +1712,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_31
; CI-NEXT: .LBB10_30:
; CI-NEXT: v_mov_b32_e32 v8, v7
-; CI-NEXT: .LBB10_31: ; %frem.loop_exit94
+; CI-NEXT: .LBB10_31: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v5, vcc, -10, v5
; CI-NEXT: v_ldexp_f32_e32 v5, v8, v5
; CI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -1791,7 +1791,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v1, |s6|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v2, v1
; VI-NEXT: s_cbranch_vccz .LBB10_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else86
; VI-NEXT: s_and_b32 s0, s8, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v2, v1
; VI-NEXT: v_mov_b32_e32 v0, s0
@@ -1802,7 +1802,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s0, s0, 1
; VI-NEXT: s_cmp_lg_u32 s0, 0
; VI-NEXT: s_cbranch_scc1 .LBB10_8
-; VI-NEXT: ; %bb.3: ; %frem.compute
+; VI-NEXT: ; %bb.3: ; %frem.compute85
; VI-NEXT: v_frexp_mant_f32_e32 v3, v1
; VI-NEXT: v_frexp_exp_i32_f32_e32 v6, v1
; VI-NEXT: v_ldexp_f32 v1, v3, 1
@@ -1827,10 +1827,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v2
; VI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_6
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; VI-NEXT: v_add_u32_e32 v2, vcc, 11, v5
; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v6
-; VI-NEXT: .LBB10_5: ; %frem.loop_body
+; VI-NEXT: .LBB10_5: ; %frem.loop_body93
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v5, v4
; VI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -1846,7 +1846,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_7
; VI-NEXT: .LBB10_6:
; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: .LBB10_7: ; %frem.loop_exit
+; VI-NEXT: .LBB10_7: ; %frem.loop_exit94
; VI-NEXT: v_add_u32_e32 v2, vcc, -10, v2
; VI-NEXT: v_ldexp_f32 v2, v5, v2
; VI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -1869,7 +1869,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v3, v2
; VI-NEXT: s_cbranch_vccz .LBB10_10
-; VI-NEXT: ; %bb.9: ; %frem.else20
+; VI-NEXT: ; %bb.9: ; %frem.else53
; VI-NEXT: s_and_b32 s0, s4, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v3, v2
; VI-NEXT: v_mov_b32_e32 v1, s0
@@ -1880,7 +1880,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s0, s0, 1
; VI-NEXT: s_cmp_lg_u32 s0, 0
; VI-NEXT: s_cbranch_scc1 .LBB10_16
-; VI-NEXT: ; %bb.11: ; %frem.compute19
+; VI-NEXT: ; %bb.11: ; %frem.compute52
; VI-NEXT: v_frexp_mant_f32_e32 v4, v2
; VI-NEXT: v_frexp_exp_i32_f32_e32 v7, v2
; VI-NEXT: v_ldexp_f32 v2, v4, 1
@@ -1905,10 +1905,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v3
; VI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_14
-; VI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; VI-NEXT: v_add_u32_e32 v3, vcc, 11, v6
; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v7
-; VI-NEXT: .LBB10_13: ; %frem.loop_body27
+; VI-NEXT: .LBB10_13: ; %frem.loop_body60
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v6, v5
; VI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -1924,7 +1924,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_15
; VI-NEXT: .LBB10_14:
; VI-NEXT: v_mov_b32_e32 v6, v5
-; VI-NEXT: .LBB10_15: ; %frem.loop_exit28
+; VI-NEXT: .LBB10_15: ; %frem.loop_exit61
; VI-NEXT: v_add_u32_e32 v3, vcc, -10, v3
; VI-NEXT: v_ldexp_f32 v3, v6, v3
; VI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -1945,7 +1945,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; implicit-def: $vgpr2
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v4, v3
; VI-NEXT: s_cbranch_vccz .LBB10_18
-; VI-NEXT: ; %bb.17: ; %frem.else53
+; VI-NEXT: ; %bb.17: ; %frem.else20
; VI-NEXT: s_and_b32 s0, s9, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v4, v3
; VI-NEXT: v_mov_b32_e32 v2, s0
@@ -1956,7 +1956,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s0, s0, 1
; VI-NEXT: s_cmp_lg_u32 s0, 0
; VI-NEXT: s_cbranch_scc1 .LBB10_24
-; VI-NEXT: ; %bb.19: ; %frem.compute52
+; VI-NEXT: ; %bb.19: ; %frem.compute19
; VI-NEXT: v_frexp_mant_f32_e32 v5, v3
; VI-NEXT: v_frexp_exp_i32_f32_e32 v8, v3
; VI-NEXT: v_ldexp_f32 v3, v5, 1
@@ -1981,10 +1981,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v4
; VI-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_22
-; VI-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; VI-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; VI-NEXT: v_add_u32_e32 v4, vcc, 11, v7
; VI-NEXT: v_sub_u32_e32 v4, vcc, v4, v8
-; VI-NEXT: .LBB10_21: ; %frem.loop_body60
+; VI-NEXT: .LBB10_21: ; %frem.loop_body27
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v7, v6
; VI-NEXT: v_mul_f32_e32 v6, v7, v5
@@ -2000,7 +2000,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_23
; VI-NEXT: .LBB10_22:
; VI-NEXT: v_mov_b32_e32 v7, v6
-; VI-NEXT: .LBB10_23: ; %frem.loop_exit61
+; VI-NEXT: .LBB10_23: ; %frem.loop_exit28
; VI-NEXT: v_add_u32_e32 v4, vcc, -10, v4
; VI-NEXT: v_ldexp_f32 v4, v7, v4
; VI-NEXT: v_mul_f32_e32 v5, v4, v5
@@ -2023,7 +2023,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v5, v4
; VI-NEXT: s_cbranch_vccz .LBB10_26
-; VI-NEXT: ; %bb.25: ; %frem.else86
+; VI-NEXT: ; %bb.25: ; %frem.else
; VI-NEXT: s_and_b32 s0, s12, 0x8000
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v5, v4
; VI-NEXT: v_mov_b32_e32 v3, s0
@@ -2034,7 +2034,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s0, s0, 1
; VI-NEXT: s_cmp_lg_u32 s0, 0
; VI-NEXT: s_cbranch_scc1 .LBB10_32
-; VI-NEXT: ; %bb.27: ; %frem.compute85
+; VI-NEXT: ; %bb.27: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e32 v6, v4
; VI-NEXT: v_frexp_exp_i32_f32_e32 v9, v4
; VI-NEXT: v_ldexp_f32 v4, v6, 1
@@ -2059,10 +2059,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 11, v5
; VI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_30
-; VI-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; VI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; VI-NEXT: v_add_u32_e32 v5, vcc, 11, v8
; VI-NEXT: v_sub_u32_e32 v5, vcc, v5, v9
-; VI-NEXT: .LBB10_29: ; %frem.loop_body93
+; VI-NEXT: .LBB10_29: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v8, v7
; VI-NEXT: v_mul_f32_e32 v7, v8, v6
@@ -2078,7 +2078,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_31
; VI-NEXT: .LBB10_30:
; VI-NEXT: v_mov_b32_e32 v8, v7
-; VI-NEXT: .LBB10_31: ; %frem.loop_exit94
+; VI-NEXT: .LBB10_31: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v5, vcc, -10, v5
; VI-NEXT: v_ldexp_f32 v5, v8, v5
; VI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -2144,7 +2144,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 vcc, |s2|, |v0|
; CI-NEXT: ; implicit-def: $vgpr0
; CI-NEXT: s_cbranch_vccz .LBB11_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else16
; CI-NEXT: s_and_b32 s6, s2, 0x80000000
; CI-NEXT: v_mov_b32_e32 v1, s4
; CI-NEXT: v_mov_b32_e32 v0, s2
@@ -2156,7 +2156,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s6, s6, 1
; CI-NEXT: s_cmp_lg_u32 s6, 0
; CI-NEXT: s_cbranch_scc1 .LBB11_8
-; CI-NEXT: ; %bb.3: ; %frem.compute
+; CI-NEXT: ; %bb.3: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f32_e64 v1, |s4|
; CI-NEXT: v_ldexp_f32_e64 v1, v1, 1
; CI-NEXT: v_div_scale_f32 v3, s[6:7], v1, v1, 1.0
@@ -2181,10 +2181,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v2
; CI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB11_6
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; CI-NEXT: v_add_i32_e32 v2, vcc, 12, v5
; CI-NEXT: v_sub_i32_e32 v2, vcc, v2, v6
-; CI-NEXT: .LBB11_5: ; %frem.loop_body
+; CI-NEXT: .LBB11_5: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v5, v4
; CI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -2200,7 +2200,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB11_7
; CI-NEXT: .LBB11_6:
; CI-NEXT: v_mov_b32_e32 v5, v4
-; CI-NEXT: .LBB11_7: ; %frem.loop_exit
+; CI-NEXT: .LBB11_7: ; %frem.loop_exit24
; CI-NEXT: v_add_i32_e32 v2, vcc, -11, v2
; CI-NEXT: v_ldexp_f32_e32 v2, v5, v2
; CI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -2219,7 +2219,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_mov_b32 s6, 1
; CI-NEXT: ; implicit-def: $vgpr1
; CI-NEXT: s_cbranch_vccz .LBB11_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: s_and_b32 s6, s3, 0x80000000
; CI-NEXT: v_mov_b32_e32 v2, s5
; CI-NEXT: v_mov_b32_e32 v1, s3
@@ -2231,7 +2231,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s6, s6, 1
; CI-NEXT: s_cmp_lg_u32 s6, 0
; CI-NEXT: s_cbranch_scc1 .LBB11_16
-; CI-NEXT: ; %bb.11: ; %frem.compute15
+; CI-NEXT: ; %bb.11: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e64 v2, |s5|
; CI-NEXT: v_ldexp_f32_e64 v2, v2, 1
; CI-NEXT: v_div_scale_f32 v4, s[6:7], v2, v2, 1.0
@@ -2256,10 +2256,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v3
; CI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB11_14
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_add_i32_e32 v3, vcc, 12, v6
; CI-NEXT: v_sub_i32_e32 v3, vcc, v3, v7
-; CI-NEXT: .LBB11_13: ; %frem.loop_body23
+; CI-NEXT: .LBB11_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v6, v5
; CI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -2275,7 +2275,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB11_15
; CI-NEXT: .LBB11_14:
; CI-NEXT: v_mov_b32_e32 v6, v5
-; CI-NEXT: .LBB11_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB11_15: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v3, vcc, -11, v3
; CI-NEXT: v_ldexp_f32_e32 v3, v6, v3
; CI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -2317,7 +2317,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 vcc, |s2|, |v0|
; VI-NEXT: ; implicit-def: $vgpr0
; VI-NEXT: s_cbranch_vccz .LBB11_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else16
; VI-NEXT: s_and_b32 s6, s2, 0x80000000
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_mov_b32_e32 v0, s2
@@ -2329,7 +2329,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s6, s6, 1
; VI-NEXT: s_cmp_lg_u32 s6, 0
; VI-NEXT: s_cbranch_scc1 .LBB11_8
-; VI-NEXT: ; %bb.3: ; %frem.compute
+; VI-NEXT: ; %bb.3: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f32_e64 v1, |s4|
; VI-NEXT: v_ldexp_f32 v1, v1, 1
; VI-NEXT: v_div_scale_f32 v3, s[6:7], v1, v1, 1.0
@@ -2354,10 +2354,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v2
; VI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB11_6
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v5
; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v6
-; VI-NEXT: .LBB11_5: ; %frem.loop_body
+; VI-NEXT: .LBB11_5: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v5, v4
; VI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -2373,7 +2373,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB11_7
; VI-NEXT: .LBB11_6:
; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: .LBB11_7: ; %frem.loop_exit
+; VI-NEXT: .LBB11_7: ; %frem.loop_exit24
; VI-NEXT: v_add_u32_e32 v2, vcc, -11, v2
; VI-NEXT: v_ldexp_f32 v2, v5, v2
; VI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -2392,7 +2392,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_mov_b32 s6, 1
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: s_cbranch_vccz .LBB11_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: s_and_b32 s6, s3, 0x80000000
; VI-NEXT: v_mov_b32_e32 v2, s5
; VI-NEXT: v_mov_b32_e32 v1, s3
@@ -2404,7 +2404,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s6, s6, 1
; VI-NEXT: s_cmp_lg_u32 s6, 0
; VI-NEXT: s_cbranch_scc1 .LBB11_16
-; VI-NEXT: ; %bb.11: ; %frem.compute15
+; VI-NEXT: ; %bb.11: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e64 v2, |s5|
; VI-NEXT: v_ldexp_f32 v2, v2, 1
; VI-NEXT: v_div_scale_f32 v4, s[6:7], v2, v2, 1.0
@@ -2429,10 +2429,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v3
; VI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB11_14
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v6
; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v7
-; VI-NEXT: .LBB11_13: ; %frem.loop_body23
+; VI-NEXT: .LBB11_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v6, v5
; VI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -2448,7 +2448,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB11_15
; VI-NEXT: .LBB11_14:
; VI-NEXT: v_mov_b32_e32 v6, v5
-; VI-NEXT: .LBB11_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB11_15: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v3, vcc, -11, v3
; VI-NEXT: v_ldexp_f32 v3, v6, v3
; VI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -2498,7 +2498,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 vcc, |s4|, |v0|
; CI-NEXT: ; implicit-def: $vgpr0
; CI-NEXT: s_cbranch_vccz .LBB12_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else78
; CI-NEXT: s_and_b32 s2, s4, 0x80000000
; CI-NEXT: v_mov_b32_e32 v1, s8
; CI-NEXT: v_mov_b32_e32 v0, s4
@@ -2510,7 +2510,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB12_8
-; CI-NEXT: ; %bb.3: ; %frem.compute
+; CI-NEXT: ; %bb.3: ; %frem.compute77
; CI-NEXT: v_frexp_mant_f32_e64 v1, |s8|
; CI-NEXT: v_ldexp_f32_e64 v1, v1, 1
; CI-NEXT: v_div_scale_f32 v3, s[2:3], v1, v1, 1.0
@@ -2535,10 +2535,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v2
; CI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_6
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; CI-NEXT: v_add_i32_e32 v2, vcc, 12, v5
; CI-NEXT: v_sub_i32_e32 v2, vcc, v2, v6
-; CI-NEXT: .LBB12_5: ; %frem.loop_body
+; CI-NEXT: .LBB12_5: ; %frem.loop_body85
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v5, v4
; CI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -2554,7 +2554,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_7
; CI-NEXT: .LBB12_6:
; CI-NEXT: v_mov_b32_e32 v5, v4
-; CI-NEXT: .LBB12_7: ; %frem.loop_exit
+; CI-NEXT: .LBB12_7: ; %frem.loop_exit86
; CI-NEXT: v_add_i32_e32 v2, vcc, -11, v2
; CI-NEXT: v_ldexp_f32_e32 v2, v5, v2
; CI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -2573,7 +2573,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_mov_b32 s2, 1
; CI-NEXT: ; implicit-def: $vgpr1
; CI-NEXT: s_cbranch_vccz .LBB12_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else47
; CI-NEXT: s_and_b32 s2, s5, 0x80000000
; CI-NEXT: v_mov_b32_e32 v2, s9
; CI-NEXT: v_mov_b32_e32 v1, s5
@@ -2585,7 +2585,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB12_16
-; CI-NEXT: ; %bb.11: ; %frem.compute15
+; CI-NEXT: ; %bb.11: ; %frem.compute46
; CI-NEXT: v_frexp_mant_f32_e64 v2, |s9|
; CI-NEXT: v_ldexp_f32_e64 v2, v2, 1
; CI-NEXT: v_div_scale_f32 v4, s[2:3], v2, v2, 1.0
@@ -2610,10 +2610,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v3
; CI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_14
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; CI-NEXT: v_add_i32_e32 v3, vcc, 12, v6
; CI-NEXT: v_sub_i32_e32 v3, vcc, v3, v7
-; CI-NEXT: .LBB12_13: ; %frem.loop_body23
+; CI-NEXT: .LBB12_13: ; %frem.loop_body54
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v6, v5
; CI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -2629,7 +2629,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_15
; CI-NEXT: .LBB12_14:
; CI-NEXT: v_mov_b32_e32 v6, v5
-; CI-NEXT: .LBB12_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB12_15: ; %frem.loop_exit55
; CI-NEXT: v_add_i32_e32 v3, vcc, -11, v3
; CI-NEXT: v_ldexp_f32_e32 v3, v6, v3
; CI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -2648,7 +2648,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_mov_b32 s2, 1
; CI-NEXT: ; implicit-def: $vgpr2
; CI-NEXT: s_cbranch_vccz .LBB12_18
-; CI-NEXT: ; %bb.17: ; %frem.else47
+; CI-NEXT: ; %bb.17: ; %frem.else16
; CI-NEXT: s_and_b32 s2, s6, 0x80000000
; CI-NEXT: v_mov_b32_e32 v3, s10
; CI-NEXT: v_mov_b32_e32 v2, s6
@@ -2660,7 +2660,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB12_24
-; CI-NEXT: ; %bb.19: ; %frem.compute46
+; CI-NEXT: ; %bb.19: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f32_e64 v3, |s10|
; CI-NEXT: v_ldexp_f32_e64 v3, v3, 1
; CI-NEXT: v_div_scale_f32 v5, s[2:3], v3, v3, 1.0
@@ -2685,10 +2685,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v4
; CI-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_22
-; CI-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; CI-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; CI-NEXT: v_add_i32_e32 v4, vcc, 12, v7
; CI-NEXT: v_sub_i32_e32 v4, vcc, v4, v8
-; CI-NEXT: .LBB12_21: ; %frem.loop_body54
+; CI-NEXT: .LBB12_21: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v7, v6
; CI-NEXT: v_mul_f32_e32 v6, v7, v5
@@ -2704,7 +2704,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_23
; CI-NEXT: .LBB12_22:
; CI-NEXT: v_mov_b32_e32 v7, v6
-; CI-NEXT: .LBB12_23: ; %frem.loop_exit55
+; CI-NEXT: .LBB12_23: ; %frem.loop_exit24
; CI-NEXT: v_add_i32_e32 v4, vcc, -11, v4
; CI-NEXT: v_ldexp_f32_e32 v4, v7, v4
; CI-NEXT: v_mul_f32_e32 v5, v4, v5
@@ -2723,7 +2723,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_mov_b32 s2, 1
; CI-NEXT: ; implicit-def: $vgpr3
; CI-NEXT: s_cbranch_vccz .LBB12_26
-; CI-NEXT: ; %bb.25: ; %frem.else78
+; CI-NEXT: ; %bb.25: ; %frem.else
; CI-NEXT: s_and_b32 s2, s7, 0x80000000
; CI-NEXT: v_mov_b32_e32 v4, s11
; CI-NEXT: v_mov_b32_e32 v3, s7
@@ -2735,7 +2735,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB12_32
-; CI-NEXT: ; %bb.27: ; %frem.compute77
+; CI-NEXT: ; %bb.27: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e64 v4, |s11|
; CI-NEXT: v_ldexp_f32_e64 v4, v4, 1
; CI-NEXT: v_div_scale_f32 v6, s[2:3], v4, v4, 1.0
@@ -2760,10 +2760,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v5
; CI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_30
-; CI-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; CI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; CI-NEXT: v_add_i32_e32 v5, vcc, 12, v8
; CI-NEXT: v_sub_i32_e32 v5, vcc, v5, v9
-; CI-NEXT: .LBB12_29: ; %frem.loop_body85
+; CI-NEXT: .LBB12_29: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v8, v7
; CI-NEXT: v_mul_f32_e32 v7, v8, v6
@@ -2779,7 +2779,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_31
; CI-NEXT: .LBB12_30:
; CI-NEXT: v_mov_b32_e32 v8, v7
-; CI-NEXT: .LBB12_31: ; %frem.loop_exit86
+; CI-NEXT: .LBB12_31: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v5, vcc, -11, v5
; CI-NEXT: v_ldexp_f32_e32 v5, v8, v5
; CI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -2829,7 +2829,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 vcc, |s4|, |v0|
; VI-NEXT: ; implicit-def: $vgpr0
; VI-NEXT: s_cbranch_vccz .LBB12_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else78
; VI-NEXT: s_and_b32 s2, s4, 0x80000000
; VI-NEXT: v_mov_b32_e32 v1, s8
; VI-NEXT: v_mov_b32_e32 v0, s4
@@ -2841,7 +2841,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB12_8
-; VI-NEXT: ; %bb.3: ; %frem.compute
+; VI-NEXT: ; %bb.3: ; %frem.compute77
; VI-NEXT: v_frexp_mant_f32_e64 v1, |s8|
; VI-NEXT: v_ldexp_f32 v1, v1, 1
; VI-NEXT: v_div_scale_f32 v3, s[2:3], v1, v1, 1.0
@@ -2866,10 +2866,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v2
; VI-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_6
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v5
; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v6
-; VI-NEXT: .LBB12_5: ; %frem.loop_body
+; VI-NEXT: .LBB12_5: ; %frem.loop_body85
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v5, v4
; VI-NEXT: v_mul_f32_e32 v4, v5, v3
@@ -2885,7 +2885,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_7
; VI-NEXT: .LBB12_6:
; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: .LBB12_7: ; %frem.loop_exit
+; VI-NEXT: .LBB12_7: ; %frem.loop_exit86
; VI-NEXT: v_add_u32_e32 v2, vcc, -11, v2
; VI-NEXT: v_ldexp_f32 v2, v5, v2
; VI-NEXT: v_mul_f32_e32 v3, v2, v3
@@ -2904,7 +2904,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_mov_b32 s2, 1
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: s_cbranch_vccz .LBB12_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else47
; VI-NEXT: s_and_b32 s2, s5, 0x80000000
; VI-NEXT: v_mov_b32_e32 v2, s9
; VI-NEXT: v_mov_b32_e32 v1, s5
@@ -2916,7 +2916,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB12_16
-; VI-NEXT: ; %bb.11: ; %frem.compute15
+; VI-NEXT: ; %bb.11: ; %frem.compute46
; VI-NEXT: v_frexp_mant_f32_e64 v2, |s9|
; VI-NEXT: v_ldexp_f32 v2, v2, 1
; VI-NEXT: v_div_scale_f32 v4, s[2:3], v2, v2, 1.0
@@ -2941,10 +2941,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v3
; VI-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_14
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v6
; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v7
-; VI-NEXT: .LBB12_13: ; %frem.loop_body23
+; VI-NEXT: .LBB12_13: ; %frem.loop_body54
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v6, v5
; VI-NEXT: v_mul_f32_e32 v5, v6, v4
@@ -2960,7 +2960,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_15
; VI-NEXT: .LBB12_14:
; VI-NEXT: v_mov_b32_e32 v6, v5
-; VI-NEXT: .LBB12_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB12_15: ; %frem.loop_exit55
; VI-NEXT: v_add_u32_e32 v3, vcc, -11, v3
; VI-NEXT: v_ldexp_f32 v3, v6, v3
; VI-NEXT: v_mul_f32_e32 v4, v3, v4
@@ -2979,7 +2979,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_mov_b32 s2, 1
; VI-NEXT: ; implicit-def: $vgpr2
; VI-NEXT: s_cbranch_vccz .LBB12_18
-; VI-NEXT: ; %bb.17: ; %frem.else47
+; VI-NEXT: ; %bb.17: ; %frem.else16
; VI-NEXT: s_and_b32 s2, s6, 0x80000000
; VI-NEXT: v_mov_b32_e32 v3, s10
; VI-NEXT: v_mov_b32_e32 v2, s6
@@ -2991,7 +2991,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB12_24
-; VI-NEXT: ; %bb.19: ; %frem.compute46
+; VI-NEXT: ; %bb.19: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f32_e64 v3, |s10|
; VI-NEXT: v_ldexp_f32 v3, v3, 1
; VI-NEXT: v_div_scale_f32 v5, s[2:3], v3, v3, 1.0
@@ -3016,10 +3016,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v4
; VI-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_22
-; VI-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; VI-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; VI-NEXT: v_add_u32_e32 v4, vcc, 12, v7
; VI-NEXT: v_sub_u32_e32 v4, vcc, v4, v8
-; VI-NEXT: .LBB12_21: ; %frem.loop_body54
+; VI-NEXT: .LBB12_21: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v7, v6
; VI-NEXT: v_mul_f32_e32 v6, v7, v5
@@ -3035,7 +3035,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_23
; VI-NEXT: .LBB12_22:
; VI-NEXT: v_mov_b32_e32 v7, v6
-; VI-NEXT: .LBB12_23: ; %frem.loop_exit55
+; VI-NEXT: .LBB12_23: ; %frem.loop_exit24
; VI-NEXT: v_add_u32_e32 v4, vcc, -11, v4
; VI-NEXT: v_ldexp_f32 v4, v7, v4
; VI-NEXT: v_mul_f32_e32 v5, v4, v5
@@ -3054,7 +3054,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_mov_b32 s2, 1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: s_cbranch_vccz .LBB12_26
-; VI-NEXT: ; %bb.25: ; %frem.else78
+; VI-NEXT: ; %bb.25: ; %frem.else
; VI-NEXT: s_and_b32 s2, s7, 0x80000000
; VI-NEXT: v_mov_b32_e32 v4, s11
; VI-NEXT: v_mov_b32_e32 v3, s7
@@ -3066,7 +3066,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB12_32
-; VI-NEXT: ; %bb.27: ; %frem.compute77
+; VI-NEXT: ; %bb.27: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e64 v4, |s11|
; VI-NEXT: v_ldexp_f32 v4, v4, 1
; VI-NEXT: v_div_scale_f32 v6, s[2:3], v4, v4, 1.0
@@ -3091,10 +3091,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 12, v5
; VI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_30
-; VI-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; VI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; VI-NEXT: v_add_u32_e32 v5, vcc, 12, v8
; VI-NEXT: v_sub_u32_e32 v5, vcc, v5, v9
-; VI-NEXT: .LBB12_29: ; %frem.loop_body85
+; VI-NEXT: .LBB12_29: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v8, v7
; VI-NEXT: v_mul_f32_e32 v7, v8, v6
@@ -3110,7 +3110,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_31
; VI-NEXT: .LBB12_30:
; VI-NEXT: v_mov_b32_e32 v8, v7
-; VI-NEXT: .LBB12_31: ; %frem.loop_exit86
+; VI-NEXT: .LBB12_31: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v5, vcc, -11, v5
; VI-NEXT: v_ldexp_f32 v5, v8, v5
; VI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -3169,7 +3169,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f64_e64 vcc, |s[4:5]|, |v[0:1]|
; CI-NEXT: ; implicit-def: $vgpr0_vgpr1
; CI-NEXT: s_cbranch_vccz .LBB13_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else16
; CI-NEXT: v_mov_b32_e32 v0, s8
; CI-NEXT: v_mov_b32_e32 v1, s9
; CI-NEXT: v_cmp_eq_f64_e64 vcc, |s[4:5]|, |v[0:1]|
@@ -3187,7 +3187,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB13_8
-; CI-NEXT: ; %bb.3: ; %frem.compute
+; CI-NEXT: ; %bb.3: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f64_e64 v[0:1], |s[4:5]|
; CI-NEXT: v_frexp_exp_i32_f64_e64 v6, |s[4:5]|
; CI-NEXT: v_frexp_exp_i32_f64_e64 v7, |s[8:9]|
@@ -3210,10 +3210,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 26, v9
; CI-NEXT: v_div_fixup_f64 v[2:3], v[2:3], v[0:1], 1.0
; CI-NEXT: s_cbranch_vccnz .LBB13_6
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; CI-NEXT: v_add_i32_e32 v6, vcc, 26, v6
; CI-NEXT: v_sub_i32_e32 v9, vcc, v6, v7
-; CI-NEXT: .LBB13_5: ; %frem.loop_body
+; CI-NEXT: .LBB13_5: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v7, v5
; CI-NEXT: v_mov_b32_e32 v6, v4
@@ -3232,7 +3232,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: .LBB13_6:
; CI-NEXT: v_mov_b32_e32 v7, v5
; CI-NEXT: v_mov_b32_e32 v6, v4
-; CI-NEXT: .LBB13_7: ; %frem.loop_exit
+; CI-NEXT: .LBB13_7: ; %frem.loop_exit24
; CI-NEXT: v_add_i32_e32 v4, vcc, 0xffffffe7, v9
; CI-NEXT: v_ldexp_f64 v[4:5], v[6:7], v4
; CI-NEXT: s_mov_b32 s2, 0
@@ -3256,7 +3256,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_mov_b32 s2, 1
; CI-NEXT: ; implicit-def: $vgpr2_vgpr3
; CI-NEXT: s_cbranch_vccz .LBB13_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: v_mov_b32_e32 v2, s10
; CI-NEXT: v_mov_b32_e32 v3, s11
; CI-NEXT: v_cmp_eq_f64_e64 vcc, |s[6:7]|, |v[2:3]|
@@ -3274,7 +3274,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_xor_b32 s2, s2, 1
; CI-NEXT: s_cmp_lg_u32 s2, 0
; CI-NEXT: s_cbranch_scc1 .LBB13_16
-; CI-NEXT: ; %bb.11: ; %frem.compute15
+; CI-NEXT: ; %bb.11: ; %frem.compute
; CI-NEXT: v_frexp_mant_f64_e64 v[2:3], |s[6:7]|
; CI-NEXT: v_frexp_exp_i32_f64_e64 v8, |s[6:7]|
; CI-NEXT: v_frexp_exp_i32_f64_e64 v9, |s[10:11]|
@@ -3297,10 +3297,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ge_i32_e32 vcc, 26, v11
; CI-NEXT: v_div_fixup_f64 v[4:5], v[4:5], v[2:3], 1.0
; CI-NEXT: s_cbranch_vccnz .LBB13_14
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_add_i32_e32 v8, vcc, 26, v8
; CI-NEXT: v_sub_i32_e32 v11, vcc, v8, v9
-; CI-NEXT: .LBB13_13: ; %frem.loop_body23
+; CI-NEXT: .LBB13_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v9, v7
; CI-NEXT: v_mov_b32_e32 v8, v6
@@ -3319,7 +3319,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: .LBB13_14:
; CI-NEXT: v_mov_b32_e32 v9, v7
; CI-NEXT: v_mov_b32_e32 v8, v6
-; CI-NEXT: .LBB13_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB13_15: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v6, vcc, 0xffffffe7, v11
; CI-NEXT: v_ldexp_f64 v[6:7], v[8:9], v6
; CI-NEXT: s_mov_b32 s2, 0
@@ -3371,7 +3371,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f64_e64 vcc, |s[4:5]|, |v[0:1]|
; VI-NEXT: ; implicit-def: $vgpr0_vgpr1
; VI-NEXT: s_cbranch_vccz .LBB13_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else16
; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: v_cmp_eq_f64_e64 vcc, |s[4:5]|, |v[0:1]|
@@ -3389,7 +3389,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB13_8
-; VI-NEXT: ; %bb.3: ; %frem.compute
+; VI-NEXT: ; %bb.3: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f64_e64 v[0:1], |s[4:5]|
; VI-NEXT: v_frexp_exp_i32_f64_e64 v6, |s[4:5]|
; VI-NEXT: v_frexp_exp_i32_f64_e64 v7, |s[8:9]|
@@ -3412,10 +3412,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 26, v9
; VI-NEXT: v_div_fixup_f64 v[2:3], v[2:3], v[0:1], 1.0
; VI-NEXT: s_cbranch_vccnz .LBB13_6
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; VI-NEXT: v_add_u32_e32 v6, vcc, 26, v6
; VI-NEXT: v_sub_u32_e32 v9, vcc, v6, v7
-; VI-NEXT: .LBB13_5: ; %frem.loop_body
+; VI-NEXT: .LBB13_5: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v7, v5
; VI-NEXT: v_mov_b32_e32 v6, v4
@@ -3434,7 +3434,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: .LBB13_6:
; VI-NEXT: v_mov_b32_e32 v7, v5
; VI-NEXT: v_mov_b32_e32 v6, v4
-; VI-NEXT: .LBB13_7: ; %frem.loop_exit
+; VI-NEXT: .LBB13_7: ; %frem.loop_exit24
; VI-NEXT: v_add_u32_e32 v4, vcc, 0xffffffe7, v9
; VI-NEXT: v_ldexp_f64 v[4:5], v[6:7], v4
; VI-NEXT: s_mov_b32 s2, 0
@@ -3458,7 +3458,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_mov_b32 s2, 1
; VI-NEXT: ; implicit-def: $vgpr2_vgpr3
; VI-NEXT: s_cbranch_vccz .LBB13_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_cmp_eq_f64_e64 vcc, |s[6:7]|, |v[2:3]|
@@ -3476,7 +3476,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_xor_b32 s2, s2, 1
; VI-NEXT: s_cmp_lg_u32 s2, 0
; VI-NEXT: s_cbranch_scc1 .LBB13_16
-; VI-NEXT: ; %bb.11: ; %frem.compute15
+; VI-NEXT: ; %bb.11: ; %frem.compute
; VI-NEXT: v_frexp_mant_f64_e64 v[2:3], |s[6:7]|
; VI-NEXT: v_frexp_exp_i32_f64_e64 v8, |s[6:7]|
; VI-NEXT: v_frexp_exp_i32_f64_e64 v9, |s[10:11]|
@@ -3499,10 +3499,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ge_i32_e32 vcc, 26, v11
; VI-NEXT: v_div_fixup_f64 v[4:5], v[4:5], v[2:3], 1.0
; VI-NEXT: s_cbranch_vccnz .LBB13_14
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_add_u32_e32 v8, vcc, 26, v8
; VI-NEXT: v_sub_u32_e32 v11, vcc, v8, v9
-; VI-NEXT: .LBB13_13: ; %frem.loop_body23
+; VI-NEXT: .LBB13_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v9, v7
; VI-NEXT: v_mov_b32_e32 v8, v6
@@ -3521,7 +3521,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: .LBB13_14:
; VI-NEXT: v_mov_b32_e32 v9, v7
; VI-NEXT: v_mov_b32_e32 v8, v6
-; VI-NEXT: .LBB13_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB13_15: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v6, vcc, 0xffffffe7, v11
; VI-NEXT: v_ldexp_f64 v[6:7], v[8:9], v6
; VI-NEXT: s_mov_b32 s2, 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll b/llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
index f96a6f7..b239c46 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
@@ -1,13 +1,89 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefix=GCN %s
-; GCN-LABEL: {{^}}kernel_ieee_mode_default:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define amdgpu_kernel void @kernel_ieee_mode_default() #0 {
+; GCN-LABEL: kernel_ieee_mode_default:
+; GCN: .amd_kernel_code_t
+; GCN-NEXT: amd_code_version_major = 1
+; GCN-NEXT: amd_code_version_minor = 2
+; GCN-NEXT: amd_machine_kind = 1
+; GCN-NEXT: amd_machine_version_major = 6
+; GCN-NEXT: amd_machine_version_minor = 0
+; GCN-NEXT: amd_machine_version_stepping = 0
+; GCN-NEXT: kernel_code_entry_byte_offset = 256
+; GCN-NEXT: kernel_code_prefetch_byte_size = 0
+; GCN-NEXT: granulated_workitem_vgpr_count = 0
+; GCN-NEXT: granulated_wavefront_sgpr_count = 0
+; GCN-NEXT: priority = 0
+; GCN-NEXT: float_mode = 240
+; GCN-NEXT: priv = 0
+; GCN-NEXT: enable_dx10_clamp = 1
+; GCN-NEXT: debug_mode = 0
+; GCN-NEXT: enable_ieee_mode = 1
+; GCN-NEXT: enable_wgp_mode = 0
+; GCN-NEXT: enable_mem_ordered = 0
+; GCN-NEXT: enable_fwd_progress = 0
+; GCN-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
+; GCN-NEXT: user_sgpr_count = 12
+; GCN-NEXT: enable_trap_handler = 0
+; GCN-NEXT: enable_sgpr_workgroup_id_x = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_y = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_z = 1
+; GCN-NEXT: enable_sgpr_workgroup_info = 0
+; GCN-NEXT: enable_vgpr_workitem_id = 2
+; GCN-NEXT: enable_exception_msb = 0
+; GCN-NEXT: granulated_lds_size = 0
+; GCN-NEXT: enable_exception = 0
+; GCN-NEXT: enable_sgpr_private_segment_buffer = 1
+; GCN-NEXT: enable_sgpr_dispatch_ptr = 1
+; GCN-NEXT: enable_sgpr_queue_ptr = 1
+; GCN-NEXT: enable_sgpr_kernarg_segment_ptr = 1
+; GCN-NEXT: enable_sgpr_dispatch_id = 1
+; GCN-NEXT: enable_sgpr_flat_scratch_init = 0
+; GCN-NEXT: enable_sgpr_private_segment_size = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_x = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_y = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_z = 0
+; GCN-NEXT: enable_wavefront_size32 = 0
+; GCN-NEXT: enable_ordered_append_gds = 0
+; GCN-NEXT: private_element_size = 1
+; GCN-NEXT: is_ptr64 = 1
+; GCN-NEXT: is_dynamic_callstack = 0
+; GCN-NEXT: is_debug_enabled = 0
+; GCN-NEXT: is_xnack_enabled = 0
+; GCN-NEXT: workitem_private_segment_byte_size = 0
+; GCN-NEXT: workgroup_group_segment_byte_size = 0
+; GCN-NEXT: gds_segment_byte_size = 0
+; GCN-NEXT: kernarg_segment_byte_size = 16
+; GCN-NEXT: workgroup_fbarrier_count = 0
+; GCN-NEXT: wavefront_sgpr_count = 4
+; GCN-NEXT: workitem_vgpr_count = 2
+; GCN-NEXT: reserved_vgpr_first = 0
+; GCN-NEXT: reserved_vgpr_count = 0
+; GCN-NEXT: reserved_sgpr_first = 0
+; GCN-NEXT: reserved_sgpr_count = 0
+; GCN-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
+; GCN-NEXT: debug_private_segment_buffer_sgpr = 0
+; GCN-NEXT: kernarg_segment_alignment = 4
+; GCN-NEXT: group_segment_alignment = 4
+; GCN-NEXT: private_segment_alignment = 4
+; GCN-NEXT: wavefront_size = 6
+; GCN-NEXT: call_convention = -1
+; GCN-NEXT: runtime_loader_kernel_symbol = 0
+; GCN-NEXT: .end_amd_kernel_code_t
+; GCN-NEXT: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -15,14 +91,89 @@ define amdgpu_kernel void @kernel_ieee_mode_default() #0 {
ret void
}
-; GCN-LABEL: {{^}}kernel_ieee_mode_on:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define amdgpu_kernel void @kernel_ieee_mode_on() #1 {
+; GCN-LABEL: kernel_ieee_mode_on:
+; GCN: .amd_kernel_code_t
+; GCN-NEXT: amd_code_version_major = 1
+; GCN-NEXT: amd_code_version_minor = 2
+; GCN-NEXT: amd_machine_kind = 1
+; GCN-NEXT: amd_machine_version_major = 6
+; GCN-NEXT: amd_machine_version_minor = 0
+; GCN-NEXT: amd_machine_version_stepping = 0
+; GCN-NEXT: kernel_code_entry_byte_offset = 256
+; GCN-NEXT: kernel_code_prefetch_byte_size = 0
+; GCN-NEXT: granulated_workitem_vgpr_count = 0
+; GCN-NEXT: granulated_wavefront_sgpr_count = 0
+; GCN-NEXT: priority = 0
+; GCN-NEXT: float_mode = 240
+; GCN-NEXT: priv = 0
+; GCN-NEXT: enable_dx10_clamp = 1
+; GCN-NEXT: debug_mode = 0
+; GCN-NEXT: enable_ieee_mode = 1
+; GCN-NEXT: enable_wgp_mode = 0
+; GCN-NEXT: enable_mem_ordered = 0
+; GCN-NEXT: enable_fwd_progress = 0
+; GCN-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
+; GCN-NEXT: user_sgpr_count = 12
+; GCN-NEXT: enable_trap_handler = 0
+; GCN-NEXT: enable_sgpr_workgroup_id_x = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_y = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_z = 1
+; GCN-NEXT: enable_sgpr_workgroup_info = 0
+; GCN-NEXT: enable_vgpr_workitem_id = 2
+; GCN-NEXT: enable_exception_msb = 0
+; GCN-NEXT: granulated_lds_size = 0
+; GCN-NEXT: enable_exception = 0
+; GCN-NEXT: enable_sgpr_private_segment_buffer = 1
+; GCN-NEXT: enable_sgpr_dispatch_ptr = 1
+; GCN-NEXT: enable_sgpr_queue_ptr = 1
+; GCN-NEXT: enable_sgpr_kernarg_segment_ptr = 1
+; GCN-NEXT: enable_sgpr_dispatch_id = 1
+; GCN-NEXT: enable_sgpr_flat_scratch_init = 0
+; GCN-NEXT: enable_sgpr_private_segment_size = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_x = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_y = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_z = 0
+; GCN-NEXT: enable_wavefront_size32 = 0
+; GCN-NEXT: enable_ordered_append_gds = 0
+; GCN-NEXT: private_element_size = 1
+; GCN-NEXT: is_ptr64 = 1
+; GCN-NEXT: is_dynamic_callstack = 0
+; GCN-NEXT: is_debug_enabled = 0
+; GCN-NEXT: is_xnack_enabled = 0
+; GCN-NEXT: workitem_private_segment_byte_size = 0
+; GCN-NEXT: workgroup_group_segment_byte_size = 0
+; GCN-NEXT: gds_segment_byte_size = 0
+; GCN-NEXT: kernarg_segment_byte_size = 16
+; GCN-NEXT: workgroup_fbarrier_count = 0
+; GCN-NEXT: wavefront_sgpr_count = 4
+; GCN-NEXT: workitem_vgpr_count = 2
+; GCN-NEXT: reserved_vgpr_first = 0
+; GCN-NEXT: reserved_vgpr_count = 0
+; GCN-NEXT: reserved_sgpr_first = 0
+; GCN-NEXT: reserved_sgpr_count = 0
+; GCN-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
+; GCN-NEXT: debug_private_segment_buffer_sgpr = 0
+; GCN-NEXT: kernarg_segment_alignment = 4
+; GCN-NEXT: group_segment_alignment = 4
+; GCN-NEXT: private_segment_alignment = 4
+; GCN-NEXT: wavefront_size = 6
+; GCN-NEXT: call_convention = -1
+; GCN-NEXT: runtime_loader_kernel_symbol = 0
+; GCN-NEXT: .end_amd_kernel_code_t
+; GCN-NEXT: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -30,14 +181,87 @@ define amdgpu_kernel void @kernel_ieee_mode_on() #1 {
ret void
}
-; GCN-LABEL: {{^}}kernel_ieee_mode_off:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
-; GCN-NOT: v_mul_f32
define amdgpu_kernel void @kernel_ieee_mode_off() #2 {
+; GCN-LABEL: kernel_ieee_mode_off:
+; GCN: .amd_kernel_code_t
+; GCN-NEXT: amd_code_version_major = 1
+; GCN-NEXT: amd_code_version_minor = 2
+; GCN-NEXT: amd_machine_kind = 1
+; GCN-NEXT: amd_machine_version_major = 6
+; GCN-NEXT: amd_machine_version_minor = 0
+; GCN-NEXT: amd_machine_version_stepping = 0
+; GCN-NEXT: kernel_code_entry_byte_offset = 256
+; GCN-NEXT: kernel_code_prefetch_byte_size = 0
+; GCN-NEXT: granulated_workitem_vgpr_count = 0
+; GCN-NEXT: granulated_wavefront_sgpr_count = 0
+; GCN-NEXT: priority = 0
+; GCN-NEXT: float_mode = 240
+; GCN-NEXT: priv = 0
+; GCN-NEXT: enable_dx10_clamp = 1
+; GCN-NEXT: debug_mode = 0
+; GCN-NEXT: enable_ieee_mode = 0
+; GCN-NEXT: enable_wgp_mode = 0
+; GCN-NEXT: enable_mem_ordered = 0
+; GCN-NEXT: enable_fwd_progress = 0
+; GCN-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
+; GCN-NEXT: user_sgpr_count = 12
+; GCN-NEXT: enable_trap_handler = 0
+; GCN-NEXT: enable_sgpr_workgroup_id_x = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_y = 1
+; GCN-NEXT: enable_sgpr_workgroup_id_z = 1
+; GCN-NEXT: enable_sgpr_workgroup_info = 0
+; GCN-NEXT: enable_vgpr_workitem_id = 2
+; GCN-NEXT: enable_exception_msb = 0
+; GCN-NEXT: granulated_lds_size = 0
+; GCN-NEXT: enable_exception = 0
+; GCN-NEXT: enable_sgpr_private_segment_buffer = 1
+; GCN-NEXT: enable_sgpr_dispatch_ptr = 1
+; GCN-NEXT: enable_sgpr_queue_ptr = 1
+; GCN-NEXT: enable_sgpr_kernarg_segment_ptr = 1
+; GCN-NEXT: enable_sgpr_dispatch_id = 1
+; GCN-NEXT: enable_sgpr_flat_scratch_init = 0
+; GCN-NEXT: enable_sgpr_private_segment_size = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_x = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_y = 0
+; GCN-NEXT: enable_sgpr_grid_workgroup_count_z = 0
+; GCN-NEXT: enable_wavefront_size32 = 0
+; GCN-NEXT: enable_ordered_append_gds = 0
+; GCN-NEXT: private_element_size = 1
+; GCN-NEXT: is_ptr64 = 1
+; GCN-NEXT: is_dynamic_callstack = 0
+; GCN-NEXT: is_debug_enabled = 0
+; GCN-NEXT: is_xnack_enabled = 0
+; GCN-NEXT: workitem_private_segment_byte_size = 0
+; GCN-NEXT: workgroup_group_segment_byte_size = 0
+; GCN-NEXT: gds_segment_byte_size = 0
+; GCN-NEXT: kernarg_segment_byte_size = 16
+; GCN-NEXT: workgroup_fbarrier_count = 0
+; GCN-NEXT: wavefront_sgpr_count = 4
+; GCN-NEXT: workitem_vgpr_count = 2
+; GCN-NEXT: reserved_vgpr_first = 0
+; GCN-NEXT: reserved_vgpr_count = 0
+; GCN-NEXT: reserved_sgpr_first = 0
+; GCN-NEXT: reserved_sgpr_count = 0
+; GCN-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
+; GCN-NEXT: debug_private_segment_buffer_sgpr = 0
+; GCN-NEXT: kernarg_segment_alignment = 4
+; GCN-NEXT: group_segment_alignment = 4
+; GCN-NEXT: private_segment_alignment = 4
+; GCN-NEXT: wavefront_size = 6
+; GCN-NEXT: call_convention = -1
+; GCN-NEXT: runtime_loader_kernel_symbol = 0
+; GCN-NEXT: .end_amd_kernel_code_t
+; GCN-NEXT: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -45,14 +269,22 @@ define amdgpu_kernel void @kernel_ieee_mode_off() #2 {
ret void
}
-; GCN-LABEL: {{^}}func_ieee_mode_default:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define void @func_ieee_mode_default() #0 {
+; GCN-LABEL: func_ieee_mode_default:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT: s_mov_b32 s7, 0xf000
+; GCN-NEXT: s_mov_b32 s6, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GCN-NEXT: s_setpc_b64 s[30:31]
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -60,14 +292,22 @@ define void @func_ieee_mode_default() #0 {
ret void
}
-; GCN-LABEL: {{^}}func_ieee_mode_on:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define void @func_ieee_mode_on() #1 {
+; GCN-LABEL: func_ieee_mode_on:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT: s_mov_b32 s7, 0xf000
+; GCN-NEXT: s_mov_b32 s6, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GCN-NEXT: s_setpc_b64 s[30:31]
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -75,14 +315,20 @@ define void @func_ieee_mode_on() #1 {
ret void
}
-; GCN-LABEL: {{^}}func_ieee_mode_off:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
-; GCN-NOT: v_mul_f32
define void @func_ieee_mode_off() #2 {
+; GCN-LABEL: func_ieee_mode_off:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT: s_mov_b32 s7, 0xf000
+; GCN-NEXT: s_mov_b32 s6, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[4:7], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GCN-NEXT: s_setpc_b64 s[30:31]
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -90,14 +336,19 @@ define void @func_ieee_mode_off() #2 {
ret void
}
-; GCN-LABEL: {{^}}cs_ieee_mode_default:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define amdgpu_cs void @cs_ieee_mode_default() #0 {
+; GCN-LABEL: cs_ieee_mode_default:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -105,14 +356,21 @@ define amdgpu_cs void @cs_ieee_mode_default() #0 {
ret void
}
-; GCN-LABEL: {{^}}cs_ieee_mode_on:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define amdgpu_cs void @cs_ieee_mode_on() #1 {
+; GCN-LABEL: cs_ieee_mode_on:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -120,14 +378,19 @@ define amdgpu_cs void @cs_ieee_mode_on() #1 {
ret void
}
-; GCN-LABEL: {{^}}cs_ieee_mode_off:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
-; GCN-NOT: v_mul_f32
define amdgpu_cs void @cs_ieee_mode_off() #2 {
+; GCN-LABEL: cs_ieee_mode_off:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -135,14 +398,19 @@ define amdgpu_cs void @cs_ieee_mode_off() #2 {
ret void
}
-; GCN-LABEL: {{^}}ps_ieee_mode_default:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
-; GCN-NOT: v_mul_f32
define amdgpu_ps void @ps_ieee_mode_default() #0 {
+; GCN-LABEL: ps_ieee_mode_default:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -150,14 +418,21 @@ define amdgpu_ps void @ps_ieee_mode_default() #0 {
ret void
}
-; GCN-LABEL: {{^}}ps_ieee_mode_on:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
-; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
-; GCN-NOT: v_mul_f32
define amdgpu_ps void @ps_ieee_mode_on() #1 {
+; GCN-LABEL: ps_ieee_mode_on:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
@@ -165,14 +440,19 @@ define amdgpu_ps void @ps_ieee_mode_on() #1 {
ret void
}
-; GCN-LABEL: {{^}}ps_ieee_mode_off:
-; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
-; GCN: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
-; GCN-NOT: [[VAL0]]
-; GCN-NOT: [[VAL1]]
-; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
-; GCN-NOT: v_mul_f32
define amdgpu_ps void @ps_ieee_mode_off() #2 {
+; GCN-LABEL: ps_ieee_mode_off:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_mov_b32 s3, 0xf000
+; GCN-NEXT: s_mov_b32 s2, -1
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], 0 glc
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: v_min_f32_e32 v0, v0, v1
+; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_endpgm
%val0 = load volatile float, ptr addrspace(1) poison
%val1 = load volatile float, ptr addrspace(1) poison
%min = call float @llvm.minnum.f32(float %val0, float %val1)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index df9c97f..117af95 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -6551,271 +6551,205 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v39.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v149.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v149.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v147.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v145.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v49.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v71.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v68.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v133.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v134.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v99.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v87.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v81.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v32i32_to_v128i8:
@@ -15709,61 +15643,61 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:380
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v31, off, s32 offset:376
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v32, off, s32 offset:372
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:368
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:364
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:360
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v33, off, s32 offset:356
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:352
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:348
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:344
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v34, off, s32 offset:340
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v52, off, s32 offset:336
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:332
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:328
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v35, off, s32 offset:324
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:320
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:312
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v36, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:304
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v37, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:272
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:264
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v39, off, s32 offset:260
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v48, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v70, off, s32 offset:232
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v49, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:224
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_b32 v114, off, s32 offset:388
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_b32 v113, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:104
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v102, off, s32 offset:112
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v160, off, s32 offset:128
@@ -15778,121 +15712,123 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v164, off, s32 offset:192
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v165, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v113, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:20
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v112, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v115, off, s32 offset:4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v145.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v146.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v134.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.l, 8, v21.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v29.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(54)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v114
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(17)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v81.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(16)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.l, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.l, 8, v83.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v85.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.l, 8, v87.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v97.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(9)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v98.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v112.h, 8, v99.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v100.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v102.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.h, 8, v161.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v99.l, 8, v161.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v162.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.l, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.h, 8, v163.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v164.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v164.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.l, 8, v165.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v165.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v81.h, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v82.l, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.l, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.l, 8, v55.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.h, 8, v54.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v53.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v52.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v51.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v50.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v31.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.l, 8, v29.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(62)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v51.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(56)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v50.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v54.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(26)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(18)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v113
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(13)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.h, 8, v83.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v84.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.l, 8, v85.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v96.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v119.l, 8, v97.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(8)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v98.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.h, 8, v100.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v101.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v115.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v102.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.h, 8, v160.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v161.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v161.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.l, 8, v162.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.h, 8, v162.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v163.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v163.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.l, 8, v164.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v164.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.l, 8, v165.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.h, 8, v165.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.h, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v55.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v55.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v52.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v31.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -15903,215 +15839,179 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB14_4
; GFX11-TRUE16-NEXT: .LBB14_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB14_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v146.l
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v0.l, v151.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v151.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v0.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v150.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v144.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v149, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v1.h, v150.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v145.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v134.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v133.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v133.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v132.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v131.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v148.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v130.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v2.l, v148.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v2.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v134.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v134.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v145.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v130.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v149, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v3.l, v147.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v147.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v119.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v118.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v4.l, v144.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v4.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v133.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v117.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v129.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v128.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v116.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v116.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v115.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v115.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v149, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v5.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v132.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v129.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v112.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v149, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v6.l, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v128.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v103.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v101.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v149, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v7.l, v131.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v99.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v98.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v149, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v8.l, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v116.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v114.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v96.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v96.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v149, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v9.l, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v84.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v149, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v10.l, v117.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v102.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v84.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v112.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v103.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v99.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v98.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v87.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v87.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v86.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v81.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v81.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v149, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v11.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.l
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v80.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v80.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v149, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v12.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v97.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v69.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v149, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v13.l, v112.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v13.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v87.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v67.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v65.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v149, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v14.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v85.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v83.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v55.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v68.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v65.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v64.h
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v50.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v149, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v15.l, v100.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v82.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v49.l
; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v149, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v16.l, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.h
; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v48.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v149, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v17.l, v97.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v70.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v68.l
; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v149, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v18.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v66.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v37.l
; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v149, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v19.l, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v149, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v20.l, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v55.l
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v149, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v21.l, v81.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v33.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v149, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v22.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v150.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v150.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v151.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v146.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v147.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v147.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v148.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v134.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v144.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v130.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v130.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v131.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v131.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v132.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v117.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v117.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v118.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v113.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v113.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v114.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v114.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v115.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v100.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v101.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v102.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v102.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v17.l, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v96.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.l, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v97.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v19.l, v98.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v83.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v84.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v84.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v21.l, v85.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v85.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v22.l, v70.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.l, v71.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v24.l, v80.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v25.l, v66.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v26.l, v67.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v27.l, v53.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v28.l, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v55.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v29.l, v55.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v50.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v30.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v31.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v52.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
@@ -16133,433 +16033,329 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v149, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v23.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v51.l
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v149, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v24.l, v67.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v149, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v25.l, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v149, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v26.l, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v149, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v27.l, v54.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v149, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v28.l, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v149, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v29.l, v52.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v29.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v149, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v30.l, v51.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v149, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v31.l, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v149, v31
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB14_2
; GFX11-TRUE16-NEXT: .LBB14_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v149.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v149.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v146.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v145.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v133.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v133.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v129.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v129.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v128.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v128.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v116.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v116.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v112.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v103.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v99.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v99.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v98.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v87.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v87.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v86.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v83.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v82.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v82.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v81.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, v70.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, v69.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v68.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, v65.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, v65.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v64.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v64.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, v53.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, v48.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, v48.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, v32.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v151.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v151.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v150.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v150.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v144.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v134.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v31, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v148.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v31, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v31.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v147.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v131.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v31, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v130.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v130.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v144.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v145.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v31, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v119.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v31, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v118.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v117.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v133.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v133.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v31, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v131.h, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v132.l, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v115.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v31, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v113.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v129.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v129.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v31, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v128.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v128.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v103.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v31, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v101.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v117.h, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v118.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v31, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v116.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v116.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v99.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v98.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v31, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v96.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v96.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v31, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v112.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v113.l, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v86.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v31, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v84.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v84.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v102.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v102.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v31, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v100.h, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.l, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v82.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v31, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v80.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v80.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v98.h, v15.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v99.l, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v31, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v97.l, v16.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v97.h, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v69.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v31, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v68.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v67.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v87.l, v17.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v87.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v31, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v85.l, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v85.h, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v65.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v65.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v31, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v50.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v83.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v31, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v81.h, v20.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v82.l, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v31, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v48.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.l, v21.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v71.h, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v31, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v70.l, v22.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v70.h, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v31, v25
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v67.h, v23.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v68.l, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v31, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.l, v24.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v66.h, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v31, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v64.l, v25.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v64.h, v25.h
+; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v31, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v54.h, v26.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v55.l, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v31, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v53.h, v27.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v31, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v34.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v52.h, v28.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v53.l, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v34
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v51.h, v29.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v52.l, v29.h
+; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v50.h, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v51.l, v30.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v32.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v31, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v150.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v150.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v151.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v151.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v146.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v147.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v148.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v134.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v144.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v144.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v130.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v130.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v131.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v131.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v132.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v117.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v117.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v118.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v118.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v119.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v113.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v113.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v115.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v100.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v101.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.h, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v102.l, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v102.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v96.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v96.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v97.l, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v97.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v98.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v84.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v84.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v85.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v85.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v70.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v71.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v80.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v80.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v66.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v67.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v67.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v68.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v53.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v54.h, v28.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v55.l, v28.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v55.h, v29.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v50.h, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v51.l, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v51.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v52.l, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v52.h, v31.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, 0x300, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v16.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, 0x300, v17.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v17.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, 0x300, v18.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v18.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, 0x300, v19.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v19.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, 0x300, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v20.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v21.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v21.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, 0x300, v22.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v22.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, 0x300, v23.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v23.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, 0x300, v24.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v24.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v25.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v25.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, 0x300, v26.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v26.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, 0x300, v27.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v27.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, 0x300, v28.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v28.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, 0x300, v29.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v29.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, 0x300, v30.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v30.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v31.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, 0x300, v31.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -42692,271 +42488,205 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v39.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v149.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v149.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v147.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v145.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v49.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v71.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v68.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v133.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v134.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v99.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v87.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v81.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v32f32_to_v128i8:
@@ -53003,61 +52733,61 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:380
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v31, off, s32 offset:376
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v32, off, s32 offset:372
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:368
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:364
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:360
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v33, off, s32 offset:356
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:352
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:348
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:344
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v34, off, s32 offset:340
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v52, off, s32 offset:336
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:332
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:328
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v35, off, s32 offset:324
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:320
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:312
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v36, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:304
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v37, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:272
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:264
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v39, off, s32 offset:260
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v48, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v70, off, s32 offset:232
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v49, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:224
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_b32 v114, off, s32 offset:388
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_b32 v113, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:104
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v102, off, s32 offset:112
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v160, off, s32 offset:128
@@ -53072,121 +52802,123 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v164, off, s32 offset:192
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v165, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v113, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:20
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v112, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v115, off, s32 offset:4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v145.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v146.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v134.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.l, 8, v21.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v29.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(54)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v114
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(17)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v81.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(16)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.l, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.l, 8, v83.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v85.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.l, 8, v87.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v97.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(9)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v98.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v112.h, 8, v99.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v100.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v102.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.h, 8, v161.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v99.l, 8, v161.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v162.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.l, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.h, 8, v163.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v164.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v164.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.l, 8, v165.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v165.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v81.h, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v82.l, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.l, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.l, 8, v55.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.h, 8, v54.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v53.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v52.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v51.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v50.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v31.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.l, 8, v29.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(62)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v51.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(56)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v50.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v54.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(26)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(18)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v113
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(13)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.h, 8, v83.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v84.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.l, 8, v85.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v96.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v119.l, 8, v97.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(8)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v98.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.h, 8, v100.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v101.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v115.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v102.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.h, 8, v160.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v161.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v161.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.l, 8, v162.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.h, 8, v162.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v163.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v163.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.l, 8, v164.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v164.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.l, 8, v165.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.h, 8, v165.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.h, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v55.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v55.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v52.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v31.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -53197,215 +52929,179 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB38_4
; GFX11-TRUE16-NEXT: .LBB38_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB38_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v146.l
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v0.l, v151.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v151.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v0.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v150.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v144.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v149, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v1.h, v150.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v145.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v134.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v133.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v133.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v132.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v131.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v148.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v130.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v2.l, v148.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v2.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v134.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v134.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v145.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v130.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v149, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v3.l, v147.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v147.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v119.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v118.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v4.l, v144.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v4.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v133.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v117.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v129.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v128.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v116.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v116.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v115.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v115.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v149, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v5.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v132.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v129.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v112.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v149, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v6.l, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v128.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v103.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v101.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v149, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v7.l, v131.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v99.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v98.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v149, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v8.l, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v116.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v114.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v96.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v96.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v149, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v9.l, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v84.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v149, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v10.l, v117.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v102.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v84.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v112.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v103.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v99.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v98.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v87.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v87.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v86.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v81.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v81.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v149, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v11.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.l
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v80.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v80.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v149, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v12.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v97.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v69.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v149, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v13.l, v112.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v13.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v87.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v67.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v65.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v149, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v14.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v85.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v83.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v55.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v68.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v65.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v64.h
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v50.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v149, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v15.l, v100.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v82.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v49.l
; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v149, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v16.l, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.h
; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v48.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v149, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v17.l, v97.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v70.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v68.l
; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v149, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v18.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v66.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v37.l
; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v149, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v19.l, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v149, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v20.l, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v55.l
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v149, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v21.l, v81.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v33.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v149, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v22.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v150.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v150.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v151.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v146.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v147.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v147.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v148.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v134.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v144.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v130.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v130.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v131.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v131.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v132.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v117.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v117.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v118.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v113.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v113.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v114.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v114.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v115.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v100.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v101.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v102.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v102.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v17.l, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v96.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.l, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v97.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v19.l, v98.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v83.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v84.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v84.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v21.l, v85.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v85.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v22.l, v70.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.l, v71.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v24.l, v80.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v25.l, v66.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v26.l, v67.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v27.l, v53.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v28.l, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v55.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v29.l, v55.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v50.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v30.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v31.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v52.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
@@ -53427,433 +53123,329 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v149, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v23.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v51.l
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v149, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v24.l, v67.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v149, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v25.l, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v149, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v26.l, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v149, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v27.l, v54.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v149, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v28.l, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v149, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v29.l, v52.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v29.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v149, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v30.l, v51.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v149, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v31.l, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v149, v31
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB38_2
; GFX11-TRUE16-NEXT: .LBB38_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v149.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v149.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v146.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v145.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v133.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v133.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v129.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v129.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v128.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v128.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v116.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v116.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v112.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v103.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v99.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v99.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v98.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v87.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v87.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v86.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v83.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v82.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v82.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v81.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, v70.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, v69.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v68.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, v65.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, v65.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v64.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v64.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, v53.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, v48.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, v48.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, v32.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v151.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v151.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v150.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v150.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v144.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v134.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v31, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v148.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v31, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v31.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v147.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v131.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v31, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v130.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v130.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v144.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v145.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v31, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v119.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v31, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v118.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v117.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v133.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v133.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v31, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v131.h, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v132.l, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v115.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v31, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v113.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v129.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v129.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v31, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v128.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v128.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v103.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v31, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v101.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v117.h, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v118.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v31, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v116.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v116.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v99.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v98.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v31, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v96.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v96.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v31, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v112.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v113.l, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v86.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v31, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v84.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v84.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v102.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v102.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v31, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v100.h, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.l, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v82.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v31, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v80.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v80.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v98.h, v15.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v99.l, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v31, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v97.l, v16.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v97.h, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v69.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v31, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v68.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v67.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v87.l, v17.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v87.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v31, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v85.l, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v85.h, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v65.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v65.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v31, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v50.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v83.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v31, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v81.h, v20.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v82.l, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v31, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v48.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.l, v21.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v71.h, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v31, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v70.l, v22.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v70.h, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v31, v25
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v67.h, v23.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v68.l, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v31, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.l, v24.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v66.h, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v31, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v64.l, v25.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v64.h, v25.h
+; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v31, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v54.h, v26.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v55.l, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v31, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v53.h, v27.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v31, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v34.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v52.h, v28.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v53.l, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v34
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v51.h, v29.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v52.l, v29.h
+; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v50.h, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v51.l, v30.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v32.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v31, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v150.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v150.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v151.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v151.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v146.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v147.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v148.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v134.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v144.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v144.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v130.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v130.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v131.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v131.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v132.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v117.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v117.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v118.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v118.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v119.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v113.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v113.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v115.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v100.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v101.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.h, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v102.l, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v102.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v96.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v96.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v97.l, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v97.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v98.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v84.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v84.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v85.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v85.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v70.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v71.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v80.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v80.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v66.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v67.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v67.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v68.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v53.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v54.h, v28.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v55.l, v28.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v55.h, v29.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v50.h, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v51.l, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v51.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v52.l, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v52.h, v31.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, 0x300, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v16.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, 0x300, v17.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v17.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, 0x300, v18.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v18.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, 0x300, v19.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v19.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, 0x300, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v20.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v21.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v21.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, 0x300, v22.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v22.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, 0x300, v23.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v23.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, 0x300, v24.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v24.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v25.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v25.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, 0x300, v26.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v26.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, 0x300, v27.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v27.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, 0x300, v28.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v28.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, 0x300, v29.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v29.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, 0x300, v30.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v30.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v31.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, 0x300, v31.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -78968,271 +78560,205 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v39.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v149.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v149.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v147.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v145.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v49.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v71.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v68.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v133.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v134.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v99.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v87.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v81.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v16i64_to_v128i8:
@@ -88136,61 +87662,61 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:380
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v31, off, s32 offset:376
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v32, off, s32 offset:372
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:368
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:364
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:360
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v33, off, s32 offset:356
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:352
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:348
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:344
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v34, off, s32 offset:340
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v52, off, s32 offset:336
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:332
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:328
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v35, off, s32 offset:324
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:320
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:312
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v36, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:304
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v37, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:272
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:264
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v39, off, s32 offset:260
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v48, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v70, off, s32 offset:232
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v49, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:224
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_b32 v114, off, s32 offset:388
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_b32 v113, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:104
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v102, off, s32 offset:112
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v160, off, s32 offset:128
@@ -88205,121 +87731,123 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v164, off, s32 offset:192
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v165, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v113, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:20
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v112, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v115, off, s32 offset:4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v145.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v146.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v134.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.l, 8, v21.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v29.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(54)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v114
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(17)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v81.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(16)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.l, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.l, 8, v83.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v85.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.l, 8, v87.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v97.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(9)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v98.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v112.h, 8, v99.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v100.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v102.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.h, 8, v161.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v99.l, 8, v161.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v162.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.l, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.h, 8, v163.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v164.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v164.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.l, 8, v165.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v165.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v81.h, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v82.l, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.l, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.l, 8, v55.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.h, 8, v54.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v53.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v52.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v51.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v50.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v31.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.l, 8, v29.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(62)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v51.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(56)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v50.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v54.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(26)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(18)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v113
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(13)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.h, 8, v83.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v84.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.l, 8, v85.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v96.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v119.l, 8, v97.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(8)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v98.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.h, 8, v100.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v101.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v115.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v102.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.h, 8, v160.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v161.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v161.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.l, 8, v162.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.h, 8, v162.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v163.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v163.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.l, 8, v164.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v164.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.l, 8, v165.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.h, 8, v165.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.h, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v55.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v55.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v52.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v31.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -88330,215 +87858,179 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB58_4
; GFX11-TRUE16-NEXT: .LBB58_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB58_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v146.l
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v0.l, v151.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v151.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v0.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v150.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v144.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v149, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v1.h, v150.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v145.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v134.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v133.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v133.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v132.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v131.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v148.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v130.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v2.l, v148.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v2.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v134.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v134.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v145.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v130.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v149, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v3.l, v147.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v147.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v119.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v118.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v4.l, v144.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v4.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v133.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v117.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v129.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v128.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v116.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v116.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v115.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v115.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v149, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v5.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v132.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v129.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v112.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v149, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v6.l, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v128.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v103.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v101.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v149, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v7.l, v131.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v99.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v98.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v149, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v8.l, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v116.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v114.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v96.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v96.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v149, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v9.l, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v84.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v149, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v10.l, v117.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v102.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v84.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v112.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v103.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v99.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v98.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v87.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v87.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v86.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v81.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v81.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v149, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v11.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.l
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v80.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v80.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v149, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v12.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v97.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v69.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v149, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v13.l, v112.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v13.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v87.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v67.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v65.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v149, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v14.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v85.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v83.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v55.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v68.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v65.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v64.h
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v50.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v149, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v15.l, v100.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v82.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v49.l
; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v149, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v16.l, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.h
; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v48.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v149, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v17.l, v97.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v70.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v68.l
; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v149, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v18.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v66.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v37.l
; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v149, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v19.l, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v149, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v20.l, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v55.l
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v149, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v21.l, v81.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v33.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v149, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v22.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v150.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v150.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v151.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v146.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v147.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v147.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v148.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v134.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v144.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v130.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v130.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v131.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v131.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v132.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v117.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v117.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v118.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v113.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v113.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v114.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v114.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v115.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v100.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v101.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v102.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v102.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v17.l, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v96.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.l, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v97.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v19.l, v98.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v83.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v84.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v84.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v21.l, v85.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v85.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v22.l, v70.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.l, v71.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v24.l, v80.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v25.l, v66.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v26.l, v67.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v27.l, v53.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v28.l, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v55.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v29.l, v55.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v50.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v30.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v31.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v52.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
@@ -88560,433 +88052,329 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v149, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v23.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v51.l
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v149, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v24.l, v67.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v149, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v25.l, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v149, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v26.l, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v149, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v27.l, v54.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v149, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v28.l, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v149, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v29.l, v52.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v29.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v149, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v30.l, v51.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v149, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v31.l, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v149, v31
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB58_2
; GFX11-TRUE16-NEXT: .LBB58_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v149.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v149.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v146.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v145.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v133.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v133.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v129.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v129.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v128.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v128.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v116.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v116.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v112.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v103.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v99.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v99.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v98.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v87.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v87.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v86.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v83.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v82.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v82.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v81.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, v70.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, v69.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v68.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, v65.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, v65.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v64.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v64.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, v53.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, v48.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, v48.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, v32.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v151.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v151.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v150.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v150.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v144.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v134.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v31, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v148.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v31, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v31.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v147.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v131.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v31, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v130.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v130.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v144.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v145.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v31, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v119.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v31, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v118.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v117.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v133.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v133.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v31, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v131.h, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v132.l, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v115.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v31, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v113.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v129.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v129.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v31, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v128.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v128.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v103.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v31, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v101.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v117.h, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v118.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v31, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v116.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v116.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v99.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v98.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v31, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v96.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v96.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v31, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v112.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v113.l, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v86.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v31, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v84.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v84.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v102.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v102.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v31, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v100.h, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.l, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v82.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v31, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v80.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v80.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v98.h, v15.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v99.l, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v31, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v97.l, v16.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v97.h, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v69.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v31, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v68.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v67.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v87.l, v17.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v87.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v31, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v85.l, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v85.h, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v65.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v65.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v31, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v50.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v83.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v31, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v81.h, v20.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v82.l, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v31, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v48.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.l, v21.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v71.h, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v31, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v70.l, v22.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v70.h, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v31, v25
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v67.h, v23.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v68.l, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v31, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.l, v24.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v66.h, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v31, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v64.l, v25.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v64.h, v25.h
+; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v31, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v54.h, v26.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v55.l, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v31, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v53.h, v27.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v31, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v34.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v52.h, v28.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v53.l, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v34
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v51.h, v29.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v52.l, v29.h
+; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v50.h, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v51.l, v30.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v32.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v31, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v150.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v150.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v151.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v151.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v146.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v147.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v148.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v134.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v144.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v144.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v130.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v130.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v131.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v131.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v132.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v117.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v117.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v118.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v118.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v119.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v113.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v113.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v115.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v100.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v101.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.h, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v102.l, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v102.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v96.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v96.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v97.l, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v97.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v98.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v84.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v84.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v85.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v85.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v70.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v71.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v80.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v80.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v66.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v67.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v67.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v68.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v53.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v54.h, v28.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v55.l, v28.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v55.h, v29.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v50.h, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v51.l, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v51.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v52.l, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v52.h, v31.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, 0x300, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v16.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, 0x300, v17.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v17.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, 0x300, v18.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v18.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, 0x300, v19.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v19.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, 0x300, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v20.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v21.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v21.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, 0x300, v22.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v22.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, 0x300, v23.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v23.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, 0x300, v24.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v24.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v25.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v25.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, 0x300, v26.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v26.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, 0x300, v27.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v27.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, 0x300, v28.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v28.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, 0x300, v29.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v29.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, 0x300, v30.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v30.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v31.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, 0x300, v31.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -113114,271 +112502,205 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v39.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v149.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v149.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v147.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v145.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v49.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v71.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v68.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v133.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v134.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v99.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v87.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v81.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v16f64_to_v128i8:
@@ -123405,61 +122727,61 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:380
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v31, off, s32 offset:376
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v32, off, s32 offset:372
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:368
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:368
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v33, off, s32 offset:364
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v51, off, s32 offset:360
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v33, off, s32 offset:356
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v51, off, s32 offset:352
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v50, off, s32 offset:352
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:348
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v52, off, s32 offset:344
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v34, off, s32 offset:340
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v52, off, s32 offset:336
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v35, off, s32 offset:332
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:328
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:328
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v35, off, s32 offset:324
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:320
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:320
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v36, off, s32 offset:316
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v54, off, s32 offset:312
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v53, off, s32 offset:312
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v36, off, s32 offset:308
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v54, off, s32 offset:304
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:304
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v37, off, s32 offset:300
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v55, off, s32 offset:296
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:296
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v37, off, s32 offset:292
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:288
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:288
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v38, off, s32 offset:284
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:280
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:280
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:276
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v66, off, s32 offset:272
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v39, off, s32 offset:268
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v66, off, s32 offset:264
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:264
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v39, off, s32 offset:260
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v67, off, s32 offset:256
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:256
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v48, off, s32 offset:252
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v68, off, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:248
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v48, off, s32 offset:244
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:240
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v49, off, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v70, off, s32 offset:232
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v49, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v71, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:224
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v50, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v71, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_b32 v114, off, s32 offset:388
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_b32 v113, off, s32 offset:388
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v83, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v85, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v85, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v97, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v97, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v100, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v101, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v102, off, s32 offset:104
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v102, off, s32 offset:112
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v160, off, s32 offset:120
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v160, off, s32 offset:128
@@ -123474,121 +122796,123 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v164, off, s32 offset:192
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v165, off, s32 offset:200
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v165, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v55, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v67, off, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v80, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v80, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v53, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v64, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v64, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v65, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v65, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v68, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v69, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v69, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v70, off, s32 offset:148
; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v81, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v84, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v84, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v96, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v96, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v98, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v101, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v113, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v81, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v82, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v82, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v83, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v86, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v86, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v87, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v87, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v98, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v99, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v99, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v100, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v103, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v103, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v112, off, s32 offset:20
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v115, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v112, off, s32 offset:12
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v115, off, s32 offset:4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.l, v30.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v118.h, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.l, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v116.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v119.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v132.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v145.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v150.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v151.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v146.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v147.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.l, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v148.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v134.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.l, 8, v21.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v135.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v133.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v29.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(54)
-; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v114
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(17)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v81.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(16)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.l, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v129.h, 8, v83.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.l, 8, v83.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v128.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v85.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v87.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.l, 8, v87.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v116.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v97.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(9)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v98.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v112.h, 8, v99.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v100.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v101.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v102.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.h, 8, v161.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v99.l, 8, v161.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v162.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.l, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v87.h, 8, v163.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v164.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v164.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.l, 8, v165.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v165.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v81.h, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v82.l, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.l, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.l, 8, v55.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v64.h, 8, v54.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v53.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v52.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v52.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v51.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v50.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v31.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v144.h, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.l, 8, v29.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(62)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v51.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v51.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(56)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v50.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v54.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(26)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.h, 8, v53.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v66.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v71.l, 8, v71.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(18)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v70.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v113
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(13)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v130.h, 8, v83.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v131.h, 8, v84.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v132.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.l, 8, v85.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v117.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.l, 8, v96.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v118.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v119.l, 8, v97.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(8)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.l, 8, v98.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v113.h, 8, v100.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.l, 8, v101.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v114.h, 8, v101.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v115.l, 8, v102.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v100.h, 8, v102.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.l, 8, v160.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v101.h, 8, v160.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.l, 8, v161.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v102.h, 8, v161.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.l, 8, v162.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v96.h, 8, v162.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.l, 8, v163.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v97.h, 8, v163.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v98.l, 8, v164.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v83.h, 8, v164.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.l, 8, v165.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v84.h, 8, v165.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v85.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v80.h, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v67.h, 8, v55.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v68.l, 8, v55.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v52.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v31.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -123599,215 +122923,179 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB74_4
; GFX11-TRUE16-NEXT: .LBB74_2: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB74_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v149.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v146.l
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v0.l, v151.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v151.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v0.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v150.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v144.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v149, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v1.h, v150.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v146.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v145.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v134.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v133.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v133.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v132.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v131.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v148.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v130.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v2.l, v148.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v2.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v134.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v134.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v145.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v130.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v149, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v3.l, v147.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v147.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v119.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v118.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v149, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v4.l, v144.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v4.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v133.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v117.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v129.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v129.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v128.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v119.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v116.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v116.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v115.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v115.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v149, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v5.l, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v132.l
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v129.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v112.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v149, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v6.l, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v128.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v103.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v101.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v149, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v7.l, v131.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v99.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v98.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v149, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v8.l, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v116.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v114.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v96.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v96.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v149, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v9.l, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v113.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v84.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v149, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v10.l, v117.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v102.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v84.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v112.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v103.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v99.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v98.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v87.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v87.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v86.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v82.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v81.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v81.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v149, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v11.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.l
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v80.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v80.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v149, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v12.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v149.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v97.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v69.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v149, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v13.l, v112.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v13.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v87.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v67.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v65.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v149, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v14.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v85.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v83.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v55.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v69.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v68.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v65.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v64.h
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v50.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v149, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v15.l, v100.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v82.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v49.l
; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v149, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v16.l, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.h
; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v48.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v149, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v17.l, v97.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v70.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v68.l
; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v149, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v18.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v66.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v37.l
; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v149, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v19.l, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v149, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v20.l, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v55.l
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v54.l
; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v149, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v21.l, v81.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v149.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v53.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v33.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v149, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v22.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v150.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v150.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v151.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v146.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v147.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v147.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v148.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v134.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v135.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v144.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v130.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v130.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v131.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v131.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v132.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v117.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v117.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v118.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v118.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v113.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v113.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v114.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v114.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v115.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v100.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v101.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v101.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v102.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v102.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v17.l, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v96.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.l, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v97.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v19.l, v98.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v83.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v84.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v84.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v21.l, v85.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v85.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v22.l, v70.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v71.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.l, v71.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v80.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v24.l, v80.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v66.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v25.l, v66.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v26.l, v67.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v68.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v27.l, v53.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v28.l, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v55.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v29.l, v55.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v50.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v30.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v31.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v52.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
@@ -123829,433 +123117,329 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v149, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v23.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v149.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v51.l
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v149, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v24.l, v67.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v149, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v25.l, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v25.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v149, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v26.l, v64.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v149, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v27.l, v54.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v27.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v149, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v28.l, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v149, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v29.l, v52.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v29.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v149, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v30.l, v51.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.l, v149.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v149, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v149.l, v31.l, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v149.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v149, v31
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB74_2
; GFX11-TRUE16-NEXT: .LBB74_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v149.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v149.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v146.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v146.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v145.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v133.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v133.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v129.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v129.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v128.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v128.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v116.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v116.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v112.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v103.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v99.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v99.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v98.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v87.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v87.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v86.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v83.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v82.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v82.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v81.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, v70.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, v69.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v68.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, v65.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, v65.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v64.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v64.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, v53.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, v48.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, v48.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, v32.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v151.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v151.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v150.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v150.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v145.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v144.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v134.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v31, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v134.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v148.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v31, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v31.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v147.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v132.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v131.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v31, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v130.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v130.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v144.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v145.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v31, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v119.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v119.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v31, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v118.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v117.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v133.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v133.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v31, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v131.h, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v132.l, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v115.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v115.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v31, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v113.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v112.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v129.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v129.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v31, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v128.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v128.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v103.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v103.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v31, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v101.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v100.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v117.h, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v118.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v31, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v116.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v116.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v99.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v98.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v31, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v96.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v96.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v31, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v112.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v113.l, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v86.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v86.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v31, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v84.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v84.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v102.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v102.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v31, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v100.h, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.l, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v82.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v81.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v31, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, v80.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, v80.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v98.h, v15.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v99.l, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v31, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v97.l, v16.l
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v97.h, v16.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v69.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v69.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v31, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v17.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v17.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, v68.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, v67.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v87.l, v17.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v87.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v31, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v85.l, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v85.h, v18.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v65.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v65.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v31, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, v50.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v83.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v31, v22
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v81.h, v20.l
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v82.l, v20.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v31, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v21.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, v48.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.l, v21.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v71.h, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v31, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v70.l, v22.l
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v70.h, v22.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v39.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v31, v25
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v23.h
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v67.h, v23.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v68.l, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v31, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.l, v24.l
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v66.h, v24.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v31, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v25.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v25.h
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v64.l, v25.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v64.h, v25.h
+; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v31, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v54.h, v26.l
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v55.l, v26.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v31, v29
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v27.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v53.h, v27.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v31, v30
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v34.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v52.h, v28.l
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v53.l, v28.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v34
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v29.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v29.h
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v51.h, v29.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v52.l, v29.h
+; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v33.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.l, v50.h, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v51.l, v30.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v33
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v32.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v32.h, 0x300, v32.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v31, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v150.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v150.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v151.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v151.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v146.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v147.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v147.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v148.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v148.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v134.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v135.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v135.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v144.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v144.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v130.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v130.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v131.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v131.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v132.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v117.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v117.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v118.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v118.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v119.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v113.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v113.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v114.l, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v114.h, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v115.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v100.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v101.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v101.h, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v102.l, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v102.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v96.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v96.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v97.l, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v97.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v98.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v83.h, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v84.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v84.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v85.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v85.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v70.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v71.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v71.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v80.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v80.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v66.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v25.l, v66.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v67.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v26.l, v67.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v68.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v53.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v54.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v28.l, v54.h, v28.l
+; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v55.l, v28.h
+; GFX11-TRUE16-NEXT: v_or_b16 v29.l, v55.h, v29.l
+; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v50.h, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v30.l, v51.l, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v51.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v52.l, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v52.h, v31.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.l, 0x300, v16.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v16.h, 0x300, v16.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.l, 0x300, v17.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v17.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.l, 0x300, v18.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v18.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.l, 0x300, v19.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v19.h, 0x300, v19.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.l, 0x300, v20.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v20.h, 0x300, v20.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v21.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.h, 0x300, v21.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.l, 0x300, v22.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v22.h, 0x300, v22.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.l, 0x300, v23.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v23.h, 0x300, v23.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.l, 0x300, v24.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v24.h, 0x300, v24.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v25.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.h, 0x300, v25.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.l, 0x300, v26.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v26.h, 0x300, v26.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.l, 0x300, v27.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v27.h, 0x300, v27.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.l, 0x300, v28.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v28.h, 0x300, v28.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.l, 0x300, v29.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v29.h, 0x300, v29.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.l, 0x300, v30.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v30.h, 0x300, v30.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.l, 0x300, v31.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v31.h, 0x300, v31.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -161654,179 +160838,182 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:236
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:200
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:176
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:168
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:160
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:148
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:136
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:128
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:120
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:112
-; GFX11-TRUE16-NEXT: s_clause 0x18
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v138, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v139, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v140, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v141, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v142, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v143, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b32 off, v152, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:248
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:244
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:232
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:208
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:192
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:176
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:168
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:152
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:144
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:136
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:128
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:124
+; GFX11-TRUE16-NEXT: s_clause 0x1b
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v138, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v139, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v140, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v141, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v142, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v143, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v152, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v153, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v154, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v155, s32 offset:12
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v99, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v98, off, s32
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_hi16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v81, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v80, off, s32
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr152_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr143_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr141_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr140_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr139_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr138_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr137_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr136_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr126_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr127_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr125_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr123_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr121_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr111_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr109_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr107_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr106_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr105_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr92_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr91_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr127_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr89_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr136_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr106_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr142_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr125_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr153_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr139_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr143_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr141_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr155_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr154_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr124_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr142_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr122_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr120_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr110_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr138_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr137_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr126_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr108_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr105_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr124_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr122_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr120_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr92_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr90_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr88_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr110_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr108_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr90_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr88_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
@@ -161835,136 +161022,136 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[84:85], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[13:14]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[7:8]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[144:145], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[85:86], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v13
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v127, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v143, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v152, 8, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v99
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v99
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v81
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v98
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v80
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v142, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[128:129], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[145:146], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[98:99]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v1.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[29:30]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[132:133], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v1.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v180.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v40.h, v3.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v3.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v56.h, v5.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v41.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v42.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v40.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v79.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v60.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.h, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v106.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.h, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v76.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.h, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v127.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.h, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v104.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v142.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v125.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v143.h, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.h, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v141.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.h, v16.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v135.h, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v72.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v7.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v46.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v8.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v104.h, v9.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v9.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v74.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v10.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v136.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v102.h, v11.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v106.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.h, v12.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v153.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.h, v13.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v139.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.h, v14.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v155.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.h, v15.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v154.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v16.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v17.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v17.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v19.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v151.h, v19.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.h, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.h, v20.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.h, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.h, v21.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v21.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v160.h, v22.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.h, v22.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v160.h, v23.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v23.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v151.h, v24.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v24.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v24.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v25.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v25.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v26.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v27.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.h, v28.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v28.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.h, v29.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.h, v29.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v30.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v30.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v98.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v98.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v99.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v99.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v81.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
@@ -161980,7 +161167,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81
; GFX11-TRUE16-NEXT: .LBB90_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_4
@@ -162019,10 +161206,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v37, v48, v17, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 24, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v32
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v135, v37, v49, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v149, v37, v49, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v19
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
@@ -162036,97 +161223,101 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v20, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v135.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v149.h
; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v36, 16, 1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v147, v33, v35, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v150, v33, v35, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v19
; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v36, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[132:133], 24, v[31:32]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v34, v17, v34, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v34.l, v147.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v142, 8, v31
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v19, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v34
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 8, v34
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v148, v17, v33, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v151, v17, v33 :: v_dual_and_b32 v18, 0xffff0000, v22
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v33, v20, v35 :: v_dual_and_b32 v18, 0xffff0000, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v18 :: v_dual_cndmask_b32 v33, v20, v35
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v21
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_add_f32 v22, 0x40c00000, v22
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v20, 0x40c00000, v20 :: v_dual_add_f32 v21, 0x40c00000, v21
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v34.l, v150.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v33.l, v151.h
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v22
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 24, v34
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v34
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v149, v19, v35 :: v_dual_lshlrev_b32 v22, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v33
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v160, v19, v35, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v24
; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v21
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v36, v17, v36, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.l, v149.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v23
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v150, v17, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v161, v17, v24, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v23
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
; GFX11-TRUE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 24, v36
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.l, v160.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v35, v19, v35, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v33.l, v148.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v36
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.l, v161.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v26
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v33
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v151, v19, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v35
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v162, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v26
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v38, v17, v24, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v151.h
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v160, v17, v23 :: v_dual_lshlrev_b32 v21, 16, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v36
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v163, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
@@ -162139,8 +161330,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v161, v19, v23 :: v_dual_lshlrev_b32 v22, 16, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v28
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v163.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v164, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
@@ -162153,10 +161346,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.l, v161.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.l, v150.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v162, v17, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v37
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
@@ -162169,10 +161361,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v49
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v35
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v163, v19, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v162.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v165.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
@@ -162185,10 +161377,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v29
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.l, v163.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 24, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v38
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v164, v17, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v38
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
@@ -162201,14 +161393,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v99
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v51
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v19, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v81
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v50.l, v167.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v99
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v81
; GFX11-TRUE16-NEXT: v_dual_add_f32 v22, 0x40c00000, v22 :: v_dual_cndmask_b32 v53, v17, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
@@ -162217,14 +161409,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v98
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v165.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v17, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v80
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.l, v164.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v177, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v98
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v80
; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_cndmask_b32 v52, v19, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -162233,10 +161425,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v37
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v19, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v177.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v49
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v178, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v2
@@ -162249,10 +161441,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v167.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v17, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v179, v17, v22, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v1
@@ -162263,13 +161454,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff
; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v20, 0x40c00000, v20
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v55
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v55
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v179.h
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v20, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v177, v19, v21, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v180, v19, v21, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -162282,11 +161472,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v162.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v65.l, v177.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v48
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v178, v17, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v181, v17, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
@@ -162301,9 +161490,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v6
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 24, v65
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v65
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v179, v2, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.l, v166.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v181.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v182, v2, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v17, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v3
@@ -162313,13 +161502,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v17, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v67.l, v179.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v51
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v50.l, v164.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 24, v67
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v40, v1, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v176.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v51
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v183, v1, v18, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6
@@ -162330,13 +161519,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[84:85], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v66.l, v183.h
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[85:86], 24, v[48:49]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[37:38]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 8, v67
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v42, v2, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v50
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v40, v2, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v8
@@ -162350,28 +161539,27 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v3
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v50
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v56, v2, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v41, v2, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v5, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v48
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v68, v1, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v2, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v56.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v41.h
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v60, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v46, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v10
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v83, v1, v8
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v71, v1, v8
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -162380,29 +161568,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.l, v60.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v166.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v82, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.l, v46.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v70, v1, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v79, v4, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v72, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.l, v79.h
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v76, v1, v4 :: v_dual_lshlrev_b32 v1, 16, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v178.h
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v74, v1, v4 :: v_dual_lshlrev_b32 v1, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v97, v2, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v85, v2, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
@@ -162410,40 +161598,40 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.l, v76.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v176.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[82:83]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v96, v2, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v67.l, v182.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v74.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.l, v72.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v84, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[54:55]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[128:129], 24, v[70:71]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55]
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v106, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v104, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.l, v106.h
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v104, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.l, v104.h
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v106, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[96:97]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v65.l, v180.h
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v113, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v103, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.l, v104.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v112, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.l, v106.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[84:85]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v102, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
@@ -162452,8 +161640,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v127, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v136, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
@@ -162461,19 +161649,19 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v129, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v131, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v16
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v125, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v139, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v40.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v128, v3, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v131.l, v139.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v130, v3, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v16
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
@@ -162481,11 +161669,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v125.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.l, v127.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v102.l, v136.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v40.h
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v142, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v153, v4, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
@@ -162494,389 +161682,322 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v142.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v141, v2, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v130.l, v153.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v154, v2, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v42.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[112:113]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v143, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[130:131]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[114:115], 24, v[102:103]
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v155, v7, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[144:145], 24, v[66:67]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[68:69]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[68:69]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[145:146], 24, v[64:65]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v134, v4, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v148, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v134.l, v141.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[33:34]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v129
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v129
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v133, v2, v3, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v133.l, v143.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v134
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v134
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v128
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v113
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[133:134]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[128:129]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v133
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v113
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 8, v112
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 24, v97
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 8, v97
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v96
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 24, v83
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 8, v83
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v82
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 24, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v68
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v66
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.l, v154.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[115:116], 24, v[35:36]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v131
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v147, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.l, v155.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v148
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v148
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v131
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 8, v130
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[147:148]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v147
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v103
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v103
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v102
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 24, v85
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v85
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 24, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 8, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 24, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v127, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 24, v65
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v143, 8, v65
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v152, 8, v64
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v54
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v52
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 24, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v55
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v54
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v52
; GFX11-TRUE16-NEXT: .LBB90_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v178.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v181.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v152.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v64.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.l, v1.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v139.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v180.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v143.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v141.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v183.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v140.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v144.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v1.h
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v177.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v140.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v144.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v1
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v67.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v2.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.l, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v40.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v138.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v136.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v182.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v127.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v125.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v41.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v123.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v3.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.l, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v179.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v137.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v134.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v40.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v121.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v3
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v82.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v4.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.l, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v56.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v126.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v83.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v107.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v5.l, v5.h
; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v6.l, v6.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v7.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v42.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v123.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v96.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v5, v6
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v97.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v7.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.l, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v79.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v111.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v91.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v112.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v5, v7
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v8.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v60.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v109.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v75.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v5, v8
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v128.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v106.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v95.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v129.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v5, v9
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v61.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v111.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v72.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v109.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v70.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v46.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v107.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v105.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v104.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v92.l
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v85.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v89.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v136.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v79.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v102.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v106.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v77.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v103.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v75.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v84.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v74.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v91.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v153.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v62.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v130.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v139.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v61.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v131.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v59.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v155.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v57.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v147.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v96.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v154.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v47.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v148.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v44.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v149.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v142.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v132.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v39.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v138.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v137.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v151.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v126.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v118.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v150.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v124.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v76.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v93.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v133.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v5, v10
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v134.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v11.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v12.l, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v127.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v89.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v45.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v5, v11
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.l, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v13.l, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v104.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v78.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v120.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v5, v12
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v13.l, v13.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v142.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v73.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v34.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v5, v13
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v105.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v14.l, v14.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v15.l, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v125.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v63.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v35.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v5, v14
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v34.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v122.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v161.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v120.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v35.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v160.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v110.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v36.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v108.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v163.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v95.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v37.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v162.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v94.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v38.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v93.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v165.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v90.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v143.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v58.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v90.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v5, v15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v16.l, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v17.l, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v141.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v47.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v38.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v74.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v5, v16
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v17.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v18.l, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v135.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v124.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v5, v17
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v28.h, 8, v59.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v18.l, v18.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.l, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v122.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v50.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v5, v18
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v51.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v19.l, v19.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v20.l, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v148.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v110.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v44.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v52.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v5, v19
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v31.h, 8, v80.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v48.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v164.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v88.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v49.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v78.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v167.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v76.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v50.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v100.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v166.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v73.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v51.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v63.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v177.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v60.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v52.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v176.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v58.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v147.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v108.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v53.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v32.h, 8, v183.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v5, v20
-; GFX11-TRUE16-NEXT: v_and_b16 v33.l, 0xff, v54.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v21.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v22.l, v22.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v150.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v94.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_and_b16 v34.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v5, v21
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v180.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v22.l, v22.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v23.l, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v149.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v92.l
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v5, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v23.l, v23.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.l, v24.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v160.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v88.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v5, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v24.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v25.l, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v151.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v77.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v5, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v25.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v26.l, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v162.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v72.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v5, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v26.l, v26.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v27.l, v27.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v161.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v62.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v5, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v27.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v28.l, v28.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v164.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v28.h, 8, v57.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v5, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v28.l, v28.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v29.l, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v163.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v46.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v5, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v29.l, v29.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v30.l, v30.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v166.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v43.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v5, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v30.l, v30.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v31.l, v31.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v165.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v31.h, 8, v41.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v5, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v31.l, v31.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v32.l, v32.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v176.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v32.h, 8, v182.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v5, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v32.l, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v33.l, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v33.l, 0xff, v167.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v181.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v5, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v33.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v33.h, v34.l, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v5.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v5, v33
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v53.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v56.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v179.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v45.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v178.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v43.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v55.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v42.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[10:13], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[14:17], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[18:21], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[22:25], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[26:29], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_clause 0x1f
-; GFX11-TRUE16-NEXT: scratch_load_b32 v152, off, s32 offset:12
-; GFX11-TRUE16-NEXT: scratch_load_b32 v143, off, s32 offset:16
-; GFX11-TRUE16-NEXT: scratch_load_b32 v142, off, s32 offset:20
-; GFX11-TRUE16-NEXT: scratch_load_b32 v141, off, s32 offset:24
-; GFX11-TRUE16-NEXT: scratch_load_b32 v140, off, s32 offset:28
-; GFX11-TRUE16-NEXT: scratch_load_b32 v139, off, s32 offset:32
-; GFX11-TRUE16-NEXT: scratch_load_b32 v138, off, s32 offset:36
-; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:40
-; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:44
-; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:48
-; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:52
-; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:56
-; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:60
-; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:64
-; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:68
-; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:72
-; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:76
-; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:80
-; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:84
-; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:88
-; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:92
-; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:96
-; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:100
-; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:104
-; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:108
-; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:112
-; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:116
-; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:120
-; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:124
-; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:128
-; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:132
-; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:136
-; GFX11-TRUE16-NEXT: s_clause 0x18
-; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:140
-; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:144
-; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:148
-; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:152
-; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:156
-; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:160
-; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:164
-; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:168
-; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:172
-; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:176
-; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:180
-; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:184
-; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:188
-; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:192
-; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:196
-; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:200
-; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:204
-; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:208
-; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:212
-; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:216
-; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:220
-; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:224
-; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:228
-; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:232
-; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_load_b32 v155, off, s32 offset:12
+; GFX11-TRUE16-NEXT: scratch_load_b32 v154, off, s32 offset:16
+; GFX11-TRUE16-NEXT: scratch_load_b32 v153, off, s32 offset:20
+; GFX11-TRUE16-NEXT: scratch_load_b32 v152, off, s32 offset:24
+; GFX11-TRUE16-NEXT: scratch_load_b32 v143, off, s32 offset:28
+; GFX11-TRUE16-NEXT: scratch_load_b32 v142, off, s32 offset:32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v141, off, s32 offset:36
+; GFX11-TRUE16-NEXT: scratch_load_b32 v140, off, s32 offset:40
+; GFX11-TRUE16-NEXT: scratch_load_b32 v139, off, s32 offset:44
+; GFX11-TRUE16-NEXT: scratch_load_b32 v138, off, s32 offset:48
+; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:52
+; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:56
+; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:60
+; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:64
+; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:68
+; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:72
+; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:76
+; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:80
+; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:84
+; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:88
+; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:92
+; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:96
+; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:100
+; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:104
+; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:108
+; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:112
+; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:116
+; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:120
+; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:124
+; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:128
+; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:132
+; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:136
+; GFX11-TRUE16-NEXT: s_clause 0x1b
+; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:140
+; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:144
+; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:148
+; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:152
+; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:156
+; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:160
+; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:164
+; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:168
+; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:172
+; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:176
+; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:180
+; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:184
+; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:188
+; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:192
+; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:196
+; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:200
+; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:204
+; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:208
+; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:212
+; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:216
+; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:220
+; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:224
+; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:228
+; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:232
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:236
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:240
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:244
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:248
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -186713,69 +185834,69 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
@@ -186784,95 +185905,91 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB94_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v17
; GFX11-TRUE16-NEXT: .LBB94_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB94_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_pk_add_f16 v32, 0x200, v32 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_pk_add_f16 v31, 0x200, v31 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v30, 0x200, v30 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1]
@@ -186883,345 +186000,283 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v30, 0x200, v30 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1]
; GFX11-TRUE16-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[1:2]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v17
; GFX11-TRUE16-NEXT: .LBB94_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v166.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v176.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v80.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v165.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v164.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v167.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v166.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v165.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v70.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v69.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v69.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v149.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v66.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v134.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v133.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v150.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v144.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v83.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v118.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v164.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v163.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v161.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v149.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v147.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v87.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v82.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v64f16_to_v128i8:
@@ -209415,69 +208470,69 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:8
; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:4
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr145_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr135_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr132_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
@@ -209486,95 +208541,91 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB98_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v17
; GFX11-TRUE16-NEXT: .LBB98_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB98_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
@@ -209585,345 +208636,283 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[80:81], 24, v[1:2]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 8, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[25:26]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 8, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 24, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 8, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 24, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 8, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 8, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 8, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v31
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 24, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 8, v27
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 24, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 24, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v17
; GFX11-TRUE16-NEXT: .LBB98_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v166.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v176.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, 0
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v80.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v1.l, v33.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v165.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v39.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v164.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v167.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v34.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v166.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v165.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v39, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v2.l, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v70.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v33.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v163.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v69.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v39, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v3.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v36.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v162.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v161.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v160.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v150.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v39, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v4.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v160.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v69.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v148.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v39, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v5.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v151.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v149.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v144.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v39, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v6.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v147.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v66.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v36.h, 8, v134.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v39, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v7.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v145.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v135.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v37.h, 8, v133.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v36.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v129.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v39, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v8.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v133.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v39, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v9.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v131.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v129.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v39, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v10.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v39, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v11.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v39, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v12.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v113.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v39, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v13.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v103.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v39, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v14.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v39, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v15.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v97.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v87.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v39, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v16.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v39, v16
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v17.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v150.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v148.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v39, v17
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v18.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v18.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v146.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v39, v18
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v19.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v19.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v144.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v134.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v39, v19
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v20.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v20.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v132.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v39, v20
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v21.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v21.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v39, v21
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v22.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v39, v22
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v23.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v23.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v39, v23
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v24.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v24.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v112.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v39, v24
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v25.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v25.h, v25.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v102.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.l, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v27.h, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v39, v25
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v26.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v26.h, v26.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_and_b16 v28.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v39, v26
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v27.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.h, v27.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v86.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.l, 0xff, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v29.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v39, v27
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v28.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v28.h, v28.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v34.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.l, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v30.h, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v39, v28
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v29.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v29.h, v29.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v84.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v83.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_and_b16 v31.l, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v31.h, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v39, v29
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v30.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v30.h, v30.h, v34.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v82.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.l, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v32.h, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v39, v30
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v31.l, v33.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.h, v31.h, v33.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v81.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v80.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v39, v31
-; GFX11-TRUE16-NEXT: v_or_b16 v39.l, v32.l, v33.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v32.h, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v39, v32
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v118.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v51.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v112.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v35.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v9.h, v34.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v13.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v100.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v98.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v96.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v10.l, v35.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v86.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v16.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v67.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v164.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v163.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v161.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v64.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v151.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v149.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v147.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v52.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v145.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v135.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v132.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v131.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v130.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v17.l, v19.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v117.l
+; GFX11-TRUE16-NEXT: v_and_b16 v19.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v115.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.h, 0xff, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v113.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_or_b16 v17.h, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.l, v18.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v18.h, v19.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.l, v20.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v19.h, v21.h, v22.l
+; GFX11-TRUE16-NEXT: v_and_b16 v20.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v103.l
+; GFX11-TRUE16-NEXT: v_and_b16 v21.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v22.l, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v23.l, 0xff, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v34.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v97.l
+; GFX11-TRUE16-NEXT: v_or_b16 v20.l, v20.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v20.h, v21.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v22.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v21.h, v23.l, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v22.l, v24.l, v24.h
+; GFX11-TRUE16-NEXT: v_and_b16 v22.h, 0xff, v30.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v87.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_and_b16 v23.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.l, 8, v85.l
+; GFX11-TRUE16-NEXT: v_and_b16 v24.h, 0xff, v31.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v25.h, 0xff, v32.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.l, 8, v83.l
+; GFX11-TRUE16-NEXT: v_and_b16 v26.h, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v82.l
+; GFX11-TRUE16-NEXT: v_or_b16 v22.h, v22.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.l, v23.h, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v23.h, v24.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v25.h, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v24.h, v26.h, v27.l
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:48
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:64
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:80
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:96
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[29:32], off offset:112
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v64i16_to_v128i8:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
index 64b5ecc..582f31b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
@@ -4125,19 +4125,19 @@ define <4 x i32> @bitcast_v16i8_to_v4i32(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -4152,94 +4152,71 @@ define <4 x i32> @bitcast_v16i8_to_v4i32(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB26_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_2
; GFX11-TRUE16-NEXT: .LBB26_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -8614,19 +8591,19 @@ define <4 x float> @bitcast_v16i8_to_v4f32(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -8641,94 +8618,71 @@ define <4 x float> @bitcast_v16i8_to_v4f32(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB50_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB50_2
; GFX11-TRUE16-NEXT: .LBB50_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -12703,19 +12657,19 @@ define <2 x i64> @bitcast_v16i8_to_v2i64(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -12730,94 +12684,71 @@ define <2 x i64> @bitcast_v16i8_to_v2i64(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB70_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB70_2
; GFX11-TRUE16-NEXT: .LBB70_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -16408,19 +16339,19 @@ define <2 x double> @bitcast_v16i8_to_v2f64(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -16435,94 +16366,71 @@ define <2 x double> @bitcast_v16i8_to_v2f64(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB86_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB86_2
; GFX11-TRUE16-NEXT: .LBB86_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -19833,19 +19741,19 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -19860,94 +19768,71 @@ define <8 x i16> @bitcast_v16i8_to_v8i16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB98_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB98_2
; GFX11-TRUE16-NEXT: .LBB98_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -22745,19 +22630,19 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -22772,94 +22657,71 @@ define <8 x half> @bitcast_v16i8_to_v8f16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB106_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB106_2
; GFX11-TRUE16-NEXT: .LBB106_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -24960,19 +24822,19 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v7.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v15.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v16
@@ -24987,94 +24849,71 @@ define <8 x bfloat> @bitcast_v16i8_to_v8bf16(<16 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB110_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v1.h, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v6.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v11, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v2.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v11, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.l, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v11.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v11, v3
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB110_2
; GFX11-TRUE16-NEXT: .LBB110_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v10.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v9.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v12.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v8.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v7.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v9, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v9, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v9.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v8.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v9.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v5.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v9, v3
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
index cb4b3bd..0a73571 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
@@ -6298,31 +6298,33 @@ define <8 x i32> @bitcast_v32i8_to_v8i32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v19.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v17.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v23.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v32
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB26_3
@@ -6335,48 +6337,43 @@ define <8 x i32> @bitcast_v32i8_to_v8i32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB26_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v0.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v1.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v2.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v3.l, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v4.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
@@ -6387,122 +6384,88 @@ define <8 x i32> @bitcast_v32i8_to_v8i32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v5.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v6.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v7.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_2
; GFX11-TRUE16-NEXT: .LBB26_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v21.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v18.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v14.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v13.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v19.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v18.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v17.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v15.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v14.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v15.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v12.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v13.l, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v11.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v10.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v10.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v9.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v8.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.h, v6.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v17.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v17.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v15.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v15.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v10.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v11.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v11.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v12.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v8.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v8.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v9.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -13349,31 +13312,33 @@ define <8 x float> @bitcast_v32i8_to_v8f32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v19.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v17.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v23.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v32
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB50_3
@@ -13386,48 +13351,43 @@ define <8 x float> @bitcast_v32i8_to_v8f32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB50_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v0.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v1.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v2.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v3.l, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v4.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
@@ -13438,122 +13398,88 @@ define <8 x float> @bitcast_v32i8_to_v8f32(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v5.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v6.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v7.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB50_2
; GFX11-TRUE16-NEXT: .LBB50_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v21.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v18.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v14.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v13.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v19.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v18.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v17.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v15.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v14.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v15.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v12.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v13.l, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v11.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v10.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v10.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v9.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v8.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.h, v6.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v17.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v17.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v15.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v15.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v10.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v11.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v11.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v12.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v8.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v8.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v9.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -19888,31 +19814,33 @@ define <4 x i64> @bitcast_v32i8_to_v4i64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v19.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v17.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v23.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v32
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB70_3
@@ -19925,48 +19853,43 @@ define <4 x i64> @bitcast_v32i8_to_v4i64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB70_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v0.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v1.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v2.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v3.l, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v4.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
@@ -19977,122 +19900,88 @@ define <4 x i64> @bitcast_v32i8_to_v4i64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v5.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v6.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v7.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB70_2
; GFX11-TRUE16-NEXT: .LBB70_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v21.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v18.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v14.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v13.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v19.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v18.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v17.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v15.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v14.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v15.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v12.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v13.l, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v11.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v10.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v10.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v9.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v8.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.h, v6.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v17.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v17.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v15.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v15.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v10.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v11.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v11.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v12.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v8.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v8.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v9.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -25929,31 +25818,33 @@ define <4 x double> @bitcast_v32i8_to_v4f64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v19.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v17.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v0.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v23.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v23.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v31.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v32
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB86_3
@@ -25966,48 +25857,43 @@ define <4 x double> @bitcast_v32i8_to_v4f64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB86_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v0.l, v19.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v19.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v18.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v1.h, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v2.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v21.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v3.l, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v10.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v4.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
@@ -26018,122 +25904,88 @@ define <4 x double> @bitcast_v32i8_to_v4f64(<32 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v5.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v8.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v6.l, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v21.l, v7.l, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB86_2
; GFX11-TRUE16-NEXT: .LBB86_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v21.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v18.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v14.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v13.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v14.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v19.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v18.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v17.h, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v15.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v13.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v12.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v21, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v14.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v14.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v15.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v21, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v12.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v13.l, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v21, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v11.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v11.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v21, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v10.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v10.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v21, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v9.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v21, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v8.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.h, v6.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v21, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v21.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v19.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v17.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v17.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v15.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v15.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v10.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v11.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v11.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v12.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v8.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v8.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v9.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v9.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v21, v7
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
index 3aaf254..b622e6e 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
@@ -3044,91 +3044,66 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v10i32_to_v40i8:
@@ -5025,39 +5000,41 @@ define <10 x i32> @bitcast_v40i8_to_v10i32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v25.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v23.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v19.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v5.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v35.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v30.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v29.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v28.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v33.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v33.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v34.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v35.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v33.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v34.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v35.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v36
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB14_3
@@ -5071,63 +5048,53 @@ define <10 x i32> @bitcast_v40i8_to_v10i32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB14_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v26.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v0.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v27, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v27, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v2.l, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v27, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v27, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v4.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v32.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v27, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v5.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v31.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v27, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v6.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v12.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
@@ -5140,147 +5107,110 @@ define <10 x i32> @bitcast_v40i8_to_v10i32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v10.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v27, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v7.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v27.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v27, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v8.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v27.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v27, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v9.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v27.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v27, v9
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB14_2
; GFX11-TRUE16-NEXT: .LBB14_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v26.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v25.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v22.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v21.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v25.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v21.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v20.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v15.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v15.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v24.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v25.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v23.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v23.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v19.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v19.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v25, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v20.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v21.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v25, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v25.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v17.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v18.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v25, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v15.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v15.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v25, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v14.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v14.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v25, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v13.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v13.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v25, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v12.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v12.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v25, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v11.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v25, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.h, v8.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v25, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v21.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v22.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v23.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v23.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v24.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v17.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v17.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v18.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v19.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v13.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v13.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v14.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v14.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v10.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v11.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v11.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v12.l, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v25, v9
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -9991,91 +9921,66 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v10f32_to_v40i8:
@@ -11997,39 +11902,41 @@ define <10 x float> @bitcast_v40i8_to_v10f32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v25.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v23.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v19.l
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v17.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v5.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v35.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v30.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v29.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v28.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v28.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v33.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v33.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v34.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v35.l
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v33.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v33.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v34.h
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v35.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v36
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB34_3
@@ -12043,63 +11950,53 @@ define <10 x float> @bitcast_v40i8_to_v10f32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB34_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v26.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v0.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v23.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v19.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v27, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v1.h, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v21.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v27, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v2.l, v20.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v17.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v15.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v27, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v14.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v27, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v4.l, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v32.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v27, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v5.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v27.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v31.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v27, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v6.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v27.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v23.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v12.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
@@ -12112,147 +12009,110 @@ define <10 x float> @bitcast_v40i8_to_v10f32(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v10.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v27, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v7.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v27.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v27, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v8.l, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v27.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v27, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v27.l, v9.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v27.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v27, v9
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB34_2
; GFX11-TRUE16-NEXT: .LBB34_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v26.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v25.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v22.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v21.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v25.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v21.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v20.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v19.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v15.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v15.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v24.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v25.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v23.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v23.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v19.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v19.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v17.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v25, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v16.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v20.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v21.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v25, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v25.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v17.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v18.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v16.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v18.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v25, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v15.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v15.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v25, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v14.l, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v14.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v25, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v13.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v13.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v25, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v12.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v12.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v25, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v11.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v11.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v25, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.h, v8.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v25, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v25.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v21.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v22.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v23.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v23.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v24.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v16.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v17.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v17.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v18.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v19.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v12.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v13.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v13.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v14.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v14.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v10.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v11.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v11.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v12.l, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v25, v9
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -16367,91 +16227,66 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v20i16_to_v40i8:
@@ -22484,91 +22319,66 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v20f16_to_v40i8:
@@ -28791,39 +28601,38 @@ define <5 x double> @bitcast_v40i8_to_v5f64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v27.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v25.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v5.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v28.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v48.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v38.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v36.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v37.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v36.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v49
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB72_3
@@ -28837,65 +28646,55 @@ define <5 x double> @bitcast_v40i8_to_v5f64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB72_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v0.l, v34.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v1.h, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v34.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v10, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v2.l, v28.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v10.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v10, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v3.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v4.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v32.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v10, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v31.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v10, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v6.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
@@ -28906,146 +28705,110 @@ define <5 x double> @bitcast_v40i8_to_v5f64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v7.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v10.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v10, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v8.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v9.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v10, v9
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB72_2
; GFX11-TRUE16-NEXT: .LBB72_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v35.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v30.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v29.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v23.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v22.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v21.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v34.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v34.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v33.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v33.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v27.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v27.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v25.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v28.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v29.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v10, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v25.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v26.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v21.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v10, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v23.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v23.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v10, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v21.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v22.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v10, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v19.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v19.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v10, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v18.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v18.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v17.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v17.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v16.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v16.h, v8.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v29.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v30.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v33.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v33.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v34.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v24.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v25.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v25.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v26.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v27.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v18.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v19.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v19.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v20.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v21.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v16.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v16.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v17.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v17.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v18.l, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v10, v9
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -30878,91 +30641,66 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v5f64_to_v40i8:
@@ -32912,39 +32650,38 @@ define <5 x i64> @bitcast_v40i8_to_v5i64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v27.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v25.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v3.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.l, 8, v5.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v33.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v28.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.l, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v21.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v39.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v34.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v48.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v38.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v36.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v37.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v36.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v36.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v38.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v49
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB76_3
@@ -32958,65 +32695,55 @@ define <5 x i64> @bitcast_v40i8_to_v5i64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB76_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v35.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v30.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v29.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v0.l, v34.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v34.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v33.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v27.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v1.h, v33.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v34.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v28.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v23.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v10, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v2.l, v28.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v10.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v10, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v3.l, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v4.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v32.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v32.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v10, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v5.l, v21.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v31.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v31.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v10, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v6.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v29.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v33.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v33.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
@@ -33027,146 +32754,110 @@ define <5 x i64> @bitcast_v40i8_to_v5i64(<40 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v7.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v10.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v10, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v8.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v9.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v10, v9
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB76_2
; GFX11-TRUE16-NEXT: .LBB76_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v35.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v30.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v29.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v23.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v22.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v21.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v20.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v22.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v34.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v34.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v33.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v33.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v27.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v27.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v25.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v10, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v28.h, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v29.l, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v10, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v25.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v26.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v21.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v20.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v10, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v20.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v22.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v23.l, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v23.h, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v10, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v21.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v22.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v10, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v19.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v19.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v10, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v18.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v18.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v10, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v17.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v17.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v10, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v16.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v16.h, v8.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v29.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v30.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v33.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v33.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v34.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v24.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v25.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v25.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v26.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v27.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v18.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v19.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v19.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v20.h, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v21.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v16.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v16.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v17.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v17.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v18.l, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v10, v9
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -35022,91 +34713,66 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v16.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v1.l, v11.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v2.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v28.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v12.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v15, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v3.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v26.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v15, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v4.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v15, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v5.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v15.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v24.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v23.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v22.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v22.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v12.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v28.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v15, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v7.l, v11.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v13.l
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v15, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v8.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v15.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v19.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v11.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v11.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v9.h, v11.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v15.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v18.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v9
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v18.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v13.l
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
-; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[11:12], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b64 v0, v[9:10], off offset:32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v5i64_to_v40i8:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
index 632b03c..e6c7b1a 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
@@ -2279,17 +2279,13 @@ define i32 @bitcast_v4i8_to_i32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB22_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2
; GFX11-TRUE16-NEXT: .LBB22_4: ; %cmp.true
@@ -2301,13 +2297,9 @@ define i32 @bitcast_v4i8_to_i32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -4530,17 +4522,13 @@ define float @bitcast_v4i8_to_f32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB42_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB42_2
; GFX11-TRUE16-NEXT: .LBB42_4: ; %cmp.true
@@ -4552,13 +4540,9 @@ define float @bitcast_v4i8_to_f32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -6487,17 +6471,13 @@ define <2 x i16> @bitcast_v4i8_to_v2i16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB58_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB58_2
; GFX11-TRUE16-NEXT: .LBB58_4: ; %cmp.true
@@ -6509,13 +6489,9 @@ define <2 x i16> @bitcast_v4i8_to_v2i16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -8138,17 +8114,13 @@ define <2 x half> @bitcast_v4i8_to_v2f16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB70_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB70_2
; GFX11-TRUE16-NEXT: .LBB70_4: ; %cmp.true
@@ -8160,13 +8132,9 @@ define <2 x half> @bitcast_v4i8_to_v2f16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -9502,17 +9470,13 @@ define <2 x bfloat> @bitcast_v4i8_to_v2bf16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB78_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB78_2
; GFX11-TRUE16-NEXT: .LBB78_4: ; %cmp.true
@@ -9524,13 +9488,9 @@ define <2 x bfloat> @bitcast_v4i8_to_v2bf16(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -10212,17 +10172,13 @@ define <1 x i32> @bitcast_v4i8_to_v1i32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB82_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v1.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_hi16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_2
; GFX11-TRUE16-NEXT: .LBB82_4: ; %cmp.true
@@ -10234,13 +10190,9 @@ define <1 x i32> @bitcast_v4i8_to_v1i32(<4 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index d3fbba3..bff054f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -8921,133 +8921,98 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -12574,53 +12539,52 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v20.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v80.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v68.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v69.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v68.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v80.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v81
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB26_3
@@ -12633,98 +12597,82 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB26_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v52.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v52.l
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v0.l, v54.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v64, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v1.h, v53.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v55.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v53.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v50.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v51.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v2.l, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v64, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v3.l, v50.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v30.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v64, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v5.l, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v37.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v64, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v6.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v35.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v64, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v7.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v35.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v64, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v8.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v33.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v33.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v64, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v9.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v64, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v10.l, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v52.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v48.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v48.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
@@ -12745,226 +12693,170 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v64, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v11.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v64, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v12.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v64, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v13.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v64, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v14.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v64.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v64, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v15.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v64, v15
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_2
; GFX11-TRUE16-NEXT: .LBB26_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v53.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v52.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v52.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v55.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v53.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v50.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v29.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v55.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v54.l, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v53.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v52, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v51.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v51.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v52, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v52.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v50.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v50.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v52, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v26.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v39.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v52, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v29.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v30.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v52, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v27.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v27.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v52, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v25.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v52, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v23.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v52, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v22.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v52, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v21.l, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v21.h, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v52, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v20.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v20.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v52, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v19.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v19.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v52, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v18.l, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v18.h, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v52, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v17.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v52, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v16.l, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.h, v14.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v52, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v54.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v51.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v51.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v52.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v52.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v53.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v30.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v39.l, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v39.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v48.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v24.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v25.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v26.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v27.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v21.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v21.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v22.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v23.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v18.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v19.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v19.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v20.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v20.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v16.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v16.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v17.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v18.l, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v52, v15
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -23576,133 +23468,98 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -27358,53 +27215,52 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v20.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v80.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v68.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v69.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v68.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v80.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v81
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB50_3
@@ -27417,98 +27273,82 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB50_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v52.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v52.l
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v0.l, v54.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v64, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v1.h, v53.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v55.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v53.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v50.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v51.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v2.l, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v64, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v3.l, v50.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v30.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v64, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v5.l, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v37.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v64, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v6.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v35.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v64, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v7.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v35.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v64, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v8.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v33.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v33.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v64, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v9.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v64, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v10.l, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v52.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v48.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v48.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
@@ -27529,226 +27369,170 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v64, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v11.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v64, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v12.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v64, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v13.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v64, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v14.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v64.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v64, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v15.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v64, v15
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB50_2
; GFX11-TRUE16-NEXT: .LBB50_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v53.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v52.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v52.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v55.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v53.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v50.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v29.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v55.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v54.l, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v53.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v52, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v51.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v51.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v52, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v52.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v50.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v50.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v52, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v26.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v39.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v52, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v29.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v30.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v52, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v27.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v27.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v52, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v25.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v52, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v23.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v52, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v22.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v52, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v21.l, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v21.h, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v52, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v20.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v20.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v52, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v19.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v19.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v52, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v18.l, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v18.h, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v52, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v17.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v52, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v16.l, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.h, v14.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v52, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v54.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v51.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v51.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v52.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v52.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v53.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v30.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v39.l, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v39.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v48.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v24.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v25.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v26.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v27.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v21.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v21.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v22.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v23.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v18.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v19.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v19.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v20.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v20.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v16.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v16.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v17.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v18.l, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v52, v15
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -37760,133 +37544,98 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -41418,53 +41167,52 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v20.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v80.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v68.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v69.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v68.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v80.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v81
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB70_3
@@ -41477,98 +41225,82 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB70_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v52.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v52.l
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v0.l, v54.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v64, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v1.h, v53.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v55.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v53.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v50.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v51.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v2.l, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v64, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v3.l, v50.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v30.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v64, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v5.l, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v37.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v64, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v6.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v35.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v64, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v7.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v35.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v64, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v8.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v33.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v33.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v64, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v9.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v64, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v10.l, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v52.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v48.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v48.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
@@ -41589,226 +41321,170 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v64, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v11.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v64, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v12.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v64, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v13.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v64, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v14.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v64.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v64, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v15.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v64, v15
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB70_2
; GFX11-TRUE16-NEXT: .LBB70_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v53.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v52.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v52.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v55.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v53.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v50.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v29.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v55.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v54.l, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v53.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v52, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v51.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v51.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v52, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v52.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v50.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v50.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v52, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v26.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v39.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v52, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v29.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v30.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v52, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v27.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v27.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v52, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v25.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v52, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v23.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v52, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v22.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v52, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v21.l, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v21.h, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v52, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v20.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v20.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v52, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v19.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v19.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v52, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v18.l, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v18.h, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v52, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v17.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v52, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v16.l, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.h, v14.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v52, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v54.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v51.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v51.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v52.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v52.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v53.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v30.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v39.l, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v39.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v48.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v24.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v25.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v26.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v27.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v21.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v21.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v22.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v23.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v18.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v19.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v19.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v20.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v20.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v16.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v16.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v17.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v18.l, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v52, v15
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -50954,133 +50630,98 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -54638,53 +54279,52 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: scratch_load_d16_hi_b16 v38, off, s32 offset:4
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v29.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v20.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v20.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v18.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v10.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v4.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v55.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v7.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.l, 8, v13.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v50.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v17.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v29.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.h, 8, v27.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v54.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v51.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.l, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v52.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v53.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v30.h, 8, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v39.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.l, 8, v21.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v48.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v24.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v80.h
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v64.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v65.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v66.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v25.h, 8, v67.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.h, 8, v68.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v68.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v69.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v70.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v70.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v71.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v80.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v64.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v65.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v66.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v26.h, 8, v67.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v27.l, 8, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v68.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v68.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v22.h, 8, v69.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v23.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v70.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v71.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v80.l
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v81
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB86_3
@@ -54697,98 +54337,82 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB86_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v53.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v52.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v52.l
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v0.l, v54.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.l, v54.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v49.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v64, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v1.h, v53.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v55.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v53.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v50.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v50.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v49.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v29.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v28.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v51.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v2.l, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v64.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v48.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v39.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v64, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v3.l, v50.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v50.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v30.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v24.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v26.l
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v64, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v4.l, v39.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v27.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v30.l
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v38.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v38.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v64, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v5.l, v29.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v25.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v23.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v37.h
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v37.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v64, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v6.l, v27.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v36.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v35.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v64, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v7.l, v25.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v21.h
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v35.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v34.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v34.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v64, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v8.l, v23.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v33.h
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v33.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v64, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v9.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v64.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v31.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v64, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v10.l, v21.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v31.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v54.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v51.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v52.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v30.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v39.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v48.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v48.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v24.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v25.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v26.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v27.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v22.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v16.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v18.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_lo16
@@ -54809,226 +54433,170 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v64, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v11.l, v20.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v64.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v16.h
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v64, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v12.l, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v64, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v13.l, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v64, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v14.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v64.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v64, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v64.l, v15.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v64.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v64, v15
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB86_2
; GFX11-TRUE16-NEXT: .LBB86_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v55.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v53.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v52.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v52.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v55.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v53.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v50.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v50.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, v49.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, v29.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, v27.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, v23.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, v28.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, v30.l, 3
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, v37.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, v37.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, v35.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, v35.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, v33.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, v33.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, v31.h, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, v31.l, 3
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v55.l, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v54.l, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v53.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v49.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v49.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v48.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v52, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v39.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v51.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v51.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v52, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v52.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v50.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v50.h, v2.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v29.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v28.h, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v52, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v3.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, v26.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, v24.h, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v39.h, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v52, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v29.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v30.h, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v24.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v26.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v52, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v5.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v5.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, v28.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, v30.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v27.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v27.h, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v52, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v25.h, v6.h
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v38.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v38.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v52, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v7.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v7.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, v37.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, v37.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v23.l, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v23.h, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v52, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v22.l, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.h, v8.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v36.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v36.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v52, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v9.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v9.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, v35.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, v35.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v21.l, v9.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v21.h, v9.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v52, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v20.l, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v20.h, v10.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v34.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v34.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v52, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v11.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v11.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, v33.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, v33.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v19.l, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v19.h, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v52, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v18.l, v12.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v18.h, v12.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v32.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v32.l, 3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v52, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v13.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v18.h, 0x300, v13.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, v31.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, v31.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.l, v13.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v17.h, v13.h
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v52, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v17.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v16.l, v14.l
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.h, v14.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v52, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v52.l, 0x300, v15.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v54.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v54.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v51.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v51.h, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v52.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v52.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v53.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v30.h, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v39.l, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v39.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v48.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v48.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v24.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v25.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v25.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v26.h, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v27.l, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v21.l, v8.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v21.h, v9.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v22.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v22.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v23.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v18.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v19.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v19.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v20.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v20.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v16.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v16.h, v14.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v17.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v17.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v18.l, v15.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v3.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v3.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x300, v4.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x300, v5.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v5.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.l, 0x300, v6.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v6.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v7.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x300, v7.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.l, 0x300, v8.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v8.h, 0x300, v8.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.l, 0x300, v9.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v9.h, 0x300, v9.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.l, 0x300, v10.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v10.h, 0x300, v10.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.l, 0x300, v11.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v11.h, 0x300, v11.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.l, 0x300, v12.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v12.h, 0x300, v12.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.l, 0x300, v13.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v13.h, 0x300, v13.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.l, 0x300, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v14.h, 0x300, v14.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.l, 0x300, v15.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v15.h, 0x300, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v52.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v52, v15
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -64107,133 +63675,98 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -76401,133 +75934,98 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v25.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, 0
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v1.l, v17.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v17.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v64.l
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v24.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v55.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v24, v1
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v2.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v54.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v23.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v54.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v17.h
; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v24, v2
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v3.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v53.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v52.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v18.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v52.l
; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v51.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v3.l, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v24, v3
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v4.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v22.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v24, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v5.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v22.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.l, v18.h
; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v24, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v6.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v3.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v5.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v24, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v7.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v39.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v17.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v7.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v39.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v38.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v9.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v24, v7
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v8.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v37.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v20.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v24, v8
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v9.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v36.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v36.l
; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v11.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v10.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v53.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v3.h, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v50.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v8.l, v19.h
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v35.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v19.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v24, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v11.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v11.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v24.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v33.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v12.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v32.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v31.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v13.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v24, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v12.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v31.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v21.h
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v6.l, v20.h
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.h, 8, v38.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v21.l, 8, v37.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v20.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.h, v19.h
; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v24, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v13.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v12.h, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v13.l, v19.l
; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v13.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v14.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v29.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v15.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v28.l
; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v15.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v24, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v14.l, v17.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v28.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.h, 8, v27.l
; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v16.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v24, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v15.l, v17.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v26.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v6.h, v21.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v8.h, v20.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v9.l, v21.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v11.l, v20.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v14.l, v19.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v17.h
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.l, v18.l
; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v15.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v24.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v26.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v24, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v24.l, v16.l, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v24, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v16.l, v18.h
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v16.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
@@ -85053,57 +84551,57 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr53_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr51_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr129_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr55_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr119_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr65_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr49_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr67_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr113_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr103_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr69_lo16
; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
@@ -85111,29 +84609,29 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_2
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[3:4]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[15:16]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v13
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 24, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 8, v3
@@ -85141,11 +84639,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[13:14]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[1:2]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[1:2]
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v1.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v2.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v2.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v3.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v3.h
@@ -85155,26 +84653,26 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v5.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v7.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v7.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v7.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v8.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v9.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v10.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v10.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v96.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v112.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.h, v13.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.h, v14.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.h, v14.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.h, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v113.h, v15.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v103.h, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v16.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v117.h, v15.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v15.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.h, v16.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v16.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
@@ -85187,71 +84685,72 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_4
; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v4
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v2
; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v17, 0x40c00000, v17 :: v_dual_lshlrev_b32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v18
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v17, 0x40c00000, v17 :: v_dual_add_f32 v20, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v17, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v17
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: v_add3_u32 v18, v18, v17, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add3_u32 v17, v24, v20, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v52, v18, v23 :: v_dual_lshlrev_b32 v1, 16, v1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v39, v18, v23 :: v_dual_and_b32 v2, 0xffff0000, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v1, 16, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_add_f32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v2, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v20, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add3_u32 v17, v24, v20, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v21, v21, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX11-TRUE16-NEXT: v_add3_u32 v23, v25, v1, 0x7fff
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v21, v22, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v39.h
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v52.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v53, v23, v26, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v4
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v20
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v22, 0x40c00000, v20 :: v_dual_add_f32 v3, 0x40c00000, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v53.h
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v18
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v54, v19, v21, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v22, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 24, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v6
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v1, v20, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v54.h
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 8, v18
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 8, v17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v55, v1, v19 :: v_dual_and_b32 v2, 0xffff0000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v55, v1, v19, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v54.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v4, v21, vcc_lo
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v5
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
@@ -85304,305 +84803,266 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v65.h
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v66, v4, v5 :: v_dual_lshlrev_b32 v5, 16, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v66, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v7
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v7 :: v_dual_lshlrev_b32 v5, 16, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v21
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v1, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v4, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[21:22]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[17:18]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v1, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 24, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v22
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v68, v3, v8 :: v_dual_and_b32 v3, 0xffff0000, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v67, v3, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_lshlrev_b32 v5, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v68, v1, v4 :: v_dual_add_f32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v67, v1, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v26, v2, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v68.h
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v67.h
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v67.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[23:24]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v23
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[19:20]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v68.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v82, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v80, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v8 :: v_dual_lshlrev_b32 v5, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v82.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v80, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v71, v1, v2, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v25
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 24, v26
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 24, v26
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v80.h
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 8, v26
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v80.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v71.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v25
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v27, v2, v3 :: v_dual_add_f32 v2, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v28
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v97, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v96, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v97.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v87, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v98, v6, v7 :: v_dual_and_b32 v5, 0xffff0000, v16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v87.h
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v96.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v32, v3, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v16
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v33
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v33
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 8, v27
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 8, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v112, v4, v6 :: v_dual_add_f32 v1, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v8 :: v_dual_lshlrev_b32 v5, 16, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v112.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v32
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v98.h
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v113, v4, v6 :: v_dual_add_f32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v103, v2, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v115, v2, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v113.h
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[23:24]
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v113, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v32
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v27
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v7, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v38, v4, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v39, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v103.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v37, v2, v3, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.l, v113.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v115.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v38, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v117.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[38:39]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[32:33]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v38
; GFX11-TRUE16-NEXT: .LBB108_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v53.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v131.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v17.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v51.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, 0
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v50.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v18.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v1.l, v1.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v129.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v1.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v55.h
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v39.h
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v52.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v130.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v19.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v50.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v31, v1
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v20.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v2.l, v2.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v128.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v19.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v49.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v54.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v119.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v2.h
; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.l, v3.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v3.l, 0xff, v55.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v128.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v118.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v21.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v31, v2
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v49.l
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v3.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v4.l, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v54.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v119.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v22.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v115.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v31, v3
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v5.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v6.l, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v20.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v118.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v65.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v116.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v21.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v48.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v64.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v114.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v22.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v112.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v4.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v5.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v7.h, v8.l
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v8.h, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v67.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v103.l
; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v23.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v4.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v5.l, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v65.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v117.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v48.l
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v24.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v31, v4
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v101.l
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v5.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v6.l, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v64.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v116.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v25.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v35.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v31, v5
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v26.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v6.l, v6.h
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v7.l, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v7.l, 0xff, v68.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v114.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v98.l
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v27.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v31, v6
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v34.l
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v7.l, v7.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v36.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v66.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v102.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v24.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v101.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v80.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v100.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v7.l, v7.h
; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v8.l, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v66.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v102.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v9.l, v9.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v10.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v11.l, v11.h
+; GFX11-TRUE16-NEXT: v_and_b16 v9.h, 0xff, v25.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.l, 8, v35.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v68.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.l, 8, v99.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.h, 0xff, v26.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.l, 8, v97.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.h, 0xff, v96.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v87.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v27.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.l, 8, v34.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v9.h, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v10.h, v11.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.h, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v13.h, v14.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v71.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v86.l
; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v28.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v85.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v31, v7
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v32.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v8.l, v8.h
-; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v82.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v100.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v30.l
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v33.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v31, v8
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v81.l
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v9.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v10.l, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v67.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v99.l
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v37.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v31, v9
-; GFX11-TRUE16-NEXT: v_and_b16 v17.l, 0xff, v38.h
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v10.l, v10.h
-; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v11.l, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v97.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v96.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.h, 8, v69.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v31, v10
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v11.l, v11.h
-; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v12.l, v12.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v80.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v86.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v31, v11
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v113.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v84.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v32.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v30.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v98.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v83.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v12.h
; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v13.l, v13.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v112.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v84.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v31, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v13.l, v13.h
-; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v14.l, v14.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v87.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v83.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v31, v13
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v14.l, v14.h
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v15.l, v15.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v113.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v71.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v31, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v15.l, v15.h
-; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.l, v16.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v31.h
-; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v103.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.h, 8, v70.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v31, v15
-; GFX11-TRUE16-NEXT: v_or_b16 v31.l, v16.l, v16.h
-; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v17.l, v17.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v31.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v31, v16
+; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v14.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v13.h, v15.l, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v16.l, v16.h
+; GFX11-TRUE16-NEXT: v_and_b16 v14.h, 0xff, v33.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v82.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.h, 0xff, v117.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v16.l, 8, v81.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v38.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v17.h, 0xff, v115.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v18.l, 8, v70.l
+; GFX11-TRUE16-NEXT: v_and_b16 v18.h, 0xff, v39.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v19.l, 8, v69.l
+; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v14.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v15.h, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v15.h, v16.h, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.l, v17.h, v18.l
+; GFX11-TRUE16-NEXT: v_or_b16 v16.h, v18.h, v19.l
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
index ecc715c..11f90b9 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
@@ -3067,9 +3067,9 @@ define i64 @bitcast_v8i8_to_i64(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -3085,52 +3085,47 @@ define i64 @bitcast_v8i8_to_i64(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB26_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB26_2
; GFX11-TRUE16-NEXT: .LBB26_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -6210,9 +6205,9 @@ define double @bitcast_v8i8_to_f64(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -6228,52 +6223,47 @@ define double @bitcast_v8i8_to_f64(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB50_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB50_2
; GFX11-TRUE16-NEXT: .LBB50_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -9050,9 +9040,9 @@ define <2 x i32> @bitcast_v8i8_to_v2i32(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -9068,52 +9058,47 @@ define <2 x i32> @bitcast_v8i8_to_v2i32(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB70_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB70_2
; GFX11-TRUE16-NEXT: .LBB70_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -11590,9 +11575,9 @@ define <2 x float> @bitcast_v8i8_to_v2f32(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -11608,52 +11593,47 @@ define <2 x float> @bitcast_v8i8_to_v2f32(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB86_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB86_2
; GFX11-TRUE16-NEXT: .LBB86_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -13809,9 +13789,9 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -13827,52 +13807,47 @@ define <4 x i16> @bitcast_v8i8_to_v4i16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB98_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB98_2
; GFX11-TRUE16-NEXT: .LBB98_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -15630,9 +15605,9 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -15648,52 +15623,47 @@ define <4 x half> @bitcast_v8i8_to_v4f16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB106_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB106_2
; GFX11-TRUE16-NEXT: .LBB106_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -16934,9 +16904,9 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v5.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v5.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v7.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1
@@ -16952,52 +16922,47 @@ define <4 x bfloat> @bitcast_v8i8_to_v4bf16(<8 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB110_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v0.l, v2.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.l, v3.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v5, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v1.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v5, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB110_2
; GFX11-TRUE16-NEXT: .LBB110_4: ; %cmp.true
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.l, 3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v4.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v4.l, 3
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v3.l, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.h, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v2.l, v1.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v4, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v4, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v2.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v3.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.h, v1.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
index 685e2fb..9a6ea1b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
@@ -1104,16 +1104,15 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v8.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12
@@ -1128,37 +1127,28 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB6_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v0.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.l, v4.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v2.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB6_2
; GFX11-TRUE16-NEXT: .LBB6_4: ; %cmp.true
@@ -1166,36 +1156,26 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.l, v1.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -4254,16 +4234,15 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v8.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12
@@ -4278,37 +4257,28 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB22_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v0.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.l, v4.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v4
-; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v2.l, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2
; GFX11-TRUE16-NEXT: .LBB22_4: ; %cmp.true
@@ -4316,36 +4286,26 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.l, v1.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -6909,12 +6869,12 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12
@@ -6929,37 +6889,28 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB36_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB36_2
; GFX11-TRUE16-NEXT: .LBB36_4: ; %cmp.true
@@ -6967,36 +6918,26 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -8669,12 +8610,12 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12
@@ -8689,37 +8630,28 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB40_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB40_2
; GFX11-TRUE16-NEXT: .LBB40_4: ; %cmp.true
@@ -8727,36 +8659,26 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -10079,12 +10001,12 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l
; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12
@@ -10099,37 +10021,28 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: .LBB44_3: ; %cmp.false
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB44_2
; GFX11-TRUE16-NEXT: .LBB44_4: ; %cmp.true
@@ -10137,36 +10050,26 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3
+; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h
; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l
; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/calling-conventions.ll b/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
index cbf6b66..7dbbeaa 100644
--- a/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+++ b/llvm/test/CodeGen/AMDGPU/calling-conventions.ll
@@ -3632,13 +3632,9 @@ define amdgpu_cs void @amdgpu_cs_v32i1(<32 x i1> %arg0) {
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v2.l, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v2
; GFX11-TRUE16-NEXT: global_store_b32 v[0:1], v0, off
; GFX11-TRUE16-NEXT: s_endpgm
;
@@ -3813,16 +3809,12 @@ define amdgpu_cs void @amdgpu_cs_v32i1(<32 x i1> %arg0) {
; GFX1250-TRUE16-NEXT: v_bitop3_b16 v2.l, v16.l, v16.h, 15 bitop3:0xec
; GFX1250-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v17.l
; GFX1250-TRUE16-NEXT: v_bitop3_b16 v0.l, v0.l, v0.h, 15 bitop3:0xec
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1250-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v1.l
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0
; GFX1250-TRUE16-NEXT: v_bitop3_b16 v1.h, v2.l, v2.h, 0xff bitop3:0xec
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1250-TRUE16-NEXT: v_bitop3_b16 v0.l, v0.l, v0.h, 0xff bitop3:0xec
-; GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
-; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX1250-TRUE16-NEXT: global_store_b32 v[0:1], v0, off
+; GFX1250-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-TRUE16-NEXT: v_bitop3_b16 v1.l, v0.l, v0.h, 0xff bitop3:0xec
+; GFX1250-TRUE16-NEXT: global_store_b32 v[0:1], v1, off
; GFX1250-TRUE16-NEXT: s_endpgm
;
; GFX1250-FAKE16-LABEL: amdgpu_cs_v32i1:
diff --git a/llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll b/llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
index 26f204f..14897b6 100644
--- a/llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
+++ b/llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
@@ -1771,33 +1771,29 @@ define amdgpu_kernel void @load_v4i8_to_v4f32_2_uses(ptr addrspace(1) noalias %o
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x34
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.h
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-TRUE16-NEXT: global_load_b32 v4, v0, s[0:1]
+; GFX11-TRUE16-NEXT: global_load_b32 v5, v0, s[0:1]
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v4.l, 9
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v4.h, 9
-; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff00, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff00, v4.h
-; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte3_e32 v3, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 9
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v5.h, 9
+; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff00, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff00, v5.h
+; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte3_e32 v3, v5
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h
-; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte2_e32 v2, v4
+; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte2_e32 v2, v5
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.l, 0x900, v0.l
-; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.h, 0x900, v0.h
-; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v7
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v1.l, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v5
+; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x900, v4.l
+; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x900, v4.h
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]
diff --git a/llvm/test/CodeGen/AMDGPU/frem.ll b/llvm/test/CodeGen/AMDGPU/frem.ll
index 78a961e..415828f 100644
--- a/llvm/test/CodeGen/AMDGPU/frem.ll
+++ b/llvm/test/CodeGen/AMDGPU/frem.ll
@@ -4858,7 +4858,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_cbranch_vccz .LBB9_2
-; SI-NEXT: ; %bb.1: ; %frem.else
+; SI-NEXT: ; %bb.1: ; %frem.else20
; SI-NEXT: v_bfi_b32 v7, s0, 0, v2
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: v_cmp_eq_f32_e32 vcc, v5, v6
@@ -4869,7 +4869,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB9_2:
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB9_3: ; %frem.compute
+; SI-NEXT: .LBB9_3: ; %frem.compute19
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v5|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v4, v5
@@ -4905,10 +4905,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB9_7
-; SI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; SI-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB9_5: ; %frem.loop_body
+; SI-NEXT: .LBB9_5: ; %frem.loop_body27
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v7, v5
; SI-NEXT: v_mul_f32_e32 v5, v7, v6
@@ -4923,7 +4923,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB9_5
; SI-NEXT: ; %bb.6: ; %Flow55
; SI-NEXT: v_mov_b32_e32 v5, v7
-; SI-NEXT: .LBB9_7: ; %frem.loop_exit
+; SI-NEXT: .LBB9_7: ; %frem.loop_exit28
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v5, v5, s1
; SI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -4944,7 +4944,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cvt_f32_f16_e64 v7, |v7|
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v6, v7
; SI-NEXT: s_cbranch_vccz .LBB9_10
-; SI-NEXT: ; %bb.9: ; %frem.else20
+; SI-NEXT: ; %bb.9: ; %frem.else
; SI-NEXT: s_brev_b32 s0, -2
; SI-NEXT: v_bfi_b32 v8, s0, 0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
@@ -4956,7 +4956,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB9_10:
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB9_11: ; %frem.compute19
+; SI-NEXT: .LBB9_11: ; %frem.compute
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v5, v6
@@ -4992,10 +4992,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB9_15
-; SI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; SI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB9_13: ; %frem.loop_body27
+; SI-NEXT: .LBB9_13: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v8, v6
; SI-NEXT: v_mul_f32_e32 v6, v8, v7
@@ -5010,7 +5010,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB9_13
; SI-NEXT: ; %bb.14: ; %Flow
; SI-NEXT: v_mov_b32_e32 v6, v8
-; SI-NEXT: .LBB9_15: ; %frem.loop_exit28
+; SI-NEXT: .LBB9_15: ; %frem.loop_exit
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v6, v6, s1
; SI-NEXT: v_mul_f32_e32 v7, v6, v7
@@ -5084,7 +5084,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_and_b32_e32 v5, 0x7fffffff, v3
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB9_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else20
; CI-NEXT: v_cvt_f32_f16_e32 v4, v4
; CI-NEXT: v_bfi_b32 v7, s0, 0, v2
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v6, v5
@@ -5093,7 +5093,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB9_8
; CI-NEXT: .LBB9_2:
; CI-NEXT: ; implicit-def: $vgpr4
-; CI-NEXT: .LBB9_3: ; %frem.compute
+; CI-NEXT: .LBB9_3: ; %frem.compute19
; CI-NEXT: v_frexp_exp_i32_f32_e32 v9, v6
; CI-NEXT: v_frexp_mant_f32_e32 v4, v6
; CI-NEXT: v_frexp_mant_f32_e32 v6, v5
@@ -5118,10 +5118,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v6
; CI-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB9_7
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; CI-NEXT: v_sub_i32_e32 v6, vcc, v9, v10
; CI-NEXT: v_add_i32_e32 v6, vcc, 11, v6
-; CI-NEXT: .LBB9_5: ; %frem.loop_body
+; CI-NEXT: .LBB9_5: ; %frem.loop_body27
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v9, v7
; CI-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -5136,7 +5136,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB9_5
; CI-NEXT: ; %bb.6: ; %Flow55
; CI-NEXT: v_mov_b32_e32 v7, v9
-; CI-NEXT: .LBB9_7: ; %frem.loop_exit
+; CI-NEXT: .LBB9_7: ; %frem.loop_exit28
; CI-NEXT: v_add_i32_e32 v6, vcc, -10, v6
; CI-NEXT: v_ldexp_f32_e32 v6, v7, v6
; CI-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -5157,7 +5157,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v6, |v6|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v7, v6
; CI-NEXT: s_cbranch_vccz .LBB9_10
-; CI-NEXT: ; %bb.9: ; %frem.else20
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: v_cvt_f32_f16_e32 v5, v5
; CI-NEXT: s_brev_b32 s0, -2
; CI-NEXT: v_bfi_b32 v8, s0, 0, v0
@@ -5167,7 +5167,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB9_16
; CI-NEXT: .LBB9_10:
; CI-NEXT: ; implicit-def: $vgpr5
-; CI-NEXT: .LBB9_11: ; %frem.compute19
+; CI-NEXT: .LBB9_11: ; %frem.compute
; CI-NEXT: v_frexp_exp_i32_f32_e32 v10, v7
; CI-NEXT: v_frexp_mant_f32_e32 v5, v7
; CI-NEXT: v_frexp_mant_f32_e32 v7, v6
@@ -5192,10 +5192,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v7
; CI-NEXT: v_div_fixup_f32 v9, v9, v6, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB9_15
-; CI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_sub_i32_e32 v7, vcc, v10, v11
; CI-NEXT: v_add_i32_e32 v7, vcc, 11, v7
-; CI-NEXT: .LBB9_13: ; %frem.loop_body27
+; CI-NEXT: .LBB9_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v10, v8
; CI-NEXT: v_mul_f32_e32 v8, v10, v9
@@ -5210,7 +5210,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB9_13
; CI-NEXT: ; %bb.14: ; %Flow
; CI-NEXT: v_mov_b32_e32 v8, v10
-; CI-NEXT: .LBB9_15: ; %frem.loop_exit28
+; CI-NEXT: .LBB9_15: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v7, vcc, -10, v7
; CI-NEXT: v_ldexp_f32_e32 v7, v8, v7
; CI-NEXT: v_mul_f32_e32 v8, v7, v9
@@ -5275,7 +5275,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v3, |v1|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v4, v3
; VI-NEXT: s_cbranch_vccz .LBB9_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else20
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v2, s2, 0, v0
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v4, v3
@@ -5284,7 +5284,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB9_8
; VI-NEXT: .LBB9_2:
; VI-NEXT: ; implicit-def: $vgpr2
-; VI-NEXT: .LBB9_3: ; %frem.compute
+; VI-NEXT: .LBB9_3: ; %frem.compute19
; VI-NEXT: v_frexp_exp_i32_f32_e32 v7, v4
; VI-NEXT: v_frexp_mant_f32_e32 v2, v4
; VI-NEXT: v_frexp_mant_f32_e32 v4, v3
@@ -5309,10 +5309,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v4
; VI-NEXT: v_div_fixup_f32 v6, v6, v3, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB9_7
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; VI-NEXT: v_sub_u32_e32 v4, vcc, v7, v8
; VI-NEXT: v_add_u32_e32 v4, vcc, 11, v4
-; VI-NEXT: .LBB9_5: ; %frem.loop_body
+; VI-NEXT: .LBB9_5: ; %frem.loop_body27
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v7, v5
; VI-NEXT: v_mul_f32_e32 v5, v7, v6
@@ -5327,7 +5327,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB9_5
; VI-NEXT: ; %bb.6: ; %Flow55
; VI-NEXT: v_mov_b32_e32 v5, v7
-; VI-NEXT: .LBB9_7: ; %frem.loop_exit
+; VI-NEXT: .LBB9_7: ; %frem.loop_exit28
; VI-NEXT: v_add_u32_e32 v4, vcc, -10, v4
; VI-NEXT: v_ldexp_f32 v4, v5, v4
; VI-NEXT: v_mul_f32_e32 v5, v4, v6
@@ -5347,7 +5347,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v6, |v4|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v7, v6
; VI-NEXT: s_cbranch_vccz .LBB9_10
-; VI-NEXT: ; %bb.9: ; %frem.else20
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v5, s2, 0, v3
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v7, v6
@@ -5356,7 +5356,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB9_16
; VI-NEXT: .LBB9_10:
; VI-NEXT: ; implicit-def: $vgpr5
-; VI-NEXT: .LBB9_11: ; %frem.compute19
+; VI-NEXT: .LBB9_11: ; %frem.compute
; VI-NEXT: v_frexp_exp_i32_f32_e32 v10, v7
; VI-NEXT: v_frexp_mant_f32_e32 v5, v7
; VI-NEXT: v_frexp_mant_f32_e32 v7, v6
@@ -5381,10 +5381,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v7
; VI-NEXT: v_div_fixup_f32 v9, v9, v6, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB9_15
-; VI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_sub_u32_e32 v7, vcc, v10, v11
; VI-NEXT: v_add_u32_e32 v7, vcc, 11, v7
-; VI-NEXT: .LBB9_13: ; %frem.loop_body27
+; VI-NEXT: .LBB9_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v10, v8
; VI-NEXT: v_mul_f32_e32 v8, v10, v9
@@ -5399,7 +5399,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB9_13
; VI-NEXT: ; %bb.14: ; %Flow
; VI-NEXT: v_mov_b32_e32 v8, v10
-; VI-NEXT: .LBB9_15: ; %frem.loop_exit28
+; VI-NEXT: .LBB9_15: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v7, vcc, -10, v7
; VI-NEXT: v_ldexp_f32 v7, v8, v7
; VI-NEXT: v_mul_f32_e32 v8, v7, v9
@@ -5443,7 +5443,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_e64 v3, |v0|
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v4, v3
; GFX9-NEXT: s_cbranch_vccz .LBB9_2
-; GFX9-NEXT: ; %bb.1: ; %frem.else
+; GFX9-NEXT: ; %bb.1: ; %frem.else20
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v2, s2, 0, v1
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v4, v3
@@ -5452,7 +5452,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB9_8
; GFX9-NEXT: .LBB9_2:
; GFX9-NEXT: ; implicit-def: $vgpr2
-; GFX9-NEXT: .LBB9_3: ; %frem.compute
+; GFX9-NEXT: .LBB9_3: ; %frem.compute19
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v7, v4
; GFX9-NEXT: v_frexp_mant_f32_e32 v2, v4
; GFX9-NEXT: v_frexp_mant_f32_e32 v4, v3
@@ -5477,10 +5477,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v4
; GFX9-NEXT: v_div_fixup_f32 v6, v6, v3, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX9-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX9-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX9-NEXT: v_sub_u32_e32 v4, v7, v8
; GFX9-NEXT: v_add_u32_e32 v4, 11, v4
-; GFX9-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX9-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v7, v5
; GFX9-NEXT: v_mul_f32_e32 v5, v7, v6
@@ -5495,7 +5495,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB9_5
; GFX9-NEXT: ; %bb.6: ; %Flow55
; GFX9-NEXT: v_mov_b32_e32 v5, v7
-; GFX9-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX9-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX9-NEXT: v_add_u32_e32 v4, -10, v4
; GFX9-NEXT: v_ldexp_f32 v4, v5, v4
; GFX9-NEXT: v_mul_f32_e32 v5, v4, v6
@@ -5514,7 +5514,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_sdwa v5, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v6, v5
; GFX9-NEXT: s_cbranch_vccz .LBB9_10
-; GFX9-NEXT: ; %bb.9: ; %frem.else20
+; GFX9-NEXT: ; %bb.9: ; %frem.else
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v4, s2, 0, v3
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v6, v5
@@ -5523,7 +5523,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB9_16
; GFX9-NEXT: .LBB9_10:
; GFX9-NEXT: ; implicit-def: $vgpr4
-; GFX9-NEXT: .LBB9_11: ; %frem.compute19
+; GFX9-NEXT: .LBB9_11: ; %frem.compute
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v9, v6
; GFX9-NEXT: v_frexp_mant_f32_e32 v4, v6
; GFX9-NEXT: v_frexp_mant_f32_e32 v6, v5
@@ -5548,10 +5548,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v6
; GFX9-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX9-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX9-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX9-NEXT: v_sub_u32_e32 v6, v9, v10
; GFX9-NEXT: v_add_u32_e32 v6, 11, v6
-; GFX9-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX9-NEXT: .LBB9_13: ; %frem.loop_body
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v9, v7
; GFX9-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -5566,7 +5566,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB9_13
; GFX9-NEXT: ; %bb.14: ; %Flow
; GFX9-NEXT: v_mov_b32_e32 v7, v9
-; GFX9-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX9-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX9-NEXT: v_add_u32_e32 v6, -10, v6
; GFX9-NEXT: v_ldexp_f32 v6, v7, v6
; GFX9-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -5612,7 +5612,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v3, |v0|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
; GFX10-NEXT: s_cbranch_vccz .LBB9_2
-; GFX10-NEXT: ; %bb.1: ; %frem.else
+; GFX10-NEXT: ; %bb.1: ; %frem.else20
; GFX10-NEXT: v_bfi_b32 v2, 0x7fff, 0, v1
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
; GFX10-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc_lo
@@ -5620,7 +5620,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB9_8
; GFX10-NEXT: .LBB9_2:
; GFX10-NEXT: ; implicit-def: $vgpr2
-; GFX10-NEXT: .LBB9_3: ; %frem.compute
+; GFX10-NEXT: .LBB9_3: ; %frem.compute19
; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v4
; GFX10-NEXT: v_frexp_mant_f32_e32 v6, v3
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
@@ -5647,10 +5647,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
; GFX10-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX10-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX10-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX10-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v7, v4
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -5666,7 +5666,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.6: ; %Flow55
; GFX10-NEXT: v_mov_b32_e32 v6, s2
; GFX10-NEXT: v_mov_b32_e32 v4, v7
-; GFX10-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX10-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX10-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX10-NEXT: v_ldexp_f32 v4, v4, v6
; GFX10-NEXT: v_mul_f32_e32 v5, v4, v5
@@ -5684,7 +5684,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v6, |v3|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v6, v4
; GFX10-NEXT: s_cbranch_vccz .LBB9_10
-; GFX10-NEXT: ; %bb.9: ; %frem.else20
+; GFX10-NEXT: ; %bb.9: ; %frem.else
; GFX10-NEXT: v_bfi_b32 v5, 0x7fff, 0, v3
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v6, v4
; GFX10-NEXT: v_cndmask_b32_e32 v5, v3, v5, vcc_lo
@@ -5692,7 +5692,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB9_16
; GFX10-NEXT: .LBB9_10:
; GFX10-NEXT: ; implicit-def: $vgpr5
-; GFX10-NEXT: .LBB9_11: ; %frem.compute19
+; GFX10-NEXT: .LBB9_11: ; %frem.compute
; GFX10-NEXT: v_frexp_mant_f32_e32 v5, v6
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
; GFX10-NEXT: v_ldexp_f32 v6, v5, 11
@@ -5719,10 +5719,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v8
; GFX10-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX10-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX10-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX10-NEXT: .LBB9_13: ; %frem.loop_body
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v9, v6
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -5738,7 +5738,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.14: ; %Flow
; GFX10-NEXT: v_mov_b32_e32 v8, s2
; GFX10-NEXT: v_mov_b32_e32 v6, v9
-; GFX10-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX10-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX10-NEXT: v_add_nc_u32_e32 v8, -10, v8
; GFX10-NEXT: v_ldexp_f32 v6, v6, v8
; GFX10-NEXT: v_mul_f32_e32 v7, v6, v7
@@ -5782,7 +5782,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB9_2
-; GFX11-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %frem.else20
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
@@ -5793,7 +5793,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB9_8
; GFX11-TRUE16-NEXT: .LBB9_2:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX11-TRUE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX11-TRUE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, v4
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v3
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
@@ -5829,11 +5829,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX11-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, v4
@@ -5853,7 +5853,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.6: ; %Flow55
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX11-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX11-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX11-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -5880,7 +5880,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v6, v5
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB9_10
-; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v3.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v6, v5
@@ -5891,7 +5891,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB9_16
; GFX11-TRUE16-NEXT: .LBB9_10:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7
-; GFX11-TRUE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX11-TRUE16-NEXT: .LBB9_11: ; %frem.compute
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v6
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v6, v6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
@@ -5927,11 +5927,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX11-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, v7
@@ -5951,7 +5951,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.14: ; %Flow
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, v10
-; GFX11-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX11-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
; GFX11-TRUE16-NEXT: v_ldexp_f32 v7, v7, v9
@@ -6002,7 +6002,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v4, v3
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB9_2
-; GFX11-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %frem.else20
; GFX11-FAKE16-NEXT: v_bfi_b32 v2, 0x7fff, 0, v0
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v4, v3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -6011,7 +6011,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB9_8
; GFX11-FAKE16-NEXT: .LBB9_2:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr2
-; GFX11-FAKE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX11-FAKE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, v4
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v6, v3
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v5, v4
@@ -6047,11 +6047,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX11-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX11-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, v4
@@ -6071,7 +6071,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.6: ; %Flow55
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX11-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX11-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX11-FAKE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -6097,7 +6097,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v7, v5
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB9_10
-; GFX11-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX11-FAKE16-NEXT: ; %bb.9: ; %frem.else
; GFX11-FAKE16-NEXT: v_bfi_b32 v6, 0x7fff, 0, v3
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v7, v5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -6106,7 +6106,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB9_16
; GFX11-FAKE16-NEXT: .LBB9_10:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr6
-; GFX11-FAKE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX11-FAKE16-NEXT: .LBB9_11: ; %frem.compute
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v6, v7
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v8, v7
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
@@ -6142,11 +6142,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX11-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX11-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX11-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, v7
@@ -6166,7 +6166,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.14: ; %Flow
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v9, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, v10
-; GFX11-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX11-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, -10, v9
; GFX11-FAKE16-NEXT: v_ldexp_f32 v7, v7, v9
@@ -6220,7 +6220,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s6, s5
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB9_2
-; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else20
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v0.l, s4
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s6, s5
@@ -6232,7 +6232,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB9_8
; GFX1150-TRUE16-NEXT: .LBB9_2:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-TRUE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX1150-TRUE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s5
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s6
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -6267,11 +6267,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s5, s6, s5
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s5, s5, 11
-; GFX1150-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX1150-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v5, v2
@@ -6293,7 +6293,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.6: ; %Flow55
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, s5
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX1150-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -6323,7 +6323,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s8, s7
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v1.l, s6
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s8, s7
@@ -6335,7 +6335,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB9_16
; GFX1150-TRUE16-NEXT: .LBB9_10:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX1150-TRUE16-NEXT: .LBB9_11: ; %frem.compute
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s7
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s8
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
@@ -6370,11 +6370,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s7, s8, s7
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s7, s7, 11
-; GFX1150-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX1150-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, v3
@@ -6396,7 +6396,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.14: ; %Flow
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v5, s7
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX1150-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -6459,7 +6459,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s6, s5
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB9_2
-; GFX1150-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-FAKE16-NEXT: ; %bb.1: ; %frem.else20
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s6, s5
; GFX1150-FAKE16-NEXT: v_bfi_b32 v0, 0x7fff, 0, s4
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -6469,7 +6469,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB9_8
; GFX1150-FAKE16-NEXT: .LBB9_2:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-FAKE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX1150-FAKE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s5
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v0, s6
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -6504,11 +6504,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX1150-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s5, s6, s5
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s5, s5, 11
-; GFX1150-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX1150-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v5, v2
@@ -6530,7 +6530,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.6: ; %Flow55
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v4, s5
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX1150-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -6559,7 +6559,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s8, s7
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1150-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1150-FAKE16-NEXT: ; %bb.9: ; %frem.else
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s8, s7
; GFX1150-FAKE16-NEXT: v_bfi_b32 v1, 0x7fff, 0, s6
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -6569,7 +6569,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB9_16
; GFX1150-FAKE16-NEXT: .LBB9_10:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-FAKE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX1150-FAKE16-NEXT: .LBB9_11: ; %frem.compute
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s7
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s8
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
@@ -6604,11 +6604,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1150-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s7, s8, s7
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s7, s7, 11
-; GFX1150-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX1150-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v6, v3
@@ -6630,7 +6630,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.14: ; %Flow
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v5, s7
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX1150-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -6690,7 +6690,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s6, s5
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB9_2
-; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else20
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v0.l, s4
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s6, s5
@@ -6702,7 +6702,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB9_8
; GFX1200-TRUE16-NEXT: .LBB9_2:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-TRUE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX1200-TRUE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s5
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s6
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -6737,11 +6737,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s5, s6, s5
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s5, s5, 11
-; GFX1200-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX1200-TRUE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v5, v2
@@ -6765,7 +6765,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.6: ; %Flow55
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, s5
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX1200-TRUE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -6799,7 +6799,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s8, s7
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v1.l, s6
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s8, s7
@@ -6811,7 +6811,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB9_16
; GFX1200-TRUE16-NEXT: .LBB9_10:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX1200-TRUE16-NEXT: .LBB9_11: ; %frem.compute
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s7
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s8
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
@@ -6847,11 +6847,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s7, s8, s7
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s7, s7, 11
-; GFX1200-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX1200-TRUE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, v3
@@ -6875,7 +6875,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.14: ; %Flow
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v5, s7
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX1200-TRUE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -6940,7 +6940,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s6, s5
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB9_2
-; GFX1200-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-FAKE16-NEXT: ; %bb.1: ; %frem.else20
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s6, s5
; GFX1200-FAKE16-NEXT: v_bfi_b32 v0, 0x7fff, 0, s4
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -6950,7 +6950,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB9_8
; GFX1200-FAKE16-NEXT: .LBB9_2:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-FAKE16-NEXT: .LBB9_3: ; %frem.compute
+; GFX1200-FAKE16-NEXT: .LBB9_3: ; %frem.compute19
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s5
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v0, s6
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -6986,11 +6986,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB9_7
-; GFX1200-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body27.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s5, s6, s5
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s5, s5, 11
-; GFX1200-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body
+; GFX1200-FAKE16-NEXT: .LBB9_5: ; %frem.loop_body27
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v5, v2
@@ -7014,7 +7014,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.6: ; %Flow55
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v4, s5
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit
+; GFX1200-FAKE16-NEXT: .LBB9_7: ; %frem.loop_exit28
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -7047,7 +7047,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s8, s7
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB9_10
-; GFX1200-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1200-FAKE16-NEXT: ; %bb.9: ; %frem.else
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s8, s7
; GFX1200-FAKE16-NEXT: v_bfi_b32 v1, 0x7fff, 0, s6
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -7058,7 +7058,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB9_16
; GFX1200-FAKE16-NEXT: .LBB9_10:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-FAKE16-NEXT: .LBB9_11: ; %frem.compute19
+; GFX1200-FAKE16-NEXT: .LBB9_11: ; %frem.compute
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s7
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s8
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s8
@@ -7094,11 +7094,11 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB9_15
-; GFX1200-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s7, s8, s7
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s7, s7, 11
-; GFX1200-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body27
+; GFX1200-FAKE16-NEXT: .LBB9_13: ; %frem.loop_body
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v6, v3
@@ -7122,7 +7122,7 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.14: ; %Flow
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v5, s7
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit28
+; GFX1200-FAKE16-NEXT: .LBB9_15: ; %frem.loop_exit
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -7208,7 +7208,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
; SI-NEXT: s_cbranch_vccz .LBB10_2
-; SI-NEXT: ; %bb.1: ; %frem.else
+; SI-NEXT: ; %bb.1: ; %frem.else86
; SI-NEXT: v_bfi_b32 v11, s0, 0, v6
; SI-NEXT: v_cvt_f32_f16_e32 v8, v8
; SI-NEXT: v_cmp_eq_f32_e32 vcc, v9, v10
@@ -7219,7 +7219,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB10_2:
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB10_3: ; %frem.compute
+; SI-NEXT: .LBB10_3: ; %frem.compute85
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v9|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v8, v9
@@ -7255,10 +7255,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB10_7
-; SI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; SI-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB10_5: ; %frem.loop_body
+; SI-NEXT: .LBB10_5: ; %frem.loop_body93
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v11, v9
; SI-NEXT: v_mul_f32_e32 v9, v11, v10
@@ -7273,7 +7273,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB10_5
; SI-NEXT: ; %bb.6: ; %Flow133
; SI-NEXT: v_mov_b32_e32 v9, v11
-; SI-NEXT: .LBB10_7: ; %frem.loop_exit
+; SI-NEXT: .LBB10_7: ; %frem.loop_exit94
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v9, v9, s1
; SI-NEXT: v_mul_f32_e32 v10, v9, v10
@@ -7294,7 +7294,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cvt_f32_f16_e64 v11, |v11|
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v10, v11
; SI-NEXT: s_cbranch_vccz .LBB10_10
-; SI-NEXT: ; %bb.9: ; %frem.else20
+; SI-NEXT: ; %bb.9: ; %frem.else53
; SI-NEXT: s_brev_b32 s0, -2
; SI-NEXT: v_bfi_b32 v12, s0, 0, v4
; SI-NEXT: v_cvt_f32_f16_e32 v9, v9
@@ -7306,7 +7306,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB10_10:
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB10_11: ; %frem.compute19
+; SI-NEXT: .LBB10_11: ; %frem.compute52
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v10|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v9, v10
@@ -7342,10 +7342,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB10_15
-; SI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; SI-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB10_13: ; %frem.loop_body27
+; SI-NEXT: .LBB10_13: ; %frem.loop_body60
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v12, v10
; SI-NEXT: v_mul_f32_e32 v10, v12, v11
@@ -7360,7 +7360,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB10_13
; SI-NEXT: ; %bb.14: ; %Flow129
; SI-NEXT: v_mov_b32_e32 v10, v12
-; SI-NEXT: .LBB10_15: ; %frem.loop_exit28
+; SI-NEXT: .LBB10_15: ; %frem.loop_exit61
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v10, v10, s1
; SI-NEXT: v_mul_f32_e32 v11, v10, v11
@@ -7381,7 +7381,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cvt_f32_f16_e64 v12, |v12|
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v11, v12
; SI-NEXT: s_cbranch_vccz .LBB10_18
-; SI-NEXT: ; %bb.17: ; %frem.else53
+; SI-NEXT: ; %bb.17: ; %frem.else20
; SI-NEXT: s_brev_b32 s0, -2
; SI-NEXT: v_bfi_b32 v13, s0, 0, v2
; SI-NEXT: v_cvt_f32_f16_e32 v10, v10
@@ -7393,7 +7393,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB10_18:
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB10_19: ; %frem.compute52
+; SI-NEXT: .LBB10_19: ; %frem.compute19
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v11|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v10, v11
@@ -7429,10 +7429,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v12, v12, v10, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB10_23
-; SI-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; SI-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB10_21: ; %frem.loop_body60
+; SI-NEXT: .LBB10_21: ; %frem.loop_body27
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v13, v11
; SI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -7447,7 +7447,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB10_21
; SI-NEXT: ; %bb.22: ; %Flow125
; SI-NEXT: v_mov_b32_e32 v11, v13
-; SI-NEXT: .LBB10_23: ; %frem.loop_exit61
+; SI-NEXT: .LBB10_23: ; %frem.loop_exit28
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v11, v11, s1
; SI-NEXT: v_mul_f32_e32 v12, v11, v12
@@ -7468,7 +7468,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cvt_f32_f16_e64 v13, |v13|
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v12, v13
; SI-NEXT: s_cbranch_vccz .LBB10_26
-; SI-NEXT: ; %bb.25: ; %frem.else86
+; SI-NEXT: ; %bb.25: ; %frem.else
; SI-NEXT: s_brev_b32 s0, -2
; SI-NEXT: v_bfi_b32 v14, s0, 0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
@@ -7480,7 +7480,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB10_26:
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB10_27: ; %frem.compute85
+; SI-NEXT: .LBB10_27: ; %frem.compute
; SI-NEXT: s_mov_b32 s3, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 vcc, |v12|, s3
; SI-NEXT: v_frexp_exp_i32_f32_e32 v11, v12
@@ -7516,10 +7516,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v13, v13, v11, 1.0
; SI-NEXT: s_cmp_lt_i32 s1, 12
; SI-NEXT: s_cbranch_scc1 .LBB10_31
-; SI-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; SI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; SI-NEXT: s_sub_i32 s1, s2, s3
; SI-NEXT: s_add_i32 s1, s1, 11
-; SI-NEXT: .LBB10_29: ; %frem.loop_body93
+; SI-NEXT: .LBB10_29: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v14, v12
; SI-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -7534,7 +7534,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB10_29
; SI-NEXT: ; %bb.30: ; %Flow
; SI-NEXT: v_mov_b32_e32 v12, v14
-; SI-NEXT: .LBB10_31: ; %frem.loop_exit94
+; SI-NEXT: .LBB10_31: ; %frem.loop_exit
; SI-NEXT: s_add_i32 s1, s1, -10
; SI-NEXT: v_ldexp_f32_e64 v12, v12, s1
; SI-NEXT: v_mul_f32_e32 v13, v12, v13
@@ -7638,7 +7638,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_and_b32_e32 v9, 0x7fffffff, v7
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB10_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else86
; CI-NEXT: v_cvt_f32_f16_e32 v8, v8
; CI-NEXT: v_bfi_b32 v11, s0, 0, v6
; CI-NEXT: v_cmp_eq_f32_e32 vcc, v10, v9
@@ -7647,7 +7647,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_8
; CI-NEXT: .LBB10_2:
; CI-NEXT: ; implicit-def: $vgpr8
-; CI-NEXT: .LBB10_3: ; %frem.compute
+; CI-NEXT: .LBB10_3: ; %frem.compute85
; CI-NEXT: v_frexp_exp_i32_f32_e32 v13, v10
; CI-NEXT: v_frexp_mant_f32_e32 v8, v10
; CI-NEXT: v_frexp_mant_f32_e32 v10, v9
@@ -7672,10 +7672,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v10
; CI-NEXT: v_div_fixup_f32 v12, v12, v9, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_7
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; CI-NEXT: v_sub_i32_e32 v10, vcc, v13, v14
; CI-NEXT: v_add_i32_e32 v10, vcc, 11, v10
-; CI-NEXT: .LBB10_5: ; %frem.loop_body
+; CI-NEXT: .LBB10_5: ; %frem.loop_body93
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v13, v11
; CI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -7690,7 +7690,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB10_5
; CI-NEXT: ; %bb.6: ; %Flow133
; CI-NEXT: v_mov_b32_e32 v11, v13
-; CI-NEXT: .LBB10_7: ; %frem.loop_exit
+; CI-NEXT: .LBB10_7: ; %frem.loop_exit94
; CI-NEXT: v_add_i32_e32 v10, vcc, -10, v10
; CI-NEXT: v_ldexp_f32_e32 v10, v11, v10
; CI-NEXT: v_mul_f32_e32 v11, v10, v12
@@ -7711,7 +7711,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v10, |v10|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v11, v10
; CI-NEXT: s_cbranch_vccz .LBB10_10
-; CI-NEXT: ; %bb.9: ; %frem.else20
+; CI-NEXT: ; %bb.9: ; %frem.else53
; CI-NEXT: v_cvt_f32_f16_e32 v9, v9
; CI-NEXT: s_brev_b32 s0, -2
; CI-NEXT: v_bfi_b32 v12, s0, 0, v4
@@ -7721,7 +7721,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_16
; CI-NEXT: .LBB10_10:
; CI-NEXT: ; implicit-def: $vgpr9
-; CI-NEXT: .LBB10_11: ; %frem.compute19
+; CI-NEXT: .LBB10_11: ; %frem.compute52
; CI-NEXT: v_frexp_exp_i32_f32_e32 v14, v11
; CI-NEXT: v_frexp_mant_f32_e32 v9, v11
; CI-NEXT: v_frexp_mant_f32_e32 v11, v10
@@ -7746,10 +7746,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v11
; CI-NEXT: v_div_fixup_f32 v13, v13, v10, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_15
-; CI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; CI-NEXT: v_sub_i32_e32 v11, vcc, v14, v15
; CI-NEXT: v_add_i32_e32 v11, vcc, 11, v11
-; CI-NEXT: .LBB10_13: ; %frem.loop_body27
+; CI-NEXT: .LBB10_13: ; %frem.loop_body60
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v14, v12
; CI-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -7764,7 +7764,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB10_13
; CI-NEXT: ; %bb.14: ; %Flow129
; CI-NEXT: v_mov_b32_e32 v12, v14
-; CI-NEXT: .LBB10_15: ; %frem.loop_exit28
+; CI-NEXT: .LBB10_15: ; %frem.loop_exit61
; CI-NEXT: v_add_i32_e32 v11, vcc, -10, v11
; CI-NEXT: v_ldexp_f32_e32 v11, v12, v11
; CI-NEXT: v_mul_f32_e32 v12, v11, v13
@@ -7785,7 +7785,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v11, |v11|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v12, v11
; CI-NEXT: s_cbranch_vccz .LBB10_18
-; CI-NEXT: ; %bb.17: ; %frem.else53
+; CI-NEXT: ; %bb.17: ; %frem.else20
; CI-NEXT: v_cvt_f32_f16_e32 v10, v10
; CI-NEXT: s_brev_b32 s0, -2
; CI-NEXT: v_bfi_b32 v13, s0, 0, v2
@@ -7795,7 +7795,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_24
; CI-NEXT: .LBB10_18:
; CI-NEXT: ; implicit-def: $vgpr10
-; CI-NEXT: .LBB10_19: ; %frem.compute52
+; CI-NEXT: .LBB10_19: ; %frem.compute19
; CI-NEXT: v_frexp_exp_i32_f32_e32 v15, v12
; CI-NEXT: v_frexp_mant_f32_e32 v10, v12
; CI-NEXT: v_frexp_mant_f32_e32 v12, v11
@@ -7820,10 +7820,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v12
; CI-NEXT: v_div_fixup_f32 v14, v14, v11, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_23
-; CI-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; CI-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; CI-NEXT: v_sub_i32_e32 v12, vcc, v15, v16
; CI-NEXT: v_add_i32_e32 v12, vcc, 11, v12
-; CI-NEXT: .LBB10_21: ; %frem.loop_body60
+; CI-NEXT: .LBB10_21: ; %frem.loop_body27
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v15, v13
; CI-NEXT: v_mul_f32_e32 v13, v15, v14
@@ -7838,7 +7838,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB10_21
; CI-NEXT: ; %bb.22: ; %Flow125
; CI-NEXT: v_mov_b32_e32 v13, v15
-; CI-NEXT: .LBB10_23: ; %frem.loop_exit61
+; CI-NEXT: .LBB10_23: ; %frem.loop_exit28
; CI-NEXT: v_add_i32_e32 v12, vcc, -10, v12
; CI-NEXT: v_ldexp_f32_e32 v12, v13, v12
; CI-NEXT: v_mul_f32_e32 v13, v12, v14
@@ -7859,7 +7859,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cvt_f32_f16_e64 v12, |v12|
; CI-NEXT: v_cmp_ngt_f32_e32 vcc, v13, v12
; CI-NEXT: s_cbranch_vccz .LBB10_26
-; CI-NEXT: ; %bb.25: ; %frem.else86
+; CI-NEXT: ; %bb.25: ; %frem.else
; CI-NEXT: v_cvt_f32_f16_e32 v11, v11
; CI-NEXT: s_brev_b32 s0, -2
; CI-NEXT: v_bfi_b32 v14, s0, 0, v0
@@ -7869,7 +7869,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB10_32
; CI-NEXT: .LBB10_26:
; CI-NEXT: ; implicit-def: $vgpr11
-; CI-NEXT: .LBB10_27: ; %frem.compute85
+; CI-NEXT: .LBB10_27: ; %frem.compute
; CI-NEXT: v_frexp_exp_i32_f32_e32 v16, v13
; CI-NEXT: v_frexp_mant_f32_e32 v11, v13
; CI-NEXT: v_frexp_mant_f32_e32 v13, v12
@@ -7894,10 +7894,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v13
; CI-NEXT: v_div_fixup_f32 v15, v15, v12, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB10_31
-; CI-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; CI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; CI-NEXT: v_sub_i32_e32 v13, vcc, v16, v17
; CI-NEXT: v_add_i32_e32 v13, vcc, 11, v13
-; CI-NEXT: .LBB10_29: ; %frem.loop_body93
+; CI-NEXT: .LBB10_29: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v16, v14
; CI-NEXT: v_mul_f32_e32 v14, v16, v15
@@ -7912,7 +7912,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB10_29
; CI-NEXT: ; %bb.30: ; %Flow
; CI-NEXT: v_mov_b32_e32 v14, v16
-; CI-NEXT: .LBB10_31: ; %frem.loop_exit94
+; CI-NEXT: .LBB10_31: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v13, vcc, -10, v13
; CI-NEXT: v_ldexp_f32_e32 v13, v14, v13
; CI-NEXT: v_mul_f32_e32 v14, v13, v15
@@ -8001,7 +8001,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v5, |v2|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v6, v5
; VI-NEXT: s_cbranch_vccz .LBB10_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else86
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v4, s2, 0, v0
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v6, v5
@@ -8010,7 +8010,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_8
; VI-NEXT: .LBB10_2:
; VI-NEXT: ; implicit-def: $vgpr4
-; VI-NEXT: .LBB10_3: ; %frem.compute
+; VI-NEXT: .LBB10_3: ; %frem.compute85
; VI-NEXT: v_frexp_exp_i32_f32_e32 v9, v6
; VI-NEXT: v_frexp_mant_f32_e32 v4, v6
; VI-NEXT: v_frexp_mant_f32_e32 v6, v5
@@ -8035,10 +8035,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v6
; VI-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_7
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; VI-NEXT: v_sub_u32_e32 v6, vcc, v9, v10
; VI-NEXT: v_add_u32_e32 v6, vcc, 11, v6
-; VI-NEXT: .LBB10_5: ; %frem.loop_body
+; VI-NEXT: .LBB10_5: ; %frem.loop_body93
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v9, v7
; VI-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -8053,7 +8053,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB10_5
; VI-NEXT: ; %bb.6: ; %Flow133
; VI-NEXT: v_mov_b32_e32 v7, v9
-; VI-NEXT: .LBB10_7: ; %frem.loop_exit
+; VI-NEXT: .LBB10_7: ; %frem.loop_exit94
; VI-NEXT: v_add_u32_e32 v6, vcc, -10, v6
; VI-NEXT: v_ldexp_f32 v6, v7, v6
; VI-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -8073,7 +8073,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v8, |v6|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v9, v8
; VI-NEXT: s_cbranch_vccz .LBB10_10
-; VI-NEXT: ; %bb.9: ; %frem.else20
+; VI-NEXT: ; %bb.9: ; %frem.else53
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v7, s2, 0, v5
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v9, v8
@@ -8082,7 +8082,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_16
; VI-NEXT: .LBB10_10:
; VI-NEXT: ; implicit-def: $vgpr7
-; VI-NEXT: .LBB10_11: ; %frem.compute19
+; VI-NEXT: .LBB10_11: ; %frem.compute52
; VI-NEXT: v_frexp_exp_i32_f32_e32 v12, v9
; VI-NEXT: v_frexp_mant_f32_e32 v7, v9
; VI-NEXT: v_frexp_mant_f32_e32 v9, v8
@@ -8107,10 +8107,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v9
; VI-NEXT: v_div_fixup_f32 v11, v11, v8, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_15
-; VI-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; VI-NEXT: v_sub_u32_e32 v9, vcc, v12, v13
; VI-NEXT: v_add_u32_e32 v9, vcc, 11, v9
-; VI-NEXT: .LBB10_13: ; %frem.loop_body27
+; VI-NEXT: .LBB10_13: ; %frem.loop_body60
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v12, v10
; VI-NEXT: v_mul_f32_e32 v10, v12, v11
@@ -8125,7 +8125,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB10_13
; VI-NEXT: ; %bb.14: ; %Flow129
; VI-NEXT: v_mov_b32_e32 v10, v12
-; VI-NEXT: .LBB10_15: ; %frem.loop_exit28
+; VI-NEXT: .LBB10_15: ; %frem.loop_exit61
; VI-NEXT: v_add_u32_e32 v9, vcc, -10, v9
; VI-NEXT: v_ldexp_f32 v9, v10, v9
; VI-NEXT: v_mul_f32_e32 v10, v9, v11
@@ -8143,7 +8143,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v9, |v3|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v10, v9
; VI-NEXT: s_cbranch_vccz .LBB10_18
-; VI-NEXT: ; %bb.17: ; %frem.else53
+; VI-NEXT: ; %bb.17: ; %frem.else20
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v8, s2, 0, v1
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v10, v9
@@ -8152,7 +8152,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_24
; VI-NEXT: .LBB10_18:
; VI-NEXT: ; implicit-def: $vgpr8
-; VI-NEXT: .LBB10_19: ; %frem.compute52
+; VI-NEXT: .LBB10_19: ; %frem.compute19
; VI-NEXT: v_frexp_exp_i32_f32_e32 v13, v10
; VI-NEXT: v_frexp_mant_f32_e32 v8, v10
; VI-NEXT: v_frexp_mant_f32_e32 v10, v9
@@ -8177,10 +8177,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v10
; VI-NEXT: v_div_fixup_f32 v12, v12, v9, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_23
-; VI-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; VI-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; VI-NEXT: v_sub_u32_e32 v10, vcc, v13, v14
; VI-NEXT: v_add_u32_e32 v10, vcc, 11, v10
-; VI-NEXT: .LBB10_21: ; %frem.loop_body60
+; VI-NEXT: .LBB10_21: ; %frem.loop_body27
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v13, v11
; VI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -8195,7 +8195,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB10_21
; VI-NEXT: ; %bb.22: ; %Flow125
; VI-NEXT: v_mov_b32_e32 v11, v13
-; VI-NEXT: .LBB10_23: ; %frem.loop_exit61
+; VI-NEXT: .LBB10_23: ; %frem.loop_exit28
; VI-NEXT: v_add_u32_e32 v10, vcc, -10, v10
; VI-NEXT: v_ldexp_f32 v10, v11, v10
; VI-NEXT: v_mul_f32_e32 v11, v10, v12
@@ -8215,7 +8215,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cvt_f32_f16_e64 v12, |v10|
; VI-NEXT: v_cmp_ngt_f32_e32 vcc, v13, v12
; VI-NEXT: s_cbranch_vccz .LBB10_26
-; VI-NEXT: ; %bb.25: ; %frem.else86
+; VI-NEXT: ; %bb.25: ; %frem.else
; VI-NEXT: s_movk_i32 s2, 0x7fff
; VI-NEXT: v_bfi_b32 v11, s2, 0, v9
; VI-NEXT: v_cmp_eq_f32_e32 vcc, v13, v12
@@ -8224,7 +8224,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB10_32
; VI-NEXT: .LBB10_26:
; VI-NEXT: ; implicit-def: $vgpr11
-; VI-NEXT: .LBB10_27: ; %frem.compute85
+; VI-NEXT: .LBB10_27: ; %frem.compute
; VI-NEXT: v_frexp_exp_i32_f32_e32 v16, v13
; VI-NEXT: v_frexp_mant_f32_e32 v11, v13
; VI-NEXT: v_frexp_mant_f32_e32 v13, v12
@@ -8249,10 +8249,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 12, v13
; VI-NEXT: v_div_fixup_f32 v15, v15, v12, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB10_31
-; VI-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; VI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; VI-NEXT: v_sub_u32_e32 v13, vcc, v16, v17
; VI-NEXT: v_add_u32_e32 v13, vcc, 11, v13
-; VI-NEXT: .LBB10_29: ; %frem.loop_body93
+; VI-NEXT: .LBB10_29: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v16, v14
; VI-NEXT: v_mul_f32_e32 v14, v16, v15
@@ -8267,7 +8267,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB10_29
; VI-NEXT: ; %bb.30: ; %Flow
; VI-NEXT: v_mov_b32_e32 v14, v16
-; VI-NEXT: .LBB10_31: ; %frem.loop_exit94
+; VI-NEXT: .LBB10_31: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v13, vcc, -10, v13
; VI-NEXT: v_ldexp_f32 v13, v14, v13
; VI-NEXT: v_mul_f32_e32 v14, v13, v15
@@ -8320,7 +8320,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_e64 v5, |v0|
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v6, v5
; GFX9-NEXT: s_cbranch_vccz .LBB10_2
-; GFX9-NEXT: ; %bb.1: ; %frem.else
+; GFX9-NEXT: ; %bb.1: ; %frem.else86
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v4, s2, 0, v2
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v6, v5
@@ -8329,7 +8329,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB10_8
; GFX9-NEXT: .LBB10_2:
; GFX9-NEXT: ; implicit-def: $vgpr4
-; GFX9-NEXT: .LBB10_3: ; %frem.compute
+; GFX9-NEXT: .LBB10_3: ; %frem.compute85
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v9, v6
; GFX9-NEXT: v_frexp_mant_f32_e32 v4, v6
; GFX9-NEXT: v_frexp_mant_f32_e32 v6, v5
@@ -8354,10 +8354,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v6
; GFX9-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX9-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX9-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX9-NEXT: v_sub_u32_e32 v6, v9, v10
; GFX9-NEXT: v_add_u32_e32 v6, 11, v6
-; GFX9-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX9-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v9, v7
; GFX9-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -8372,7 +8372,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB10_5
; GFX9-NEXT: ; %bb.6: ; %Flow133
; GFX9-NEXT: v_mov_b32_e32 v7, v9
-; GFX9-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX9-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX9-NEXT: v_add_u32_e32 v6, -10, v6
; GFX9-NEXT: v_ldexp_f32 v6, v7, v6
; GFX9-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -8391,7 +8391,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_sdwa v7, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v8, v7
; GFX9-NEXT: s_cbranch_vccz .LBB10_10
-; GFX9-NEXT: ; %bb.9: ; %frem.else20
+; GFX9-NEXT: ; %bb.9: ; %frem.else53
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v6, s2, 0, v5
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v8, v7
@@ -8400,7 +8400,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB10_16
; GFX9-NEXT: .LBB10_10:
; GFX9-NEXT: ; implicit-def: $vgpr6
-; GFX9-NEXT: .LBB10_11: ; %frem.compute19
+; GFX9-NEXT: .LBB10_11: ; %frem.compute52
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v11, v8
; GFX9-NEXT: v_frexp_mant_f32_e32 v6, v8
; GFX9-NEXT: v_frexp_mant_f32_e32 v8, v7
@@ -8425,10 +8425,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v8
; GFX9-NEXT: v_div_fixup_f32 v10, v10, v7, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX9-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX9-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX9-NEXT: v_sub_u32_e32 v8, v11, v12
; GFX9-NEXT: v_add_u32_e32 v8, 11, v8
-; GFX9-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX9-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v11, v9
; GFX9-NEXT: v_mul_f32_e32 v9, v11, v10
@@ -8443,7 +8443,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB10_13
; GFX9-NEXT: ; %bb.14: ; %Flow129
; GFX9-NEXT: v_mov_b32_e32 v9, v11
-; GFX9-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX9-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX9-NEXT: v_add_u32_e32 v8, -10, v8
; GFX9-NEXT: v_ldexp_f32 v8, v9, v8
; GFX9-NEXT: v_mul_f32_e32 v9, v8, v10
@@ -8461,7 +8461,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_e64 v8, |v1|
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v9, v8
; GFX9-NEXT: s_cbranch_vccz .LBB10_18
-; GFX9-NEXT: ; %bb.17: ; %frem.else53
+; GFX9-NEXT: ; %bb.17: ; %frem.else20
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v7, s2, 0, v3
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v9, v8
@@ -8470,7 +8470,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB10_24
; GFX9-NEXT: .LBB10_18:
; GFX9-NEXT: ; implicit-def: $vgpr7
-; GFX9-NEXT: .LBB10_19: ; %frem.compute52
+; GFX9-NEXT: .LBB10_19: ; %frem.compute19
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v12, v9
; GFX9-NEXT: v_frexp_mant_f32_e32 v7, v9
; GFX9-NEXT: v_frexp_mant_f32_e32 v9, v8
@@ -8495,10 +8495,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v9
; GFX9-NEXT: v_div_fixup_f32 v11, v11, v8, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX9-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX9-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX9-NEXT: v_sub_u32_e32 v9, v12, v13
; GFX9-NEXT: v_add_u32_e32 v9, 11, v9
-; GFX9-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX9-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v12, v10
; GFX9-NEXT: v_mul_f32_e32 v10, v12, v11
@@ -8513,7 +8513,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB10_21
; GFX9-NEXT: ; %bb.22: ; %Flow125
; GFX9-NEXT: v_mov_b32_e32 v10, v12
-; GFX9-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX9-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX9-NEXT: v_add_u32_e32 v9, -10, v9
; GFX9-NEXT: v_ldexp_f32 v9, v10, v9
; GFX9-NEXT: v_mul_f32_e32 v10, v9, v11
@@ -8532,7 +8532,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cvt_f32_f16_sdwa v10, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX9-NEXT: v_cmp_ngt_f32_e32 vcc, v11, v10
; GFX9-NEXT: s_cbranch_vccz .LBB10_26
-; GFX9-NEXT: ; %bb.25: ; %frem.else86
+; GFX9-NEXT: ; %bb.25: ; %frem.else
; GFX9-NEXT: s_movk_i32 s2, 0x7fff
; GFX9-NEXT: v_bfi_b32 v9, s2, 0, v8
; GFX9-NEXT: v_cmp_eq_f32_e32 vcc, v11, v10
@@ -8541,7 +8541,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB10_32
; GFX9-NEXT: .LBB10_26:
; GFX9-NEXT: ; implicit-def: $vgpr9
-; GFX9-NEXT: .LBB10_27: ; %frem.compute85
+; GFX9-NEXT: .LBB10_27: ; %frem.compute
; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v14, v11
; GFX9-NEXT: v_frexp_mant_f32_e32 v9, v11
; GFX9-NEXT: v_frexp_mant_f32_e32 v11, v10
@@ -8566,10 +8566,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 12, v11
; GFX9-NEXT: v_div_fixup_f32 v13, v13, v10, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX9-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX9-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX9-NEXT: v_sub_u32_e32 v11, v14, v15
; GFX9-NEXT: v_add_u32_e32 v11, 11, v11
-; GFX9-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX9-NEXT: .LBB10_29: ; %frem.loop_body
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v14, v12
; GFX9-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -8584,7 +8584,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB10_29
; GFX9-NEXT: ; %bb.30: ; %Flow
; GFX9-NEXT: v_mov_b32_e32 v12, v14
-; GFX9-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX9-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX9-NEXT: v_add_u32_e32 v11, -10, v11
; GFX9-NEXT: v_ldexp_f32 v11, v12, v11
; GFX9-NEXT: v_mul_f32_e32 v12, v11, v13
@@ -8640,7 +8640,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v5, |v0|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v6, v5
; GFX10-NEXT: s_cbranch_vccz .LBB10_2
-; GFX10-NEXT: ; %bb.1: ; %frem.else
+; GFX10-NEXT: ; %bb.1: ; %frem.else86
; GFX10-NEXT: v_bfi_b32 v4, 0x7fff, 0, v2
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v6, v5
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v4, vcc_lo
@@ -8648,7 +8648,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB10_8
; GFX10-NEXT: .LBB10_2:
; GFX10-NEXT: ; implicit-def: $vgpr4
-; GFX10-NEXT: .LBB10_3: ; %frem.compute
+; GFX10-NEXT: .LBB10_3: ; %frem.compute85
; GFX10-NEXT: v_frexp_mant_f32_e32 v4, v6
; GFX10-NEXT: v_frexp_mant_f32_e32 v8, v5
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
@@ -8675,10 +8675,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v8
; GFX10-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX10-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX10-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX10-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v9, v6
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -8694,7 +8694,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.6: ; %Flow133
; GFX10-NEXT: v_mov_b32_e32 v8, s2
; GFX10-NEXT: v_mov_b32_e32 v6, v9
-; GFX10-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX10-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX10-NEXT: v_add_nc_u32_e32 v8, -10, v8
; GFX10-NEXT: v_ldexp_f32 v6, v6, v8
; GFX10-NEXT: v_mul_f32_e32 v7, v6, v7
@@ -8712,7 +8712,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v8, |v5|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v8, v7
; GFX10-NEXT: s_cbranch_vccz .LBB10_10
-; GFX10-NEXT: ; %bb.9: ; %frem.else20
+; GFX10-NEXT: ; %bb.9: ; %frem.else53
; GFX10-NEXT: v_bfi_b32 v6, 0x7fff, 0, v5
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v8, v7
; GFX10-NEXT: v_cndmask_b32_e32 v6, v5, v6, vcc_lo
@@ -8720,7 +8720,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB10_16
; GFX10-NEXT: .LBB10_10:
; GFX10-NEXT: ; implicit-def: $vgpr6
-; GFX10-NEXT: .LBB10_11: ; %frem.compute19
+; GFX10-NEXT: .LBB10_11: ; %frem.compute52
; GFX10-NEXT: v_frexp_mant_f32_e32 v6, v8
; GFX10-NEXT: v_frexp_mant_f32_e32 v10, v7
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v9, v8
@@ -8747,10 +8747,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v10
; GFX10-NEXT: v_div_fixup_f32 v9, v9, v7, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX10-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX10-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX10-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v11, v8
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -8766,7 +8766,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.14: ; %Flow129
; GFX10-NEXT: v_mov_b32_e32 v10, s2
; GFX10-NEXT: v_mov_b32_e32 v8, v11
-; GFX10-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX10-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX10-NEXT: v_add_nc_u32_e32 v10, -10, v10
; GFX10-NEXT: v_ldexp_f32 v8, v8, v10
; GFX10-NEXT: v_mul_f32_e32 v9, v8, v9
@@ -8783,7 +8783,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v8, |v1|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v9, v8
; GFX10-NEXT: s_cbranch_vccz .LBB10_18
-; GFX10-NEXT: ; %bb.17: ; %frem.else53
+; GFX10-NEXT: ; %bb.17: ; %frem.else20
; GFX10-NEXT: v_bfi_b32 v7, 0x7fff, 0, v3
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v9, v8
; GFX10-NEXT: v_cndmask_b32_e32 v7, v3, v7, vcc_lo
@@ -8791,7 +8791,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB10_24
; GFX10-NEXT: .LBB10_18:
; GFX10-NEXT: ; implicit-def: $vgpr7
-; GFX10-NEXT: .LBB10_19: ; %frem.compute52
+; GFX10-NEXT: .LBB10_19: ; %frem.compute19
; GFX10-NEXT: v_frexp_mant_f32_e32 v7, v9
; GFX10-NEXT: v_frexp_mant_f32_e32 v11, v8
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v10, v9
@@ -8818,10 +8818,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v11
; GFX10-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX10-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX10-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX10-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v12, v9
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -8837,7 +8837,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.22: ; %Flow125
; GFX10-NEXT: v_mov_b32_e32 v11, s2
; GFX10-NEXT: v_mov_b32_e32 v9, v12
-; GFX10-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX10-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX10-NEXT: v_add_nc_u32_e32 v11, -10, v11
; GFX10-NEXT: v_ldexp_f32 v9, v9, v11
; GFX10-NEXT: v_mul_f32_e32 v10, v9, v10
@@ -8855,7 +8855,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cvt_f32_f16_e64 v11, |v8|
; GFX10-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v11, v10
; GFX10-NEXT: s_cbranch_vccz .LBB10_26
-; GFX10-NEXT: ; %bb.25: ; %frem.else86
+; GFX10-NEXT: ; %bb.25: ; %frem.else
; GFX10-NEXT: v_bfi_b32 v9, 0x7fff, 0, v8
; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, v11, v10
; GFX10-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc_lo
@@ -8863,7 +8863,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB10_32
; GFX10-NEXT: .LBB10_26:
; GFX10-NEXT: ; implicit-def: $vgpr9
-; GFX10-NEXT: .LBB10_27: ; %frem.compute85
+; GFX10-NEXT: .LBB10_27: ; %frem.compute
; GFX10-NEXT: v_frexp_mant_f32_e32 v9, v11
; GFX10-NEXT: v_frexp_mant_f32_e32 v13, v10
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v12, v11
@@ -8890,10 +8890,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v13
; GFX10-NEXT: v_div_fixup_f32 v12, v12, v10, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX10-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX10-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 11
-; GFX10-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX10-NEXT: .LBB10_29: ; %frem.loop_body
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v14, v11
; GFX10-NEXT: s_add_i32 s2, s2, -11
@@ -8909,7 +8909,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.30: ; %Flow
; GFX10-NEXT: v_mov_b32_e32 v13, s2
; GFX10-NEXT: v_mov_b32_e32 v11, v14
-; GFX10-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX10-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX10-NEXT: v_add_nc_u32_e32 v13, -10, v13
; GFX10-NEXT: v_ldexp_f32 v11, v11, v13
; GFX10-NEXT: v_mul_f32_e32 v12, v11, v12
@@ -8963,7 +8963,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v6, v5
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_2
-; GFX11-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %frem.else86
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v0.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v6, v5
@@ -8974,7 +8974,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB10_8
; GFX11-TRUE16-NEXT: .LBB10_2:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4
-; GFX11-TRUE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX11-TRUE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, v6
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, v5
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
@@ -9010,11 +9010,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX11-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, v6
@@ -9034,7 +9034,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.6: ; %Flow133
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, v9
-; GFX11-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX11-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, -10, v8
; GFX11-TRUE16-NEXT: v_ldexp_f32 v6, v6, v8
@@ -9061,7 +9061,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v9, v8
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_10
-; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX11-TRUE16-NEXT: ; %bb.9: ; %frem.else53
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v5.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v9, v8
@@ -9072,7 +9072,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB10_16
; GFX11-TRUE16-NEXT: .LBB10_10:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7
-; GFX11-TRUE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX11-TRUE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v7, v9
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, v8
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v10, v9
@@ -9108,11 +9108,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX11-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX11-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, v9
@@ -9132,7 +9132,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.14: ; %Flow129
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, v12
-; GFX11-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX11-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, -10, v11
; GFX11-TRUE16-NEXT: v_ldexp_f32 v9, v9, v11
@@ -9156,7 +9156,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v10, v9
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_18
-; GFX11-TRUE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX11-TRUE16-NEXT: ; %bb.17: ; %frem.else20
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v1.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v10, v9
@@ -9167,7 +9167,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB10_24
; GFX11-TRUE16-NEXT: .LBB10_18:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8
-; GFX11-TRUE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX11-TRUE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v8, v10
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v12, v9
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v11, v10
@@ -9203,11 +9203,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX11-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX11-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX11-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, v10
@@ -9227,7 +9227,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.22: ; %Flow125
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, v13
-; GFX11-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX11-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, -10, v12
; GFX11-TRUE16-NEXT: v_ldexp_f32 v10, v10, v12
@@ -9254,7 +9254,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v13, v12
; GFX11-TRUE16-NEXT: s_cbranch_vccz .LBB10_26
-; GFX11-TRUE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX11-TRUE16-NEXT: ; %bb.25: ; %frem.else
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, 0
; GFX11-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v13, v12
@@ -9265,7 +9265,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_branch .LBB10_32
; GFX11-TRUE16-NEXT: .LBB10_26:
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11
-; GFX11-TRUE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX11-TRUE16-NEXT: .LBB10_27: ; %frem.compute
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v11, v13
; GFX11-TRUE16-NEXT: v_frexp_mant_f32_e32 v15, v12
; GFX11-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v14, v13
@@ -9301,11 +9301,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX11-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX11-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX11-TRUE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX11-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX11-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, v13
@@ -9325,7 +9325,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-TRUE16-NEXT: ; %bb.30: ; %Flow
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v15, s2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, v16
-; GFX11-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX11-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, -10, v15
; GFX11-TRUE16-NEXT: v_ldexp_f32 v13, v13, v15
@@ -9388,7 +9388,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v6, v5
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB10_2
-; GFX11-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %frem.else86
; GFX11-FAKE16-NEXT: v_bfi_b32 v4, 0x7fff, 0, v0
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v6, v5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -9397,7 +9397,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB10_8
; GFX11-FAKE16-NEXT: .LBB10_2:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr4
-; GFX11-FAKE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX11-FAKE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v4, v6
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v8, v5
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v7, v6
@@ -9433,11 +9433,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX11-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX11-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v9, v6
@@ -9457,7 +9457,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.6: ; %Flow133
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v6, v9
-; GFX11-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX11-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, -10, v8
; GFX11-FAKE16-NEXT: v_ldexp_f32 v6, v6, v8
@@ -9483,7 +9483,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v9, v8
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB10_10
-; GFX11-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX11-FAKE16-NEXT: ; %bb.9: ; %frem.else53
; GFX11-FAKE16-NEXT: v_bfi_b32 v7, 0x7fff, 0, v5
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v9, v8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -9492,7 +9492,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB10_16
; GFX11-FAKE16-NEXT: .LBB10_10:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr7
-; GFX11-FAKE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX11-FAKE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v7, v9
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v11, v8
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v10, v9
@@ -9528,11 +9528,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX11-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX11-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX11-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, v9
@@ -9552,7 +9552,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.14: ; %Flow129
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v9, v12
-; GFX11-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX11-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, -10, v11
; GFX11-FAKE16-NEXT: v_ldexp_f32 v9, v9, v11
@@ -9575,7 +9575,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v10, v9
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB10_18
-; GFX11-FAKE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX11-FAKE16-NEXT: ; %bb.17: ; %frem.else20
; GFX11-FAKE16-NEXT: v_bfi_b32 v8, 0x7fff, 0, v1
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v10, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -9584,7 +9584,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB10_24
; GFX11-FAKE16-NEXT: .LBB10_18:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr8
-; GFX11-FAKE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX11-FAKE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v8, v10
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v12, v9
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v11, v10
@@ -9620,11 +9620,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX11-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX11-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX11-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, v10
@@ -9644,7 +9644,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.22: ; %Flow125
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, v13
-; GFX11-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX11-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, -10, v12
; GFX11-FAKE16-NEXT: v_ldexp_f32 v10, v10, v12
@@ -9670,7 +9670,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f32_e32 vcc_lo, v13, v12
; GFX11-FAKE16-NEXT: s_cbranch_vccz .LBB10_26
-; GFX11-FAKE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX11-FAKE16-NEXT: ; %bb.25: ; %frem.else
; GFX11-FAKE16-NEXT: v_bfi_b32 v11, 0x7fff, 0, v9
; GFX11-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, v13, v12
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -9679,7 +9679,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_branch .LBB10_32
; GFX11-FAKE16-NEXT: .LBB10_26:
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr11
-; GFX11-FAKE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX11-FAKE16-NEXT: .LBB10_27: ; %frem.compute
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v11, v13
; GFX11-FAKE16-NEXT: v_frexp_mant_f32_e32 v15, v12
; GFX11-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v14, v13
@@ -9715,11 +9715,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX11-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX11-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX11-FAKE16-NEXT: s_sub_i32 s2, s2, s3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 11
-; GFX11-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX11-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v16, v13
@@ -9739,7 +9739,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-FAKE16-NEXT: ; %bb.30: ; %Flow
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v13, v16
-; GFX11-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX11-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, -10, v15
; GFX11-FAKE16-NEXT: v_ldexp_f32 v13, v13, v15
@@ -9804,7 +9804,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s8, s6
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_2
-; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-TRUE16-NEXT: ; %bb.1: ; %frem.else86
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v0.l, s5
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s8, s6
@@ -9816,7 +9816,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB10_8
; GFX1150-TRUE16-NEXT: .LBB10_2:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-TRUE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX1150-TRUE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s6
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s8
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -9851,11 +9851,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s6, s8, s6
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s6, s6, 11
-; GFX1150-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX1150-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v5, v2
@@ -9877,7 +9877,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.6: ; %Flow133
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, s6
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX1150-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -9907,7 +9907,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1150-TRUE16-NEXT: ; %bb.9: ; %frem.else53
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v1.l, s8
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
@@ -9919,7 +9919,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB10_16
; GFX1150-TRUE16-NEXT: .LBB10_10:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-TRUE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX1150-TRUE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s9
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s10
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -9954,11 +9954,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s9, s10, s9
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s9, s9, 11
-; GFX1150-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX1150-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, v3
@@ -9980,7 +9980,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.14: ; %Flow129
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v5, s9
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX1150-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -10008,7 +10008,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1150-TRUE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX1150-TRUE16-NEXT: ; %bb.17: ; %frem.else20
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v2.l, s7
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
@@ -10020,7 +10020,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB10_24
; GFX1150-TRUE16-NEXT: .LBB10_18:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1150-TRUE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX1150-TRUE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s9
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s10
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s10
@@ -10055,11 +10055,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1150-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s9, s10, s9
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s9, s9, 11
-; GFX1150-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX1150-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, v4
@@ -10081,7 +10081,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.22: ; %Flow125
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v6, s9
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX1150-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX1150-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -10111,7 +10111,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-TRUE16-NEXT: s_cmp_ngt_f32 s12, s11
; GFX1150-TRUE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1150-TRUE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX1150-TRUE16-NEXT: ; %bb.25: ; %frem.else
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v3.l, s10
; GFX1150-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0
; GFX1150-TRUE16-NEXT: s_cmp_eq_f32 s12, s11
@@ -10123,7 +10123,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: s_branch .LBB10_32
; GFX1150-TRUE16-NEXT: .LBB10_26:
; GFX1150-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1150-TRUE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX1150-TRUE16-NEXT: .LBB10_27: ; %frem.compute
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, s11
; GFX1150-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s12
; GFX1150-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s12
@@ -10158,11 +10158,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v7
; GFX1150-TRUE16-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1150-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1150-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX1150-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1150-TRUE16-NEXT: s_sub_i32 s11, s12, s11
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: s_add_i32 s11, s11, 11
-; GFX1150-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX1150-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX1150-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v8, v5
@@ -10184,7 +10184,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-TRUE16-NEXT: ; %bb.30: ; %Flow
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v7, s11
; GFX1150-TRUE16-NEXT: v_mov_b32_e32 v5, v8
-; GFX1150-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX1150-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX1150-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-TRUE16-NEXT: v_add_nc_u32_e32 v7, -10, v7
; GFX1150-TRUE16-NEXT: v_ldexp_f32 v5, v5, v7
@@ -10265,7 +10265,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s8, s6
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB10_2
-; GFX1150-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-FAKE16-NEXT: ; %bb.1: ; %frem.else86
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s8, s6
; GFX1150-FAKE16-NEXT: v_bfi_b32 v0, 0x7fff, 0, s5
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -10275,7 +10275,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB10_8
; GFX1150-FAKE16-NEXT: .LBB10_2:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr0
-; GFX1150-FAKE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX1150-FAKE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s6
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v0, s8
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -10310,11 +10310,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX1150-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s6, s8, s6
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s6, s6, 11
-; GFX1150-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX1150-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v5, v2
@@ -10336,7 +10336,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.6: ; %Flow133
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v4, s6
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX1150-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -10365,7 +10365,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1150-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1150-FAKE16-NEXT: ; %bb.9: ; %frem.else53
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s10, s9
; GFX1150-FAKE16-NEXT: v_bfi_b32 v1, 0x7fff, 0, s8
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -10375,7 +10375,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB10_16
; GFX1150-FAKE16-NEXT: .LBB10_10:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr1
-; GFX1150-FAKE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX1150-FAKE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s9
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s10
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -10410,11 +10410,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1150-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s9, s10, s9
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s9, s9, 11
-; GFX1150-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX1150-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v6, v3
@@ -10436,7 +10436,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.14: ; %Flow129
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v5, s9
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX1150-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -10463,7 +10463,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1150-FAKE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX1150-FAKE16-NEXT: ; %bb.17: ; %frem.else20
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s10, s9
; GFX1150-FAKE16-NEXT: v_bfi_b32 v2, 0x7fff, 0, s7
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -10473,7 +10473,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB10_24
; GFX1150-FAKE16-NEXT: .LBB10_18:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr2
-; GFX1150-FAKE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX1150-FAKE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, s9
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s10
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s10
@@ -10508,11 +10508,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1150-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s9, s10, s9
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s9, s9, 11
-; GFX1150-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX1150-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v7, v4
@@ -10534,7 +10534,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.22: ; %Flow125
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v6, s9
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX1150-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX1150-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -10563,7 +10563,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1150-FAKE16-NEXT: s_cmp_ngt_f32 s12, s11
; GFX1150-FAKE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1150-FAKE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX1150-FAKE16-NEXT: ; %bb.25: ; %frem.else
; GFX1150-FAKE16-NEXT: s_cmp_eq_f32 s12, s11
; GFX1150-FAKE16-NEXT: v_bfi_b32 v3, 0x7fff, 0, s10
; GFX1150-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -10573,7 +10573,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: s_branch .LBB10_32
; GFX1150-FAKE16-NEXT: .LBB10_26:
; GFX1150-FAKE16-NEXT: ; implicit-def: $vgpr3
-; GFX1150-FAKE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX1150-FAKE16-NEXT: .LBB10_27: ; %frem.compute
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v4, s11
; GFX1150-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, s12
; GFX1150-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s12
@@ -10608,11 +10608,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v7
; GFX1150-FAKE16-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1150-FAKE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1150-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX1150-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1150-FAKE16-NEXT: s_sub_i32 s11, s12, s11
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: s_add_i32 s11, s11, 11
-; GFX1150-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX1150-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX1150-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v8, v5
@@ -10634,7 +10634,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-FAKE16-NEXT: ; %bb.30: ; %Flow
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v7, s11
; GFX1150-FAKE16-NEXT: v_mov_b32_e32 v5, v8
-; GFX1150-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX1150-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX1150-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-FAKE16-NEXT: v_add_nc_u32_e32 v7, -10, v7
; GFX1150-FAKE16-NEXT: v_ldexp_f32 v5, v5, v7
@@ -10712,7 +10712,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s8, s6
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_2
-; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-TRUE16-NEXT: ; %bb.1: ; %frem.else86
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v0.l, s5
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s8, s6
@@ -10724,7 +10724,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB10_8
; GFX1200-TRUE16-NEXT: .LBB10_2:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-TRUE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX1200-TRUE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s6
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v0, s8
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -10759,11 +10759,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s6, s8, s6
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s6, s6, 11
-; GFX1200-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX1200-TRUE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v5, v2
@@ -10787,7 +10787,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.6: ; %Flow133
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, s6
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX1200-TRUE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -10821,7 +10821,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1200-TRUE16-NEXT: ; %bb.9: ; %frem.else53
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v1.l, s8
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
@@ -10833,7 +10833,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB10_16
; GFX1200-TRUE16-NEXT: .LBB10_10:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-TRUE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX1200-TRUE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s9
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v1, s10
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -10869,11 +10869,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s9, s10, s9
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s9, s9, 11
-; GFX1200-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX1200-TRUE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, v3
@@ -10897,7 +10897,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.14: ; %Flow129
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v5, s9
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX1200-TRUE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -10928,7 +10928,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1200-TRUE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX1200-TRUE16-NEXT: ; %bb.17: ; %frem.else20
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v2.l, s7
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s10, s9
@@ -10941,7 +10941,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB10_24
; GFX1200-TRUE16-NEXT: .LBB10_18:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr2
-; GFX1200-TRUE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX1200-TRUE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s9
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v2, s10
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s10
@@ -10977,11 +10977,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1200-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s9, s10, s9
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s9, s9, 11
-; GFX1200-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX1200-TRUE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, v4
@@ -11005,7 +11005,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.22: ; %Flow125
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v6, s9
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX1200-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX1200-TRUE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -11039,7 +11039,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-TRUE16-NEXT: s_cmp_ngt_f32 s12, s11
; GFX1200-TRUE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1200-TRUE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX1200-TRUE16-NEXT: ; %bb.25: ; %frem.else
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v3.l, s10
; GFX1200-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0
; GFX1200-TRUE16-NEXT: s_cmp_eq_f32 s12, s11
@@ -11051,7 +11051,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: s_branch .LBB10_32
; GFX1200-TRUE16-NEXT: .LBB10_26:
; GFX1200-TRUE16-NEXT: ; implicit-def: $vgpr3
-; GFX1200-TRUE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX1200-TRUE16-NEXT: .LBB10_27: ; %frem.compute
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v4, s11
; GFX1200-TRUE16-NEXT: v_frexp_mant_f32_e32 v3, s12
; GFX1200-TRUE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s12
@@ -11087,11 +11087,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v7
; GFX1200-TRUE16-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1200-TRUE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1200-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX1200-TRUE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1200-TRUE16-NEXT: s_sub_co_i32 s11, s12, s11
; GFX1200-TRUE16-NEXT: s_wait_alu 0xfffe
; GFX1200-TRUE16-NEXT: s_add_co_i32 s11, s11, 11
-; GFX1200-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX1200-TRUE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX1200-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v8, v5
@@ -11115,7 +11115,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-TRUE16-NEXT: ; %bb.30: ; %Flow
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v7, s11
; GFX1200-TRUE16-NEXT: v_mov_b32_e32 v5, v8
-; GFX1200-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX1200-TRUE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-TRUE16-NEXT: v_add_nc_u32_e32 v7, -10, v7
; GFX1200-TRUE16-NEXT: v_ldexp_f32 v5, v5, v7
@@ -11203,7 +11203,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s8, s6
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB10_2
-; GFX1200-FAKE16-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-FAKE16-NEXT: ; %bb.1: ; %frem.else86
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s8, s6
; GFX1200-FAKE16-NEXT: v_bfi_b32 v0, 0x7fff, 0, s5
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -11213,7 +11213,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB10_8
; GFX1200-FAKE16-NEXT: .LBB10_2:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr0
-; GFX1200-FAKE16-NEXT: .LBB10_3: ; %frem.compute
+; GFX1200-FAKE16-NEXT: .LBB10_3: ; %frem.compute85
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s6
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v0, s8
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -11249,11 +11249,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v4
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB10_7
-; GFX1200-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.4: ; %frem.loop_body93.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s6, s8, s6
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s6, s6, 11
-; GFX1200-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body
+; GFX1200-FAKE16-NEXT: .LBB10_5: ; %frem.loop_body93
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v5, v2
@@ -11277,7 +11277,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.6: ; %Flow133
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v4, s6
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit
+; GFX1200-FAKE16-NEXT: .LBB10_7: ; %frem.loop_exit94
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v4, -10, v4
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v2, v2, v4
@@ -11310,7 +11310,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB10_10
-; GFX1200-FAKE16-NEXT: ; %bb.9: ; %frem.else20
+; GFX1200-FAKE16-NEXT: ; %bb.9: ; %frem.else53
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s10, s9
; GFX1200-FAKE16-NEXT: v_bfi_b32 v1, 0x7fff, 0, s8
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -11321,7 +11321,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB10_16
; GFX1200-FAKE16-NEXT: .LBB10_10:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr1
-; GFX1200-FAKE16-NEXT: .LBB10_11: ; %frem.compute19
+; GFX1200-FAKE16-NEXT: .LBB10_11: ; %frem.compute52
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s9
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v1, s10
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -11357,11 +11357,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v5
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB10_15
-; GFX1200-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body27.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.12: ; %frem.loop_body60.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s9, s10, s9
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s9, s9, 11
-; GFX1200-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body27
+; GFX1200-FAKE16-NEXT: .LBB10_13: ; %frem.loop_body60
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v6, v3
@@ -11385,7 +11385,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.14: ; %Flow129
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v5, s9
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit28
+; GFX1200-FAKE16-NEXT: .LBB10_15: ; %frem.loop_exit61
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v5, -10, v5
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v3, v3, v5
@@ -11415,7 +11415,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s10, s9
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB10_18
-; GFX1200-FAKE16-NEXT: ; %bb.17: ; %frem.else53
+; GFX1200-FAKE16-NEXT: ; %bb.17: ; %frem.else20
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s10, s9
; GFX1200-FAKE16-NEXT: v_bfi_b32 v2, 0x7fff, 0, s7
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -11426,7 +11426,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB10_24
; GFX1200-FAKE16-NEXT: .LBB10_18:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr2
-; GFX1200-FAKE16-NEXT: .LBB10_19: ; %frem.compute52
+; GFX1200-FAKE16-NEXT: .LBB10_19: ; %frem.compute19
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, s9
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v2, s10
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v5, s10
@@ -11462,11 +11462,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v6
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB10_23
-; GFX1200-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body60.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.20: ; %frem.loop_body27.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s9, s10, s9
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s9, s9, 11
-; GFX1200-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body60
+; GFX1200-FAKE16-NEXT: .LBB10_21: ; %frem.loop_body27
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v7, v4
@@ -11490,7 +11490,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.22: ; %Flow125
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v6, s9
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v4, v7
-; GFX1200-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit61
+; GFX1200-FAKE16-NEXT: .LBB10_23: ; %frem.loop_exit28
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v6, -10, v6
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v4, v4, v6
@@ -11523,7 +11523,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX1200-FAKE16-NEXT: s_cmp_ngt_f32 s12, s11
; GFX1200-FAKE16-NEXT: s_cbranch_scc0 .LBB10_26
-; GFX1200-FAKE16-NEXT: ; %bb.25: ; %frem.else86
+; GFX1200-FAKE16-NEXT: ; %bb.25: ; %frem.else
; GFX1200-FAKE16-NEXT: s_cmp_eq_f32 s12, s11
; GFX1200-FAKE16-NEXT: v_bfi_b32 v3, 0x7fff, 0, s10
; GFX1200-FAKE16-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -11534,7 +11534,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: s_branch .LBB10_32
; GFX1200-FAKE16-NEXT: .LBB10_26:
; GFX1200-FAKE16-NEXT: ; implicit-def: $vgpr3
-; GFX1200-FAKE16-NEXT: .LBB10_27: ; %frem.compute85
+; GFX1200-FAKE16-NEXT: .LBB10_27: ; %frem.compute
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v4, s11
; GFX1200-FAKE16-NEXT: v_frexp_mant_f32_e32 v3, s12
; GFX1200-FAKE16-NEXT: v_frexp_exp_i32_f32_e32 v6, s12
@@ -11570,11 +11570,11 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 12, v7
; GFX1200-FAKE16-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1200-FAKE16-NEXT: s_cbranch_vccnz .LBB10_31
-; GFX1200-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body93.preheader
+; GFX1200-FAKE16-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1200-FAKE16-NEXT: s_sub_co_i32 s11, s12, s11
; GFX1200-FAKE16-NEXT: s_wait_alu 0xfffe
; GFX1200-FAKE16-NEXT: s_add_co_i32 s11, s11, 11
-; GFX1200-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body93
+; GFX1200-FAKE16-NEXT: .LBB10_29: ; %frem.loop_body
; GFX1200-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v8, v5
@@ -11598,7 +11598,7 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-FAKE16-NEXT: ; %bb.30: ; %Flow
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v7, s11
; GFX1200-FAKE16-NEXT: v_mov_b32_e32 v5, v8
-; GFX1200-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit94
+; GFX1200-FAKE16-NEXT: .LBB10_31: ; %frem.loop_exit
; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-FAKE16-NEXT: v_add_nc_u32_e32 v7, -10, v7
; GFX1200-FAKE16-NEXT: v_ldexp_f32 v5, v5, v7
@@ -11686,7 +11686,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v2|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB11_2
-; SI-NEXT: ; %bb.1: ; %frem.else
+; SI-NEXT: ; %bb.1: ; %frem.else16
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v4, s2, 0, v0
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v2|
@@ -11697,7 +11697,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB11_2:
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB11_3: ; %frem.compute
+; SI-NEXT: .LBB11_3: ; %frem.compute15
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v0|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v4, v0
@@ -11733,10 +11733,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB11_7
-; SI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; SI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB11_5: ; %frem.loop_body
+; SI-NEXT: .LBB11_5: ; %frem.loop_body23
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v7, v5
; SI-NEXT: v_mul_f32_e32 v5, v7, v6
@@ -11751,7 +11751,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB11_5
; SI-NEXT: ; %bb.6: ; %Flow51
; SI-NEXT: v_mov_b32_e32 v5, v7
-; SI-NEXT: .LBB11_7: ; %frem.loop_exit
+; SI-NEXT: .LBB11_7: ; %frem.loop_exit24
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v5, v5, s3
; SI-NEXT: v_mul_f32_e32 v6, v5, v6
@@ -11767,7 +11767,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v3|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB11_10
-; SI-NEXT: ; %bb.9: ; %frem.else16
+; SI-NEXT: ; %bb.9: ; %frem.else
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v5, s2, 0, v1
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v3|
@@ -11778,7 +11778,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB11_10:
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB11_11: ; %frem.compute15
+; SI-NEXT: .LBB11_11: ; %frem.compute
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v1|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v5, v1
@@ -11814,10 +11814,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB11_15
-; SI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; SI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB11_13: ; %frem.loop_body23
+; SI-NEXT: .LBB11_13: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v8, v6
; SI-NEXT: v_mul_f32_e32 v6, v8, v7
@@ -11832,7 +11832,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB11_13
; SI-NEXT: ; %bb.14: ; %Flow
; SI-NEXT: v_mov_b32_e32 v6, v8
-; SI-NEXT: .LBB11_15: ; %frem.loop_exit24
+; SI-NEXT: .LBB11_15: ; %frem.loop_exit
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v6, v6, s3
; SI-NEXT: v_mul_f32_e32 v7, v6, v7
@@ -11877,7 +11877,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v2|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB11_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else16
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v4, s2, 0, v0
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v2|
@@ -11886,7 +11886,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB11_8
; CI-NEXT: .LBB11_2:
; CI-NEXT: ; implicit-def: $vgpr4
-; CI-NEXT: .LBB11_3: ; %frem.compute
+; CI-NEXT: .LBB11_3: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f32_e64 v5, |v2|
; CI-NEXT: v_ldexp_f32_e64 v5, v5, 1
; CI-NEXT: v_div_scale_f32 v11, s[2:3], v5, v5, 1.0
@@ -11911,10 +11911,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v6
; CI-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB11_7
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; CI-NEXT: v_sub_i32_e32 v6, vcc, v9, v10
; CI-NEXT: v_add_i32_e32 v6, vcc, 12, v6
-; CI-NEXT: .LBB11_5: ; %frem.loop_body
+; CI-NEXT: .LBB11_5: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v9, v7
; CI-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -11929,7 +11929,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB11_5
; CI-NEXT: ; %bb.6: ; %Flow51
; CI-NEXT: v_mov_b32_e32 v7, v9
-; CI-NEXT: .LBB11_7: ; %frem.loop_exit
+; CI-NEXT: .LBB11_7: ; %frem.loop_exit24
; CI-NEXT: v_add_i32_e32 v6, vcc, -11, v6
; CI-NEXT: v_ldexp_f32_e32 v6, v7, v6
; CI-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -11945,7 +11945,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v3|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB11_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v5, s2, 0, v1
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v3|
@@ -11954,7 +11954,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB11_16
; CI-NEXT: .LBB11_10:
; CI-NEXT: ; implicit-def: $vgpr5
-; CI-NEXT: .LBB11_11: ; %frem.compute15
+; CI-NEXT: .LBB11_11: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e64 v6, |v3|
; CI-NEXT: v_ldexp_f32_e64 v6, v6, 1
; CI-NEXT: v_div_scale_f32 v12, s[2:3], v6, v6, 1.0
@@ -11979,10 +11979,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v7
; CI-NEXT: v_div_fixup_f32 v9, v9, v6, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB11_15
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_sub_i32_e32 v7, vcc, v10, v11
; CI-NEXT: v_add_i32_e32 v7, vcc, 12, v7
-; CI-NEXT: .LBB11_13: ; %frem.loop_body23
+; CI-NEXT: .LBB11_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v10, v8
; CI-NEXT: v_mul_f32_e32 v8, v10, v9
@@ -11997,7 +11997,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB11_13
; CI-NEXT: ; %bb.14: ; %Flow
; CI-NEXT: v_mov_b32_e32 v8, v10
-; CI-NEXT: .LBB11_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB11_15: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v7, vcc, -11, v7
; CI-NEXT: v_ldexp_f32_e32 v7, v8, v7
; CI-NEXT: v_mul_f32_e32 v8, v7, v9
@@ -12042,7 +12042,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v2|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB11_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else16
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v4, s2, 0, v0
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v2|
@@ -12051,7 +12051,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB11_8
; VI-NEXT: .LBB11_2:
; VI-NEXT: ; implicit-def: $vgpr4
-; VI-NEXT: .LBB11_3: ; %frem.compute
+; VI-NEXT: .LBB11_3: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f32_e64 v5, |v2|
; VI-NEXT: v_ldexp_f32 v5, v5, 1
; VI-NEXT: v_div_scale_f32 v11, s[2:3], v5, v5, 1.0
@@ -12076,10 +12076,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v6
; VI-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB11_7
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; VI-NEXT: v_sub_u32_e32 v6, vcc, v9, v10
; VI-NEXT: v_add_u32_e32 v6, vcc, 12, v6
-; VI-NEXT: .LBB11_5: ; %frem.loop_body
+; VI-NEXT: .LBB11_5: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v9, v7
; VI-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -12094,7 +12094,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB11_5
; VI-NEXT: ; %bb.6: ; %Flow51
; VI-NEXT: v_mov_b32_e32 v7, v9
-; VI-NEXT: .LBB11_7: ; %frem.loop_exit
+; VI-NEXT: .LBB11_7: ; %frem.loop_exit24
; VI-NEXT: v_add_u32_e32 v6, vcc, -11, v6
; VI-NEXT: v_ldexp_f32 v6, v7, v6
; VI-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -12110,7 +12110,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v3|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB11_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v5, s2, 0, v1
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v3|
@@ -12119,7 +12119,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB11_16
; VI-NEXT: .LBB11_10:
; VI-NEXT: ; implicit-def: $vgpr5
-; VI-NEXT: .LBB11_11: ; %frem.compute15
+; VI-NEXT: .LBB11_11: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e64 v6, |v3|
; VI-NEXT: v_ldexp_f32 v6, v6, 1
; VI-NEXT: v_div_scale_f32 v12, s[2:3], v6, v6, 1.0
@@ -12144,10 +12144,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v7
; VI-NEXT: v_div_fixup_f32 v9, v9, v6, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB11_15
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_sub_u32_e32 v7, vcc, v10, v11
; VI-NEXT: v_add_u32_e32 v7, vcc, 12, v7
-; VI-NEXT: .LBB11_13: ; %frem.loop_body23
+; VI-NEXT: .LBB11_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v10, v8
; VI-NEXT: v_mul_f32_e32 v8, v10, v9
@@ -12162,7 +12162,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB11_13
; VI-NEXT: ; %bb.14: ; %Flow
; VI-NEXT: v_mov_b32_e32 v8, v10
-; VI-NEXT: .LBB11_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB11_15: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v7, vcc, -11, v7
; VI-NEXT: v_ldexp_f32 v7, v8, v7
; VI-NEXT: v_mul_f32_e32 v8, v7, v9
@@ -12202,7 +12202,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v2|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB11_2
-; GFX9-NEXT: ; %bb.1: ; %frem.else
+; GFX9-NEXT: ; %bb.1: ; %frem.else16
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v4, s2, 0, v0
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v2|
@@ -12211,7 +12211,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB11_8
; GFX9-NEXT: .LBB11_2:
; GFX9-NEXT: ; implicit-def: $vgpr4
-; GFX9-NEXT: .LBB11_3: ; %frem.compute
+; GFX9-NEXT: .LBB11_3: ; %frem.compute15
; GFX9-NEXT: v_frexp_mant_f32_e64 v5, |v2|
; GFX9-NEXT: v_ldexp_f32 v5, v5, 1
; GFX9-NEXT: v_div_scale_f32 v11, s[2:3], v5, v5, 1.0
@@ -12236,10 +12236,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v6
; GFX9-NEXT: v_div_fixup_f32 v8, v8, v5, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB11_7
-; GFX9-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX9-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX9-NEXT: v_sub_u32_e32 v6, v9, v10
; GFX9-NEXT: v_add_u32_e32 v6, 12, v6
-; GFX9-NEXT: .LBB11_5: ; %frem.loop_body
+; GFX9-NEXT: .LBB11_5: ; %frem.loop_body23
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v9, v7
; GFX9-NEXT: v_mul_f32_e32 v7, v9, v8
@@ -12254,7 +12254,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB11_5
; GFX9-NEXT: ; %bb.6: ; %Flow51
; GFX9-NEXT: v_mov_b32_e32 v7, v9
-; GFX9-NEXT: .LBB11_7: ; %frem.loop_exit
+; GFX9-NEXT: .LBB11_7: ; %frem.loop_exit24
; GFX9-NEXT: v_add_u32_e32 v6, -11, v6
; GFX9-NEXT: v_ldexp_f32 v6, v7, v6
; GFX9-NEXT: v_mul_f32_e32 v7, v6, v8
@@ -12270,7 +12270,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v3|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB11_10
-; GFX9-NEXT: ; %bb.9: ; %frem.else16
+; GFX9-NEXT: ; %bb.9: ; %frem.else
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v5, s2, 0, v1
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v3|
@@ -12279,7 +12279,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB11_16
; GFX9-NEXT: .LBB11_10:
; GFX9-NEXT: ; implicit-def: $vgpr5
-; GFX9-NEXT: .LBB11_11: ; %frem.compute15
+; GFX9-NEXT: .LBB11_11: ; %frem.compute
; GFX9-NEXT: v_frexp_mant_f32_e64 v6, |v3|
; GFX9-NEXT: v_ldexp_f32 v6, v6, 1
; GFX9-NEXT: v_div_scale_f32 v12, s[2:3], v6, v6, 1.0
@@ -12304,10 +12304,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v7
; GFX9-NEXT: v_div_fixup_f32 v9, v9, v6, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB11_15
-; GFX9-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX9-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX9-NEXT: v_sub_u32_e32 v7, v10, v11
; GFX9-NEXT: v_add_u32_e32 v7, 12, v7
-; GFX9-NEXT: .LBB11_13: ; %frem.loop_body23
+; GFX9-NEXT: .LBB11_13: ; %frem.loop_body
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v10, v8
; GFX9-NEXT: v_mul_f32_e32 v8, v10, v9
@@ -12322,7 +12322,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB11_13
; GFX9-NEXT: ; %bb.14: ; %Flow
; GFX9-NEXT: v_mov_b32_e32 v8, v10
-; GFX9-NEXT: .LBB11_15: ; %frem.loop_exit24
+; GFX9-NEXT: .LBB11_15: ; %frem.loop_exit
; GFX9-NEXT: v_add_u32_e32 v7, -11, v7
; GFX9-NEXT: v_ldexp_f32 v7, v8, v7
; GFX9-NEXT: v_mul_f32_e32 v8, v7, v9
@@ -12363,7 +12363,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v0|, |v2|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB11_2
-; GFX10-NEXT: ; %bb.1: ; %frem.else
+; GFX10-NEXT: ; %bb.1: ; %frem.else16
; GFX10-NEXT: v_bfi_b32 v4, 0x7fffffff, 0, v0
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v0|, |v2|
; GFX10-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc_lo
@@ -12371,7 +12371,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB11_8
; GFX10-NEXT: .LBB11_2:
; GFX10-NEXT: ; implicit-def: $vgpr4
-; GFX10-NEXT: .LBB11_3: ; %frem.compute
+; GFX10-NEXT: .LBB11_3: ; %frem.compute15
; GFX10-NEXT: v_frexp_mant_f32_e64 v5, |v2|
; GFX10-NEXT: v_frexp_mant_f32_e64 v4, |v0|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v7, v0
@@ -12398,10 +12398,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v8
; GFX10-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB11_7
-; GFX10-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX10-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB11_5: ; %frem.loop_body
+; GFX10-NEXT: .LBB11_5: ; %frem.loop_body23
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v9, v6
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -12417,7 +12417,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.6: ; %Flow51
; GFX10-NEXT: v_mov_b32_e32 v8, s2
; GFX10-NEXT: v_mov_b32_e32 v6, v9
-; GFX10-NEXT: .LBB11_7: ; %frem.loop_exit
+; GFX10-NEXT: .LBB11_7: ; %frem.loop_exit24
; GFX10-NEXT: v_add_nc_u32_e32 v8, -11, v8
; GFX10-NEXT: v_ldexp_f32 v6, v6, v8
; GFX10-NEXT: v_mul_f32_e32 v7, v6, v7
@@ -12432,7 +12432,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v1|, |v3|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB11_10
-; GFX10-NEXT: ; %bb.9: ; %frem.else16
+; GFX10-NEXT: ; %bb.9: ; %frem.else
; GFX10-NEXT: v_bfi_b32 v5, 0x7fffffff, 0, v1
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v1|, |v3|
; GFX10-NEXT: v_cndmask_b32_e32 v5, v1, v5, vcc_lo
@@ -12440,7 +12440,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB11_16
; GFX10-NEXT: .LBB11_10:
; GFX10-NEXT: ; implicit-def: $vgpr5
-; GFX10-NEXT: .LBB11_11: ; %frem.compute15
+; GFX10-NEXT: .LBB11_11: ; %frem.compute
; GFX10-NEXT: v_frexp_mant_f32_e64 v6, |v3|
; GFX10-NEXT: v_frexp_mant_f32_e64 v5, |v1|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v8, v1
@@ -12467,10 +12467,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v9
; GFX10-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB11_15
-; GFX10-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX10-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB11_13: ; %frem.loop_body23
+; GFX10-NEXT: .LBB11_13: ; %frem.loop_body
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v10, v7
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -12486,7 +12486,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.14: ; %Flow
; GFX10-NEXT: v_mov_b32_e32 v9, s2
; GFX10-NEXT: v_mov_b32_e32 v7, v10
-; GFX10-NEXT: .LBB11_15: ; %frem.loop_exit24
+; GFX10-NEXT: .LBB11_15: ; %frem.loop_exit
; GFX10-NEXT: v_add_nc_u32_e32 v9, -11, v9
; GFX10-NEXT: v_ldexp_f32 v7, v7, v9
; GFX10-NEXT: v_mul_f32_e32 v8, v7, v8
@@ -12524,7 +12524,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v0|, |v2|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB11_2
-; GFX11-NEXT: ; %bb.1: ; %frem.else
+; GFX11-NEXT: ; %bb.1: ; %frem.else16
; GFX11-NEXT: v_bfi_b32 v4, 0x7fffffff, 0, v0
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v0|, |v2|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -12533,7 +12533,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB11_8
; GFX11-NEXT: .LBB11_2:
; GFX11-NEXT: ; implicit-def: $vgpr4
-; GFX11-NEXT: .LBB11_3: ; %frem.compute
+; GFX11-NEXT: .LBB11_3: ; %frem.compute15
; GFX11-NEXT: v_frexp_mant_f32_e64 v5, |v2|
; GFX11-NEXT: v_frexp_mant_f32_e64 v4, |v0|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v7, v0
@@ -12569,11 +12569,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v7, v7, v5, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB11_7
-; GFX11-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB11_5: ; %frem.loop_body
+; GFX11-NEXT: .LBB11_5: ; %frem.loop_body23
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v9, v6
@@ -12593,7 +12593,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.6: ; %Flow51
; GFX11-NEXT: v_mov_b32_e32 v8, s2
; GFX11-NEXT: v_mov_b32_e32 v6, v9
-; GFX11-NEXT: .LBB11_7: ; %frem.loop_exit
+; GFX11-NEXT: .LBB11_7: ; %frem.loop_exit24
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v8, -11, v8
; GFX11-NEXT: v_ldexp_f32 v6, v6, v8
@@ -12613,7 +12613,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v1|, |v3|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB11_10
-; GFX11-NEXT: ; %bb.9: ; %frem.else16
+; GFX11-NEXT: ; %bb.9: ; %frem.else
; GFX11-NEXT: v_bfi_b32 v5, 0x7fffffff, 0, v1
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v1|, |v3|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -12622,7 +12622,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB11_16
; GFX11-NEXT: .LBB11_10:
; GFX11-NEXT: ; implicit-def: $vgpr5
-; GFX11-NEXT: .LBB11_11: ; %frem.compute15
+; GFX11-NEXT: .LBB11_11: ; %frem.compute
; GFX11-NEXT: v_frexp_mant_f32_e64 v6, |v3|
; GFX11-NEXT: v_frexp_mant_f32_e64 v5, |v1|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v8, v1
@@ -12658,11 +12658,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v8, v8, v6, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB11_15
-; GFX11-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX11-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB11_13: ; %frem.loop_body23
+; GFX11-NEXT: .LBB11_13: ; %frem.loop_body
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v10, v7
@@ -12682,7 +12682,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.14: ; %Flow
; GFX11-NEXT: v_mov_b32_e32 v9, s2
; GFX11-NEXT: v_mov_b32_e32 v7, v10
-; GFX11-NEXT: .LBB11_15: ; %frem.loop_exit24
+; GFX11-NEXT: .LBB11_15: ; %frem.loop_exit
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v9, -11, v9
; GFX11-NEXT: v_ldexp_f32 v7, v7, v9
@@ -12730,7 +12730,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s3, s8
; GFX1150-NEXT: s_cbranch_scc0 .LBB11_2
-; GFX1150-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-NEXT: ; %bb.1: ; %frem.else16
; GFX1150-NEXT: s_cmp_eq_f32 s3, s8
; GFX1150-NEXT: v_bfi_b32 v0, 0x7fffffff, 0, s6
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -12740,7 +12740,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB11_8
; GFX1150-NEXT: .LBB11_2:
; GFX1150-NEXT: ; implicit-def: $vgpr0
-; GFX1150-NEXT: .LBB11_3: ; %frem.compute
+; GFX1150-NEXT: .LBB11_3: ; %frem.compute15
; GFX1150-NEXT: v_frexp_mant_f32_e64 v1, |s4|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v0, |s6|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -12775,11 +12775,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v4
; GFX1150-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB11_7
-; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX1150-NEXT: s_sub_i32 s7, s7, s8
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s7, s7, 12
-; GFX1150-NEXT: .LBB11_5: ; %frem.loop_body
+; GFX1150-NEXT: .LBB11_5: ; %frem.loop_body23
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v5, v2
@@ -12801,7 +12801,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.6: ; %Flow51
; GFX1150-NEXT: v_mov_b32_e32 v4, s7
; GFX1150-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-NEXT: .LBB11_7: ; %frem.loop_exit
+; GFX1150-NEXT: .LBB11_7: ; %frem.loop_exit24
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v4, -11, v4
; GFX1150-NEXT: v_ldexp_f32 v2, v2, v4
@@ -12824,7 +12824,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s6, s8
; GFX1150-NEXT: s_cbranch_scc0 .LBB11_10
-; GFX1150-NEXT: ; %bb.9: ; %frem.else16
+; GFX1150-NEXT: ; %bb.9: ; %frem.else
; GFX1150-NEXT: s_cmp_eq_f32 s6, s8
; GFX1150-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, s5
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -12834,7 +12834,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB11_16
; GFX1150-NEXT: .LBB11_10:
; GFX1150-NEXT: ; implicit-def: $vgpr1
-; GFX1150-NEXT: .LBB11_11: ; %frem.compute15
+; GFX1150-NEXT: .LBB11_11: ; %frem.compute
; GFX1150-NEXT: v_frexp_mant_f32_e64 v2, |s2|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v1, |s5|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v4, s5
@@ -12869,11 +12869,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v5
; GFX1150-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB11_15
-; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1150-NEXT: s_sub_i32 s7, s7, s8
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s7, s7, 12
-; GFX1150-NEXT: .LBB11_13: ; %frem.loop_body23
+; GFX1150-NEXT: .LBB11_13: ; %frem.loop_body
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v6, v3
@@ -12895,7 +12895,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.14: ; %Flow
; GFX1150-NEXT: v_mov_b32_e32 v5, s7
; GFX1150-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-NEXT: .LBB11_15: ; %frem.loop_exit24
+; GFX1150-NEXT: .LBB11_15: ; %frem.loop_exit
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v5, -11, v5
; GFX1150-NEXT: v_ldexp_f32 v3, v3, v5
@@ -12950,7 +12950,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1200-NEXT: s_cmp_ngt_f32 s3, s8
; GFX1200-NEXT: s_cbranch_scc0 .LBB11_2
-; GFX1200-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-NEXT: ; %bb.1: ; %frem.else16
; GFX1200-NEXT: s_cmp_eq_f32 s3, s8
; GFX1200-NEXT: v_bfi_b32 v0, 0x7fffffff, 0, s6
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -12960,7 +12960,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB11_8
; GFX1200-NEXT: .LBB11_2:
; GFX1200-NEXT: ; implicit-def: $vgpr0
-; GFX1200-NEXT: .LBB11_3: ; %frem.compute
+; GFX1200-NEXT: .LBB11_3: ; %frem.compute15
; GFX1200-NEXT: v_frexp_mant_f32_e64 v1, |s4|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v0, |s6|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v3, s6
@@ -12996,11 +12996,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v4
; GFX1200-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB11_7
-; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX1200-NEXT: s_sub_co_i32 s7, s7, s8
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s7, s7, 12
-; GFX1200-NEXT: .LBB11_5: ; %frem.loop_body
+; GFX1200-NEXT: .LBB11_5: ; %frem.loop_body23
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-NEXT: v_mov_b32_e32 v5, v2
@@ -13024,7 +13024,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.6: ; %Flow51
; GFX1200-NEXT: v_mov_b32_e32 v4, s7
; GFX1200-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-NEXT: .LBB11_7: ; %frem.loop_exit
+; GFX1200-NEXT: .LBB11_7: ; %frem.loop_exit24
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v4, -11, v4
; GFX1200-NEXT: v_ldexp_f32 v2, v2, v4
@@ -13048,7 +13048,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_cmp_ngt_f32 s6, s8
; GFX1200-NEXT: s_cbranch_scc0 .LBB11_10
-; GFX1200-NEXT: ; %bb.9: ; %frem.else16
+; GFX1200-NEXT: ; %bb.9: ; %frem.else
; GFX1200-NEXT: s_cmp_eq_f32 s6, s8
; GFX1200-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, s5
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -13059,7 +13059,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB11_16
; GFX1200-NEXT: .LBB11_10:
; GFX1200-NEXT: ; implicit-def: $vgpr1
-; GFX1200-NEXT: .LBB11_11: ; %frem.compute15
+; GFX1200-NEXT: .LBB11_11: ; %frem.compute
; GFX1200-NEXT: v_frexp_mant_f32_e64 v2, |s2|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v1, |s5|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v4, s5
@@ -13095,11 +13095,11 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v5
; GFX1200-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB11_15
-; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1200-NEXT: s_sub_co_i32 s7, s7, s8
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s7, s7, 12
-; GFX1200-NEXT: .LBB11_13: ; %frem.loop_body23
+; GFX1200-NEXT: .LBB11_13: ; %frem.loop_body
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-NEXT: v_mov_b32_e32 v6, v3
@@ -13123,7 +13123,7 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.14: ; %Flow
; GFX1200-NEXT: v_mov_b32_e32 v5, s7
; GFX1200-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-NEXT: .LBB11_15: ; %frem.loop_exit24
+; GFX1200-NEXT: .LBB11_15: ; %frem.loop_exit
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v5, -11, v5
; GFX1200-NEXT: v_ldexp_f32 v3, v3, v5
@@ -13187,7 +13187,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v4|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB12_2
-; SI-NEXT: ; %bb.1: ; %frem.else
+; SI-NEXT: ; %bb.1: ; %frem.else78
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v8, s2, 0, v0
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v4|
@@ -13198,7 +13198,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB12_2:
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB12_3: ; %frem.compute
+; SI-NEXT: .LBB12_3: ; %frem.compute77
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v0|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v8, v0
@@ -13234,10 +13234,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v10, v10, v8, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB12_7
-; SI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; SI-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB12_5: ; %frem.loop_body
+; SI-NEXT: .LBB12_5: ; %frem.loop_body85
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v11, v9
; SI-NEXT: v_mul_f32_e32 v9, v11, v10
@@ -13252,7 +13252,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB12_5
; SI-NEXT: ; %bb.6: ; %Flow125
; SI-NEXT: v_mov_b32_e32 v9, v11
-; SI-NEXT: .LBB12_7: ; %frem.loop_exit
+; SI-NEXT: .LBB12_7: ; %frem.loop_exit86
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v9, v9, s3
; SI-NEXT: v_mul_f32_e32 v10, v9, v10
@@ -13268,7 +13268,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v5|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB12_10
-; SI-NEXT: ; %bb.9: ; %frem.else16
+; SI-NEXT: ; %bb.9: ; %frem.else47
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v9, s2, 0, v1
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v5|
@@ -13279,7 +13279,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB12_10:
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB12_11: ; %frem.compute15
+; SI-NEXT: .LBB12_11: ; %frem.compute46
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v1|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v9, v1
@@ -13315,10 +13315,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB12_15
-; SI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; SI-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB12_13: ; %frem.loop_body23
+; SI-NEXT: .LBB12_13: ; %frem.loop_body54
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v12, v10
; SI-NEXT: v_mul_f32_e32 v10, v12, v11
@@ -13333,7 +13333,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB12_13
; SI-NEXT: ; %bb.14: ; %Flow121
; SI-NEXT: v_mov_b32_e32 v10, v12
-; SI-NEXT: .LBB12_15: ; %frem.loop_exit24
+; SI-NEXT: .LBB12_15: ; %frem.loop_exit55
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v10, v10, s3
; SI-NEXT: v_mul_f32_e32 v11, v10, v11
@@ -13349,7 +13349,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v2|, |v6|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB12_18
-; SI-NEXT: ; %bb.17: ; %frem.else47
+; SI-NEXT: ; %bb.17: ; %frem.else16
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v10, s2, 0, v2
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v2|, |v6|
@@ -13360,7 +13360,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB12_18:
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB12_19: ; %frem.compute46
+; SI-NEXT: .LBB12_19: ; %frem.compute15
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v2|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v10, v2
@@ -13396,10 +13396,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v12, v12, v10, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB12_23
-; SI-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; SI-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB12_21: ; %frem.loop_body54
+; SI-NEXT: .LBB12_21: ; %frem.loop_body23
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v13, v11
; SI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -13414,7 +13414,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB12_21
; SI-NEXT: ; %bb.22: ; %Flow117
; SI-NEXT: v_mov_b32_e32 v11, v13
-; SI-NEXT: .LBB12_23: ; %frem.loop_exit55
+; SI-NEXT: .LBB12_23: ; %frem.loop_exit24
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v11, v11, s3
; SI-NEXT: v_mul_f32_e32 v12, v11, v12
@@ -13430,7 +13430,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v3|, |v7|
; SI-NEXT: s_and_b64 vcc, exec, s[2:3]
; SI-NEXT: s_cbranch_vccz .LBB12_26
-; SI-NEXT: ; %bb.25: ; %frem.else78
+; SI-NEXT: ; %bb.25: ; %frem.else
; SI-NEXT: s_brev_b32 s2, -2
; SI-NEXT: v_bfi_b32 v11, s2, 0, v3
; SI-NEXT: v_cmp_eq_f32_e64 vcc, |v3|, |v7|
@@ -13441,7 +13441,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB12_26:
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB12_27: ; %frem.compute77
+; SI-NEXT: .LBB12_27: ; %frem.compute
; SI-NEXT: s_mov_b32 s6, 0x7f800000
; SI-NEXT: v_cmp_lt_f32_e64 s[2:3], |v3|, s6
; SI-NEXT: v_frexp_exp_i32_f32_e32 v11, v3
@@ -13477,10 +13477,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f32 v13, v13, v11, 1.0
; SI-NEXT: s_cmp_lt_i32 s3, 13
; SI-NEXT: s_cbranch_scc1 .LBB12_31
-; SI-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; SI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; SI-NEXT: s_sub_i32 s3, s4, s5
; SI-NEXT: s_add_i32 s3, s3, 12
-; SI-NEXT: .LBB12_29: ; %frem.loop_body85
+; SI-NEXT: .LBB12_29: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v14, v12
; SI-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -13495,7 +13495,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: s_cbranch_scc1 .LBB12_29
; SI-NEXT: ; %bb.30: ; %Flow
; SI-NEXT: v_mov_b32_e32 v12, v14
-; SI-NEXT: .LBB12_31: ; %frem.loop_exit86
+; SI-NEXT: .LBB12_31: ; %frem.loop_exit
; SI-NEXT: s_add_i32 s3, s3, -11
; SI-NEXT: v_ldexp_f32_e64 v12, v12, s3
; SI-NEXT: v_mul_f32_e32 v13, v12, v13
@@ -13548,7 +13548,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v4|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB12_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else78
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v8, s2, 0, v0
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v4|
@@ -13557,7 +13557,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_8
; CI-NEXT: .LBB12_2:
; CI-NEXT: ; implicit-def: $vgpr8
-; CI-NEXT: .LBB12_3: ; %frem.compute
+; CI-NEXT: .LBB12_3: ; %frem.compute77
; CI-NEXT: v_frexp_mant_f32_e64 v9, |v4|
; CI-NEXT: v_ldexp_f32_e64 v9, v9, 1
; CI-NEXT: v_div_scale_f32 v15, s[2:3], v9, v9, 1.0
@@ -13582,10 +13582,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v10
; CI-NEXT: v_div_fixup_f32 v12, v12, v9, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_7
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; CI-NEXT: v_sub_i32_e32 v10, vcc, v13, v14
; CI-NEXT: v_add_i32_e32 v10, vcc, 12, v10
-; CI-NEXT: .LBB12_5: ; %frem.loop_body
+; CI-NEXT: .LBB12_5: ; %frem.loop_body85
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v13, v11
; CI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -13600,7 +13600,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB12_5
; CI-NEXT: ; %bb.6: ; %Flow125
; CI-NEXT: v_mov_b32_e32 v11, v13
-; CI-NEXT: .LBB12_7: ; %frem.loop_exit
+; CI-NEXT: .LBB12_7: ; %frem.loop_exit86
; CI-NEXT: v_add_i32_e32 v10, vcc, -11, v10
; CI-NEXT: v_ldexp_f32_e32 v10, v11, v10
; CI-NEXT: v_mul_f32_e32 v11, v10, v12
@@ -13616,7 +13616,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v5|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB12_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else47
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v9, s2, 0, v1
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v5|
@@ -13625,7 +13625,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_16
; CI-NEXT: .LBB12_10:
; CI-NEXT: ; implicit-def: $vgpr9
-; CI-NEXT: .LBB12_11: ; %frem.compute15
+; CI-NEXT: .LBB12_11: ; %frem.compute46
; CI-NEXT: v_frexp_mant_f32_e64 v10, |v5|
; CI-NEXT: v_ldexp_f32_e64 v10, v10, 1
; CI-NEXT: v_div_scale_f32 v16, s[2:3], v10, v10, 1.0
@@ -13650,10 +13650,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v11
; CI-NEXT: v_div_fixup_f32 v13, v13, v10, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_15
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; CI-NEXT: v_sub_i32_e32 v11, vcc, v14, v15
; CI-NEXT: v_add_i32_e32 v11, vcc, 12, v11
-; CI-NEXT: .LBB12_13: ; %frem.loop_body23
+; CI-NEXT: .LBB12_13: ; %frem.loop_body54
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v14, v12
; CI-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -13668,7 +13668,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB12_13
; CI-NEXT: ; %bb.14: ; %Flow121
; CI-NEXT: v_mov_b32_e32 v12, v14
-; CI-NEXT: .LBB12_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB12_15: ; %frem.loop_exit55
; CI-NEXT: v_add_i32_e32 v11, vcc, -11, v11
; CI-NEXT: v_ldexp_f32_e32 v11, v12, v11
; CI-NEXT: v_mul_f32_e32 v12, v11, v13
@@ -13684,7 +13684,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v2|, |v6|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB12_18
-; CI-NEXT: ; %bb.17: ; %frem.else47
+; CI-NEXT: ; %bb.17: ; %frem.else16
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v10, s2, 0, v2
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v2|, |v6|
@@ -13693,7 +13693,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_24
; CI-NEXT: .LBB12_18:
; CI-NEXT: ; implicit-def: $vgpr10
-; CI-NEXT: .LBB12_19: ; %frem.compute46
+; CI-NEXT: .LBB12_19: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f32_e64 v11, |v6|
; CI-NEXT: v_ldexp_f32_e64 v11, v11, 1
; CI-NEXT: v_div_scale_f32 v17, s[2:3], v11, v11, 1.0
@@ -13718,10 +13718,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v12
; CI-NEXT: v_div_fixup_f32 v14, v14, v11, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_23
-; CI-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; CI-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; CI-NEXT: v_sub_i32_e32 v12, vcc, v15, v16
; CI-NEXT: v_add_i32_e32 v12, vcc, 12, v12
-; CI-NEXT: .LBB12_21: ; %frem.loop_body54
+; CI-NEXT: .LBB12_21: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v15, v13
; CI-NEXT: v_mul_f32_e32 v13, v15, v14
@@ -13736,7 +13736,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB12_21
; CI-NEXT: ; %bb.22: ; %Flow117
; CI-NEXT: v_mov_b32_e32 v13, v15
-; CI-NEXT: .LBB12_23: ; %frem.loop_exit55
+; CI-NEXT: .LBB12_23: ; %frem.loop_exit24
; CI-NEXT: v_add_i32_e32 v12, vcc, -11, v12
; CI-NEXT: v_ldexp_f32_e32 v12, v13, v12
; CI-NEXT: v_mul_f32_e32 v13, v12, v14
@@ -13752,7 +13752,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v3|, |v7|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB12_26
-; CI-NEXT: ; %bb.25: ; %frem.else78
+; CI-NEXT: ; %bb.25: ; %frem.else
; CI-NEXT: s_brev_b32 s2, -2
; CI-NEXT: v_bfi_b32 v11, s2, 0, v3
; CI-NEXT: v_cmp_eq_f32_e64 vcc, |v3|, |v7|
@@ -13761,7 +13761,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB12_32
; CI-NEXT: .LBB12_26:
; CI-NEXT: ; implicit-def: $vgpr11
-; CI-NEXT: .LBB12_27: ; %frem.compute77
+; CI-NEXT: .LBB12_27: ; %frem.compute
; CI-NEXT: v_frexp_mant_f32_e64 v12, |v7|
; CI-NEXT: v_ldexp_f32_e64 v12, v12, 1
; CI-NEXT: v_div_scale_f32 v18, s[2:3], v12, v12, 1.0
@@ -13786,10 +13786,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v13
; CI-NEXT: v_div_fixup_f32 v15, v15, v12, 1.0
; CI-NEXT: s_cbranch_vccnz .LBB12_31
-; CI-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; CI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; CI-NEXT: v_sub_i32_e32 v13, vcc, v16, v17
; CI-NEXT: v_add_i32_e32 v13, vcc, 12, v13
-; CI-NEXT: .LBB12_29: ; %frem.loop_body85
+; CI-NEXT: .LBB12_29: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v16, v14
; CI-NEXT: v_mul_f32_e32 v14, v16, v15
@@ -13804,7 +13804,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_cbranch_vccnz .LBB12_29
; CI-NEXT: ; %bb.30: ; %Flow
; CI-NEXT: v_mov_b32_e32 v14, v16
-; CI-NEXT: .LBB12_31: ; %frem.loop_exit86
+; CI-NEXT: .LBB12_31: ; %frem.loop_exit
; CI-NEXT: v_add_i32_e32 v13, vcc, -11, v13
; CI-NEXT: v_ldexp_f32_e32 v13, v14, v13
; CI-NEXT: v_mul_f32_e32 v14, v13, v15
@@ -13857,7 +13857,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v4|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB12_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else78
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v8, s2, 0, v0
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v4|
@@ -13866,7 +13866,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_8
; VI-NEXT: .LBB12_2:
; VI-NEXT: ; implicit-def: $vgpr8
-; VI-NEXT: .LBB12_3: ; %frem.compute
+; VI-NEXT: .LBB12_3: ; %frem.compute77
; VI-NEXT: v_frexp_mant_f32_e64 v9, |v4|
; VI-NEXT: v_ldexp_f32 v9, v9, 1
; VI-NEXT: v_div_scale_f32 v15, s[2:3], v9, v9, 1.0
@@ -13891,10 +13891,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v10
; VI-NEXT: v_div_fixup_f32 v12, v12, v9, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_7
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; VI-NEXT: v_sub_u32_e32 v10, vcc, v13, v14
; VI-NEXT: v_add_u32_e32 v10, vcc, 12, v10
-; VI-NEXT: .LBB12_5: ; %frem.loop_body
+; VI-NEXT: .LBB12_5: ; %frem.loop_body85
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v13, v11
; VI-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -13909,7 +13909,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB12_5
; VI-NEXT: ; %bb.6: ; %Flow125
; VI-NEXT: v_mov_b32_e32 v11, v13
-; VI-NEXT: .LBB12_7: ; %frem.loop_exit
+; VI-NEXT: .LBB12_7: ; %frem.loop_exit86
; VI-NEXT: v_add_u32_e32 v10, vcc, -11, v10
; VI-NEXT: v_ldexp_f32 v10, v11, v10
; VI-NEXT: v_mul_f32_e32 v11, v10, v12
@@ -13925,7 +13925,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v5|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB12_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else47
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v9, s2, 0, v1
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v5|
@@ -13934,7 +13934,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_16
; VI-NEXT: .LBB12_10:
; VI-NEXT: ; implicit-def: $vgpr9
-; VI-NEXT: .LBB12_11: ; %frem.compute15
+; VI-NEXT: .LBB12_11: ; %frem.compute46
; VI-NEXT: v_frexp_mant_f32_e64 v10, |v5|
; VI-NEXT: v_ldexp_f32 v10, v10, 1
; VI-NEXT: v_div_scale_f32 v16, s[2:3], v10, v10, 1.0
@@ -13959,10 +13959,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v11
; VI-NEXT: v_div_fixup_f32 v13, v13, v10, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_15
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; VI-NEXT: v_sub_u32_e32 v11, vcc, v14, v15
; VI-NEXT: v_add_u32_e32 v11, vcc, 12, v11
-; VI-NEXT: .LBB12_13: ; %frem.loop_body23
+; VI-NEXT: .LBB12_13: ; %frem.loop_body54
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v14, v12
; VI-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -13977,7 +13977,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB12_13
; VI-NEXT: ; %bb.14: ; %Flow121
; VI-NEXT: v_mov_b32_e32 v12, v14
-; VI-NEXT: .LBB12_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB12_15: ; %frem.loop_exit55
; VI-NEXT: v_add_u32_e32 v11, vcc, -11, v11
; VI-NEXT: v_ldexp_f32 v11, v12, v11
; VI-NEXT: v_mul_f32_e32 v12, v11, v13
@@ -13993,7 +13993,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v2|, |v6|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB12_18
-; VI-NEXT: ; %bb.17: ; %frem.else47
+; VI-NEXT: ; %bb.17: ; %frem.else16
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v10, s2, 0, v2
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v2|, |v6|
@@ -14002,7 +14002,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_24
; VI-NEXT: .LBB12_18:
; VI-NEXT: ; implicit-def: $vgpr10
-; VI-NEXT: .LBB12_19: ; %frem.compute46
+; VI-NEXT: .LBB12_19: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f32_e64 v11, |v6|
; VI-NEXT: v_ldexp_f32 v11, v11, 1
; VI-NEXT: v_div_scale_f32 v17, s[2:3], v11, v11, 1.0
@@ -14027,10 +14027,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v12
; VI-NEXT: v_div_fixup_f32 v14, v14, v11, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_23
-; VI-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; VI-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; VI-NEXT: v_sub_u32_e32 v12, vcc, v15, v16
; VI-NEXT: v_add_u32_e32 v12, vcc, 12, v12
-; VI-NEXT: .LBB12_21: ; %frem.loop_body54
+; VI-NEXT: .LBB12_21: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v15, v13
; VI-NEXT: v_mul_f32_e32 v13, v15, v14
@@ -14045,7 +14045,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB12_21
; VI-NEXT: ; %bb.22: ; %Flow117
; VI-NEXT: v_mov_b32_e32 v13, v15
-; VI-NEXT: .LBB12_23: ; %frem.loop_exit55
+; VI-NEXT: .LBB12_23: ; %frem.loop_exit24
; VI-NEXT: v_add_u32_e32 v12, vcc, -11, v12
; VI-NEXT: v_ldexp_f32 v12, v13, v12
; VI-NEXT: v_mul_f32_e32 v13, v12, v14
@@ -14061,7 +14061,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v3|, |v7|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB12_26
-; VI-NEXT: ; %bb.25: ; %frem.else78
+; VI-NEXT: ; %bb.25: ; %frem.else
; VI-NEXT: s_brev_b32 s2, -2
; VI-NEXT: v_bfi_b32 v11, s2, 0, v3
; VI-NEXT: v_cmp_eq_f32_e64 vcc, |v3|, |v7|
@@ -14070,7 +14070,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB12_32
; VI-NEXT: .LBB12_26:
; VI-NEXT: ; implicit-def: $vgpr11
-; VI-NEXT: .LBB12_27: ; %frem.compute77
+; VI-NEXT: .LBB12_27: ; %frem.compute
; VI-NEXT: v_frexp_mant_f32_e64 v12, |v7|
; VI-NEXT: v_ldexp_f32 v12, v12, 1
; VI-NEXT: v_div_scale_f32 v18, s[2:3], v12, v12, 1.0
@@ -14095,10 +14095,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 13, v13
; VI-NEXT: v_div_fixup_f32 v15, v15, v12, 1.0
; VI-NEXT: s_cbranch_vccnz .LBB12_31
-; VI-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; VI-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; VI-NEXT: v_sub_u32_e32 v13, vcc, v16, v17
; VI-NEXT: v_add_u32_e32 v13, vcc, 12, v13
-; VI-NEXT: .LBB12_29: ; %frem.loop_body85
+; VI-NEXT: .LBB12_29: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v16, v14
; VI-NEXT: v_mul_f32_e32 v14, v16, v15
@@ -14113,7 +14113,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_cbranch_vccnz .LBB12_29
; VI-NEXT: ; %bb.30: ; %Flow
; VI-NEXT: v_mov_b32_e32 v14, v16
-; VI-NEXT: .LBB12_31: ; %frem.loop_exit86
+; VI-NEXT: .LBB12_31: ; %frem.loop_exit
; VI-NEXT: v_add_u32_e32 v13, vcc, -11, v13
; VI-NEXT: v_ldexp_f32 v13, v14, v13
; VI-NEXT: v_mul_f32_e32 v14, v13, v15
@@ -14161,7 +14161,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v0|, |v4|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB12_2
-; GFX9-NEXT: ; %bb.1: ; %frem.else
+; GFX9-NEXT: ; %bb.1: ; %frem.else78
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v8, s2, 0, v0
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v0|, |v4|
@@ -14170,7 +14170,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB12_8
; GFX9-NEXT: .LBB12_2:
; GFX9-NEXT: ; implicit-def: $vgpr8
-; GFX9-NEXT: .LBB12_3: ; %frem.compute
+; GFX9-NEXT: .LBB12_3: ; %frem.compute77
; GFX9-NEXT: v_frexp_mant_f32_e64 v9, |v4|
; GFX9-NEXT: v_ldexp_f32 v9, v9, 1
; GFX9-NEXT: v_div_scale_f32 v15, s[2:3], v9, v9, 1.0
@@ -14195,10 +14195,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v10
; GFX9-NEXT: v_div_fixup_f32 v12, v12, v9, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB12_7
-; GFX9-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX9-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; GFX9-NEXT: v_sub_u32_e32 v10, v13, v14
; GFX9-NEXT: v_add_u32_e32 v10, 12, v10
-; GFX9-NEXT: .LBB12_5: ; %frem.loop_body
+; GFX9-NEXT: .LBB12_5: ; %frem.loop_body85
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v13, v11
; GFX9-NEXT: v_mul_f32_e32 v11, v13, v12
@@ -14213,7 +14213,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB12_5
; GFX9-NEXT: ; %bb.6: ; %Flow125
; GFX9-NEXT: v_mov_b32_e32 v11, v13
-; GFX9-NEXT: .LBB12_7: ; %frem.loop_exit
+; GFX9-NEXT: .LBB12_7: ; %frem.loop_exit86
; GFX9-NEXT: v_add_u32_e32 v10, -11, v10
; GFX9-NEXT: v_ldexp_f32 v10, v11, v10
; GFX9-NEXT: v_mul_f32_e32 v11, v10, v12
@@ -14229,7 +14229,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v1|, |v5|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB12_10
-; GFX9-NEXT: ; %bb.9: ; %frem.else16
+; GFX9-NEXT: ; %bb.9: ; %frem.else47
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v9, s2, 0, v1
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v1|, |v5|
@@ -14238,7 +14238,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB12_16
; GFX9-NEXT: .LBB12_10:
; GFX9-NEXT: ; implicit-def: $vgpr9
-; GFX9-NEXT: .LBB12_11: ; %frem.compute15
+; GFX9-NEXT: .LBB12_11: ; %frem.compute46
; GFX9-NEXT: v_frexp_mant_f32_e64 v10, |v5|
; GFX9-NEXT: v_ldexp_f32 v10, v10, 1
; GFX9-NEXT: v_div_scale_f32 v16, s[2:3], v10, v10, 1.0
@@ -14263,10 +14263,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v11
; GFX9-NEXT: v_div_fixup_f32 v13, v13, v10, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB12_15
-; GFX9-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX9-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; GFX9-NEXT: v_sub_u32_e32 v11, v14, v15
; GFX9-NEXT: v_add_u32_e32 v11, 12, v11
-; GFX9-NEXT: .LBB12_13: ; %frem.loop_body23
+; GFX9-NEXT: .LBB12_13: ; %frem.loop_body54
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v14, v12
; GFX9-NEXT: v_mul_f32_e32 v12, v14, v13
@@ -14281,7 +14281,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB12_13
; GFX9-NEXT: ; %bb.14: ; %Flow121
; GFX9-NEXT: v_mov_b32_e32 v12, v14
-; GFX9-NEXT: .LBB12_15: ; %frem.loop_exit24
+; GFX9-NEXT: .LBB12_15: ; %frem.loop_exit55
; GFX9-NEXT: v_add_u32_e32 v11, -11, v11
; GFX9-NEXT: v_ldexp_f32 v11, v12, v11
; GFX9-NEXT: v_mul_f32_e32 v12, v11, v13
@@ -14297,7 +14297,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v2|, |v6|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB12_18
-; GFX9-NEXT: ; %bb.17: ; %frem.else47
+; GFX9-NEXT: ; %bb.17: ; %frem.else16
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v10, s2, 0, v2
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v2|, |v6|
@@ -14306,7 +14306,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB12_24
; GFX9-NEXT: .LBB12_18:
; GFX9-NEXT: ; implicit-def: $vgpr10
-; GFX9-NEXT: .LBB12_19: ; %frem.compute46
+; GFX9-NEXT: .LBB12_19: ; %frem.compute15
; GFX9-NEXT: v_frexp_mant_f32_e64 v11, |v6|
; GFX9-NEXT: v_ldexp_f32 v11, v11, 1
; GFX9-NEXT: v_div_scale_f32 v17, s[2:3], v11, v11, 1.0
@@ -14331,10 +14331,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v12
; GFX9-NEXT: v_div_fixup_f32 v14, v14, v11, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB12_23
-; GFX9-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; GFX9-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; GFX9-NEXT: v_sub_u32_e32 v12, v15, v16
; GFX9-NEXT: v_add_u32_e32 v12, 12, v12
-; GFX9-NEXT: .LBB12_21: ; %frem.loop_body54
+; GFX9-NEXT: .LBB12_21: ; %frem.loop_body23
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v15, v13
; GFX9-NEXT: v_mul_f32_e32 v13, v15, v14
@@ -14349,7 +14349,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB12_21
; GFX9-NEXT: ; %bb.22: ; %Flow117
; GFX9-NEXT: v_mov_b32_e32 v13, v15
-; GFX9-NEXT: .LBB12_23: ; %frem.loop_exit55
+; GFX9-NEXT: .LBB12_23: ; %frem.loop_exit24
; GFX9-NEXT: v_add_u32_e32 v12, -11, v12
; GFX9-NEXT: v_ldexp_f32 v12, v13, v12
; GFX9-NEXT: v_mul_f32_e32 v13, v12, v14
@@ -14365,7 +14365,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f32_e64 s[2:3], |v3|, |v7|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB12_26
-; GFX9-NEXT: ; %bb.25: ; %frem.else78
+; GFX9-NEXT: ; %bb.25: ; %frem.else
; GFX9-NEXT: s_brev_b32 s2, -2
; GFX9-NEXT: v_bfi_b32 v11, s2, 0, v3
; GFX9-NEXT: v_cmp_eq_f32_e64 vcc, |v3|, |v7|
@@ -14374,7 +14374,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB12_32
; GFX9-NEXT: .LBB12_26:
; GFX9-NEXT: ; implicit-def: $vgpr11
-; GFX9-NEXT: .LBB12_27: ; %frem.compute77
+; GFX9-NEXT: .LBB12_27: ; %frem.compute
; GFX9-NEXT: v_frexp_mant_f32_e64 v12, |v7|
; GFX9-NEXT: v_ldexp_f32 v12, v12, 1
; GFX9-NEXT: v_div_scale_f32 v18, s[2:3], v12, v12, 1.0
@@ -14399,10 +14399,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 13, v13
; GFX9-NEXT: v_div_fixup_f32 v15, v15, v12, 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB12_31
-; GFX9-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; GFX9-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX9-NEXT: v_sub_u32_e32 v13, v16, v17
; GFX9-NEXT: v_add_u32_e32 v13, 12, v13
-; GFX9-NEXT: .LBB12_29: ; %frem.loop_body85
+; GFX9-NEXT: .LBB12_29: ; %frem.loop_body
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v16, v14
; GFX9-NEXT: v_mul_f32_e32 v14, v16, v15
@@ -14417,7 +14417,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_cbranch_vccnz .LBB12_29
; GFX9-NEXT: ; %bb.30: ; %Flow
; GFX9-NEXT: v_mov_b32_e32 v14, v16
-; GFX9-NEXT: .LBB12_31: ; %frem.loop_exit86
+; GFX9-NEXT: .LBB12_31: ; %frem.loop_exit
; GFX9-NEXT: v_add_u32_e32 v13, -11, v13
; GFX9-NEXT: v_ldexp_f32 v13, v14, v13
; GFX9-NEXT: v_mul_f32_e32 v14, v13, v15
@@ -14466,7 +14466,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v0|, |v4|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB12_2
-; GFX10-NEXT: ; %bb.1: ; %frem.else
+; GFX10-NEXT: ; %bb.1: ; %frem.else78
; GFX10-NEXT: v_bfi_b32 v8, 0x7fffffff, 0, v0
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v0|, |v4|
; GFX10-NEXT: v_cndmask_b32_e32 v8, v0, v8, vcc_lo
@@ -14474,7 +14474,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB12_8
; GFX10-NEXT: .LBB12_2:
; GFX10-NEXT: ; implicit-def: $vgpr8
-; GFX10-NEXT: .LBB12_3: ; %frem.compute
+; GFX10-NEXT: .LBB12_3: ; %frem.compute77
; GFX10-NEXT: v_frexp_mant_f32_e64 v9, |v4|
; GFX10-NEXT: v_frexp_mant_f32_e64 v8, |v0|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v11, v0
@@ -14501,10 +14501,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v12
; GFX10-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB12_7
-; GFX10-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX10-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB12_5: ; %frem.loop_body
+; GFX10-NEXT: .LBB12_5: ; %frem.loop_body85
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v13, v10
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -14520,7 +14520,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.6: ; %Flow125
; GFX10-NEXT: v_mov_b32_e32 v12, s2
; GFX10-NEXT: v_mov_b32_e32 v10, v13
-; GFX10-NEXT: .LBB12_7: ; %frem.loop_exit
+; GFX10-NEXT: .LBB12_7: ; %frem.loop_exit86
; GFX10-NEXT: v_add_nc_u32_e32 v12, -11, v12
; GFX10-NEXT: v_ldexp_f32 v10, v10, v12
; GFX10-NEXT: v_mul_f32_e32 v11, v10, v11
@@ -14535,7 +14535,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v1|, |v5|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB12_10
-; GFX10-NEXT: ; %bb.9: ; %frem.else16
+; GFX10-NEXT: ; %bb.9: ; %frem.else47
; GFX10-NEXT: v_bfi_b32 v9, 0x7fffffff, 0, v1
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v1|, |v5|
; GFX10-NEXT: v_cndmask_b32_e32 v9, v1, v9, vcc_lo
@@ -14543,7 +14543,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB12_16
; GFX10-NEXT: .LBB12_10:
; GFX10-NEXT: ; implicit-def: $vgpr9
-; GFX10-NEXT: .LBB12_11: ; %frem.compute15
+; GFX10-NEXT: .LBB12_11: ; %frem.compute46
; GFX10-NEXT: v_frexp_mant_f32_e64 v10, |v5|
; GFX10-NEXT: v_frexp_mant_f32_e64 v9, |v1|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v12, v1
@@ -14570,10 +14570,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v13
; GFX10-NEXT: v_div_fixup_f32 v12, v12, v10, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB12_15
-; GFX10-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX10-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB12_13: ; %frem.loop_body23
+; GFX10-NEXT: .LBB12_13: ; %frem.loop_body54
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v14, v11
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -14589,7 +14589,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.14: ; %Flow121
; GFX10-NEXT: v_mov_b32_e32 v13, s2
; GFX10-NEXT: v_mov_b32_e32 v11, v14
-; GFX10-NEXT: .LBB12_15: ; %frem.loop_exit24
+; GFX10-NEXT: .LBB12_15: ; %frem.loop_exit55
; GFX10-NEXT: v_add_nc_u32_e32 v13, -11, v13
; GFX10-NEXT: v_ldexp_f32 v11, v11, v13
; GFX10-NEXT: v_mul_f32_e32 v12, v11, v12
@@ -14604,7 +14604,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v2|, |v6|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB12_18
-; GFX10-NEXT: ; %bb.17: ; %frem.else47
+; GFX10-NEXT: ; %bb.17: ; %frem.else16
; GFX10-NEXT: v_bfi_b32 v10, 0x7fffffff, 0, v2
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v2|, |v6|
; GFX10-NEXT: v_cndmask_b32_e32 v10, v2, v10, vcc_lo
@@ -14612,7 +14612,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB12_24
; GFX10-NEXT: .LBB12_18:
; GFX10-NEXT: ; implicit-def: $vgpr10
-; GFX10-NEXT: .LBB12_19: ; %frem.compute46
+; GFX10-NEXT: .LBB12_19: ; %frem.compute15
; GFX10-NEXT: v_frexp_mant_f32_e64 v11, |v6|
; GFX10-NEXT: v_frexp_mant_f32_e64 v10, |v2|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v13, v2
@@ -14639,10 +14639,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v14
; GFX10-NEXT: v_div_fixup_f32 v13, v13, v11, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB12_23
-; GFX10-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; GFX10-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB12_21: ; %frem.loop_body54
+; GFX10-NEXT: .LBB12_21: ; %frem.loop_body23
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v15, v12
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -14658,7 +14658,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.22: ; %Flow117
; GFX10-NEXT: v_mov_b32_e32 v14, s2
; GFX10-NEXT: v_mov_b32_e32 v12, v15
-; GFX10-NEXT: .LBB12_23: ; %frem.loop_exit55
+; GFX10-NEXT: .LBB12_23: ; %frem.loop_exit24
; GFX10-NEXT: v_add_nc_u32_e32 v14, -11, v14
; GFX10-NEXT: v_ldexp_f32 v12, v12, v14
; GFX10-NEXT: v_mul_f32_e32 v13, v12, v13
@@ -14673,7 +14673,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f32_e64 s2, |v3|, |v7|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB12_26
-; GFX10-NEXT: ; %bb.25: ; %frem.else78
+; GFX10-NEXT: ; %bb.25: ; %frem.else
; GFX10-NEXT: v_bfi_b32 v11, 0x7fffffff, 0, v3
; GFX10-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v3|, |v7|
; GFX10-NEXT: v_cndmask_b32_e32 v11, v3, v11, vcc_lo
@@ -14681,7 +14681,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB12_32
; GFX10-NEXT: .LBB12_26:
; GFX10-NEXT: ; implicit-def: $vgpr11
-; GFX10-NEXT: .LBB12_27: ; %frem.compute77
+; GFX10-NEXT: .LBB12_27: ; %frem.compute
; GFX10-NEXT: v_frexp_mant_f32_e64 v12, |v7|
; GFX10-NEXT: v_frexp_mant_f32_e64 v11, |v3|
; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v14, v3
@@ -14708,10 +14708,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v15
; GFX10-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB12_31
-; GFX10-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; GFX10-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 12
-; GFX10-NEXT: .LBB12_29: ; %frem.loop_body85
+; GFX10-NEXT: .LBB12_29: ; %frem.loop_body
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v16, v13
; GFX10-NEXT: s_add_i32 s2, s2, -12
@@ -14727,7 +14727,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: ; %bb.30: ; %Flow
; GFX10-NEXT: v_mov_b32_e32 v15, s2
; GFX10-NEXT: v_mov_b32_e32 v13, v16
-; GFX10-NEXT: .LBB12_31: ; %frem.loop_exit86
+; GFX10-NEXT: .LBB12_31: ; %frem.loop_exit
; GFX10-NEXT: v_add_nc_u32_e32 v15, -11, v15
; GFX10-NEXT: v_ldexp_f32 v13, v13, v15
; GFX10-NEXT: v_mul_f32_e32 v14, v13, v14
@@ -14773,7 +14773,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v0|, |v4|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB12_2
-; GFX11-NEXT: ; %bb.1: ; %frem.else
+; GFX11-NEXT: ; %bb.1: ; %frem.else78
; GFX11-NEXT: v_bfi_b32 v8, 0x7fffffff, 0, v0
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v0|, |v4|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -14782,7 +14782,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB12_8
; GFX11-NEXT: .LBB12_2:
; GFX11-NEXT: ; implicit-def: $vgpr8
-; GFX11-NEXT: .LBB12_3: ; %frem.compute
+; GFX11-NEXT: .LBB12_3: ; %frem.compute77
; GFX11-NEXT: v_frexp_mant_f32_e64 v9, |v4|
; GFX11-NEXT: v_frexp_mant_f32_e64 v8, |v0|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v11, v0
@@ -14818,11 +14818,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v11, v11, v9, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB12_7
-; GFX11-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB12_5: ; %frem.loop_body
+; GFX11-NEXT: .LBB12_5: ; %frem.loop_body85
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v13, v10
@@ -14842,7 +14842,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.6: ; %Flow125
; GFX11-NEXT: v_mov_b32_e32 v12, s2
; GFX11-NEXT: v_mov_b32_e32 v10, v13
-; GFX11-NEXT: .LBB12_7: ; %frem.loop_exit
+; GFX11-NEXT: .LBB12_7: ; %frem.loop_exit86
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v12, -11, v12
; GFX11-NEXT: v_ldexp_f32 v10, v10, v12
@@ -14862,7 +14862,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v1|, |v5|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB12_10
-; GFX11-NEXT: ; %bb.9: ; %frem.else16
+; GFX11-NEXT: ; %bb.9: ; %frem.else47
; GFX11-NEXT: v_bfi_b32 v9, 0x7fffffff, 0, v1
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v1|, |v5|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -14871,7 +14871,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB12_16
; GFX11-NEXT: .LBB12_10:
; GFX11-NEXT: ; implicit-def: $vgpr9
-; GFX11-NEXT: .LBB12_11: ; %frem.compute15
+; GFX11-NEXT: .LBB12_11: ; %frem.compute46
; GFX11-NEXT: v_frexp_mant_f32_e64 v10, |v5|
; GFX11-NEXT: v_frexp_mant_f32_e64 v9, |v1|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v12, v1
@@ -14907,11 +14907,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v12, v12, v10, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB12_15
-; GFX11-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX11-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB12_13: ; %frem.loop_body23
+; GFX11-NEXT: .LBB12_13: ; %frem.loop_body54
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v14, v11
@@ -14931,7 +14931,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.14: ; %Flow121
; GFX11-NEXT: v_mov_b32_e32 v13, s2
; GFX11-NEXT: v_mov_b32_e32 v11, v14
-; GFX11-NEXT: .LBB12_15: ; %frem.loop_exit24
+; GFX11-NEXT: .LBB12_15: ; %frem.loop_exit55
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v13, -11, v13
; GFX11-NEXT: v_ldexp_f32 v11, v11, v13
@@ -14951,7 +14951,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v2|, |v6|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB12_18
-; GFX11-NEXT: ; %bb.17: ; %frem.else47
+; GFX11-NEXT: ; %bb.17: ; %frem.else16
; GFX11-NEXT: v_bfi_b32 v10, 0x7fffffff, 0, v2
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v2|, |v6|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -14960,7 +14960,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB12_24
; GFX11-NEXT: .LBB12_18:
; GFX11-NEXT: ; implicit-def: $vgpr10
-; GFX11-NEXT: .LBB12_19: ; %frem.compute46
+; GFX11-NEXT: .LBB12_19: ; %frem.compute15
; GFX11-NEXT: v_frexp_mant_f32_e64 v11, |v6|
; GFX11-NEXT: v_frexp_mant_f32_e64 v10, |v2|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v13, v2
@@ -14996,11 +14996,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v13, v13, v11, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB12_23
-; GFX11-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; GFX11-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB12_21: ; %frem.loop_body54
+; GFX11-NEXT: .LBB12_21: ; %frem.loop_body23
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v15, v12
@@ -15020,7 +15020,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.22: ; %Flow117
; GFX11-NEXT: v_mov_b32_e32 v14, s2
; GFX11-NEXT: v_mov_b32_e32 v12, v15
-; GFX11-NEXT: .LBB12_23: ; %frem.loop_exit55
+; GFX11-NEXT: .LBB12_23: ; %frem.loop_exit24
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v14, -11, v14
; GFX11-NEXT: v_ldexp_f32 v12, v12, v14
@@ -15040,7 +15040,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f32_e64 s2, |v3|, |v7|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB12_26
-; GFX11-NEXT: ; %bb.25: ; %frem.else78
+; GFX11-NEXT: ; %bb.25: ; %frem.else
; GFX11-NEXT: v_bfi_b32 v11, 0x7fffffff, 0, v3
; GFX11-NEXT: v_cmp_eq_f32_e64 vcc_lo, |v3|, |v7|
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -15049,7 +15049,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB12_32
; GFX11-NEXT: .LBB12_26:
; GFX11-NEXT: ; implicit-def: $vgpr11
-; GFX11-NEXT: .LBB12_27: ; %frem.compute77
+; GFX11-NEXT: .LBB12_27: ; %frem.compute
; GFX11-NEXT: v_frexp_mant_f32_e64 v12, |v7|
; GFX11-NEXT: v_frexp_mant_f32_e64 v11, |v3|
; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v14, v3
@@ -15085,11 +15085,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f32 v14, v14, v12, 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB12_31
-; GFX11-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; GFX11-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 12
-; GFX11-NEXT: .LBB12_29: ; %frem.loop_body85
+; GFX11-NEXT: .LBB12_29: ; %frem.loop_body
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_mov_b32_e32 v16, v13
@@ -15109,7 +15109,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.30: ; %Flow
; GFX11-NEXT: v_mov_b32_e32 v15, s2
; GFX11-NEXT: v_mov_b32_e32 v13, v16
-; GFX11-NEXT: .LBB12_31: ; %frem.loop_exit86
+; GFX11-NEXT: .LBB12_31: ; %frem.loop_exit
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_add_nc_u32_e32 v15, -11, v15
; GFX11-NEXT: v_ldexp_f32 v13, v13, v15
@@ -15170,7 +15170,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s5, s12
; GFX1150-NEXT: s_cbranch_scc0 .LBB12_2
-; GFX1150-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-NEXT: ; %bb.1: ; %frem.else78
; GFX1150-NEXT: s_cmp_eq_f32 s5, s12
; GFX1150-NEXT: v_bfi_b32 v0, 0x7fffffff, 0, s8
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15180,7 +15180,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB12_8
; GFX1150-NEXT: .LBB12_2:
; GFX1150-NEXT: ; implicit-def: $vgpr0
-; GFX1150-NEXT: .LBB12_3: ; %frem.compute
+; GFX1150-NEXT: .LBB12_3: ; %frem.compute77
; GFX1150-NEXT: v_frexp_mant_f32_e64 v1, |s6|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v0, |s8|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -15215,11 +15215,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v4
; GFX1150-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB12_7
-; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; GFX1150-NEXT: s_sub_i32 s11, s11, s12
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s11, s11, 12
-; GFX1150-NEXT: .LBB12_5: ; %frem.loop_body
+; GFX1150-NEXT: .LBB12_5: ; %frem.loop_body85
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v5, v2
@@ -15241,7 +15241,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.6: ; %Flow125
; GFX1150-NEXT: v_mov_b32_e32 v4, s11
; GFX1150-NEXT: v_mov_b32_e32 v2, v5
-; GFX1150-NEXT: .LBB12_7: ; %frem.loop_exit
+; GFX1150-NEXT: .LBB12_7: ; %frem.loop_exit86
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v4, -11, v4
; GFX1150-NEXT: v_ldexp_f32 v2, v2, v4
@@ -15264,7 +15264,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s8, s12
; GFX1150-NEXT: s_cbranch_scc0 .LBB12_10
-; GFX1150-NEXT: ; %bb.9: ; %frem.else16
+; GFX1150-NEXT: ; %bb.9: ; %frem.else47
; GFX1150-NEXT: s_cmp_eq_f32 s8, s12
; GFX1150-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, s10
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15274,7 +15274,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB12_16
; GFX1150-NEXT: .LBB12_10:
; GFX1150-NEXT: ; implicit-def: $vgpr1
-; GFX1150-NEXT: .LBB12_11: ; %frem.compute15
+; GFX1150-NEXT: .LBB12_11: ; %frem.compute46
; GFX1150-NEXT: v_frexp_mant_f32_e64 v2, |s4|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v1, |s10|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -15309,11 +15309,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v5
; GFX1150-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB12_15
-; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; GFX1150-NEXT: s_sub_i32 s11, s11, s12
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s11, s11, 12
-; GFX1150-NEXT: .LBB12_13: ; %frem.loop_body23
+; GFX1150-NEXT: .LBB12_13: ; %frem.loop_body54
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v6, v3
@@ -15335,7 +15335,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.14: ; %Flow121
; GFX1150-NEXT: v_mov_b32_e32 v5, s11
; GFX1150-NEXT: v_mov_b32_e32 v3, v6
-; GFX1150-NEXT: .LBB12_15: ; %frem.loop_exit24
+; GFX1150-NEXT: .LBB12_15: ; %frem.loop_exit55
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v5, -11, v5
; GFX1150-NEXT: v_ldexp_f32 v3, v3, v5
@@ -15358,7 +15358,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s10, s12
; GFX1150-NEXT: s_cbranch_scc0 .LBB12_18
-; GFX1150-NEXT: ; %bb.17: ; %frem.else47
+; GFX1150-NEXT: ; %bb.17: ; %frem.else16
; GFX1150-NEXT: s_cmp_eq_f32 s10, s12
; GFX1150-NEXT: v_bfi_b32 v2, 0x7fffffff, 0, s9
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15368,7 +15368,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB12_24
; GFX1150-NEXT: .LBB12_18:
; GFX1150-NEXT: ; implicit-def: $vgpr2
-; GFX1150-NEXT: .LBB12_19: ; %frem.compute46
+; GFX1150-NEXT: .LBB12_19: ; %frem.compute15
; GFX1150-NEXT: v_frexp_mant_f32_e64 v3, |s3|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v2, |s9|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v5, s9
@@ -15403,11 +15403,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v6
; GFX1150-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB12_23
-; GFX1150-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; GFX1150-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; GFX1150-NEXT: s_sub_i32 s11, s11, s12
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s11, s11, 12
-; GFX1150-NEXT: .LBB12_21: ; %frem.loop_body54
+; GFX1150-NEXT: .LBB12_21: ; %frem.loop_body23
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v7, v4
@@ -15429,7 +15429,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.22: ; %Flow117
; GFX1150-NEXT: v_mov_b32_e32 v6, s11
; GFX1150-NEXT: v_mov_b32_e32 v4, v7
-; GFX1150-NEXT: .LBB12_23: ; %frem.loop_exit55
+; GFX1150-NEXT: .LBB12_23: ; %frem.loop_exit24
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v6, -11, v6
; GFX1150-NEXT: v_ldexp_f32 v4, v4, v6
@@ -15452,7 +15452,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_cmp_ngt_f32 s9, s12
; GFX1150-NEXT: s_cbranch_scc0 .LBB12_26
-; GFX1150-NEXT: ; %bb.25: ; %frem.else78
+; GFX1150-NEXT: ; %bb.25: ; %frem.else
; GFX1150-NEXT: s_cmp_eq_f32 s9, s12
; GFX1150-NEXT: v_bfi_b32 v3, 0x7fffffff, 0, s7
; GFX1150-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15462,7 +15462,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB12_32
; GFX1150-NEXT: .LBB12_26:
; GFX1150-NEXT: ; implicit-def: $vgpr3
-; GFX1150-NEXT: .LBB12_27: ; %frem.compute77
+; GFX1150-NEXT: .LBB12_27: ; %frem.compute
; GFX1150-NEXT: v_frexp_mant_f32_e64 v4, |s2|
; GFX1150-NEXT: v_frexp_mant_f32_e64 v3, |s7|
; GFX1150-NEXT: v_frexp_exp_i32_f32_e32 v6, s7
@@ -15497,11 +15497,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v7
; GFX1150-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB12_31
-; GFX1150-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; GFX1150-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1150-NEXT: s_sub_i32 s11, s11, s12
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s11, s11, 12
-; GFX1150-NEXT: .LBB12_29: ; %frem.loop_body85
+; GFX1150-NEXT: .LBB12_29: ; %frem.loop_body
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_mov_b32_e32 v8, v5
@@ -15523,7 +15523,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.30: ; %Flow
; GFX1150-NEXT: v_mov_b32_e32 v7, s11
; GFX1150-NEXT: v_mov_b32_e32 v5, v8
-; GFX1150-NEXT: .LBB12_31: ; %frem.loop_exit86
+; GFX1150-NEXT: .LBB12_31: ; %frem.loop_exit
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_add_nc_u32_e32 v7, -11, v7
; GFX1150-NEXT: v_ldexp_f32 v5, v5, v7
@@ -15597,7 +15597,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1200-NEXT: s_cmp_ngt_f32 s5, s12
; GFX1200-NEXT: s_cbranch_scc0 .LBB12_2
-; GFX1200-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-NEXT: ; %bb.1: ; %frem.else78
; GFX1200-NEXT: s_cmp_eq_f32 s5, s12
; GFX1200-NEXT: v_bfi_b32 v0, 0x7fffffff, 0, s8
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15607,7 +15607,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB12_8
; GFX1200-NEXT: .LBB12_2:
; GFX1200-NEXT: ; implicit-def: $vgpr0
-; GFX1200-NEXT: .LBB12_3: ; %frem.compute
+; GFX1200-NEXT: .LBB12_3: ; %frem.compute77
; GFX1200-NEXT: v_frexp_mant_f32_e64 v1, |s6|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v0, |s8|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v3, s8
@@ -15643,11 +15643,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v4
; GFX1200-NEXT: v_div_fixup_f32 v3, v3, v1, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB12_7
-; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body85.preheader
; GFX1200-NEXT: s_sub_co_i32 s11, s11, s12
; GFX1200-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1200-NEXT: s_add_co_i32 s11, s11, 12
-; GFX1200-NEXT: .LBB12_5: ; %frem.loop_body
+; GFX1200-NEXT: .LBB12_5: ; %frem.loop_body85
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1200-NEXT: v_mov_b32_e32 v5, v2
@@ -15670,7 +15670,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.6: ; %Flow125
; GFX1200-NEXT: v_mov_b32_e32 v4, s11
; GFX1200-NEXT: v_mov_b32_e32 v2, v5
-; GFX1200-NEXT: .LBB12_7: ; %frem.loop_exit
+; GFX1200-NEXT: .LBB12_7: ; %frem.loop_exit86
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v4, -11, v4
; GFX1200-NEXT: v_ldexp_f32 v2, v2, v4
@@ -15694,7 +15694,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_cmp_ngt_f32 s8, s12
; GFX1200-NEXT: s_cbranch_scc0 .LBB12_10
-; GFX1200-NEXT: ; %bb.9: ; %frem.else16
+; GFX1200-NEXT: ; %bb.9: ; %frem.else47
; GFX1200-NEXT: s_cmp_eq_f32 s8, s12
; GFX1200-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, s10
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15705,7 +15705,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB12_16
; GFX1200-NEXT: .LBB12_10:
; GFX1200-NEXT: ; implicit-def: $vgpr1
-; GFX1200-NEXT: .LBB12_11: ; %frem.compute15
+; GFX1200-NEXT: .LBB12_11: ; %frem.compute46
; GFX1200-NEXT: v_frexp_mant_f32_e64 v2, |s4|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v1, |s10|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v4, s10
@@ -15741,11 +15741,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v5
; GFX1200-NEXT: v_div_fixup_f32 v4, v4, v2, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB12_15
-; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body54.preheader
; GFX1200-NEXT: s_sub_co_i32 s11, s11, s12
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s11, s11, 12
-; GFX1200-NEXT: .LBB12_13: ; %frem.loop_body23
+; GFX1200-NEXT: .LBB12_13: ; %frem.loop_body54
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-NEXT: v_mov_b32_e32 v6, v3
@@ -15769,7 +15769,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.14: ; %Flow121
; GFX1200-NEXT: v_mov_b32_e32 v5, s11
; GFX1200-NEXT: v_mov_b32_e32 v3, v6
-; GFX1200-NEXT: .LBB12_15: ; %frem.loop_exit24
+; GFX1200-NEXT: .LBB12_15: ; %frem.loop_exit55
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v5, -11, v5
; GFX1200-NEXT: v_ldexp_f32 v3, v3, v5
@@ -15793,7 +15793,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_cmp_ngt_f32 s10, s12
; GFX1200-NEXT: s_cbranch_scc0 .LBB12_18
-; GFX1200-NEXT: ; %bb.17: ; %frem.else47
+; GFX1200-NEXT: ; %bb.17: ; %frem.else16
; GFX1200-NEXT: s_cmp_eq_f32 s10, s12
; GFX1200-NEXT: v_bfi_b32 v2, 0x7fffffff, 0, s9
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15804,7 +15804,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB12_24
; GFX1200-NEXT: .LBB12_18:
; GFX1200-NEXT: ; implicit-def: $vgpr2
-; GFX1200-NEXT: .LBB12_19: ; %frem.compute46
+; GFX1200-NEXT: .LBB12_19: ; %frem.compute15
; GFX1200-NEXT: v_frexp_mant_f32_e64 v3, |s3|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v2, |s9|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v5, s9
@@ -15840,11 +15840,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v6
; GFX1200-NEXT: v_div_fixup_f32 v5, v5, v3, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB12_23
-; GFX1200-NEXT: ; %bb.20: ; %frem.loop_body54.preheader
+; GFX1200-NEXT: ; %bb.20: ; %frem.loop_body23.preheader
; GFX1200-NEXT: s_sub_co_i32 s11, s11, s12
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s11, s11, 12
-; GFX1200-NEXT: .LBB12_21: ; %frem.loop_body54
+; GFX1200-NEXT: .LBB12_21: ; %frem.loop_body23
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-NEXT: v_mov_b32_e32 v7, v4
@@ -15868,7 +15868,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.22: ; %Flow117
; GFX1200-NEXT: v_mov_b32_e32 v6, s11
; GFX1200-NEXT: v_mov_b32_e32 v4, v7
-; GFX1200-NEXT: .LBB12_23: ; %frem.loop_exit55
+; GFX1200-NEXT: .LBB12_23: ; %frem.loop_exit24
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v6, -11, v6
; GFX1200-NEXT: v_ldexp_f32 v4, v4, v6
@@ -15892,7 +15892,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_cmp_ngt_f32 s9, s12
; GFX1200-NEXT: s_cbranch_scc0 .LBB12_26
-; GFX1200-NEXT: ; %bb.25: ; %frem.else78
+; GFX1200-NEXT: ; %bb.25: ; %frem.else
; GFX1200-NEXT: s_cmp_eq_f32 s9, s12
; GFX1200-NEXT: v_bfi_b32 v3, 0x7fffffff, 0, s7
; GFX1200-NEXT: s_cselect_b32 vcc_lo, -1, 0
@@ -15903,7 +15903,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB12_32
; GFX1200-NEXT: .LBB12_26:
; GFX1200-NEXT: ; implicit-def: $vgpr3
-; GFX1200-NEXT: .LBB12_27: ; %frem.compute77
+; GFX1200-NEXT: .LBB12_27: ; %frem.compute
; GFX1200-NEXT: v_frexp_mant_f32_e64 v4, |s2|
; GFX1200-NEXT: v_frexp_mant_f32_e64 v3, |s7|
; GFX1200-NEXT: v_frexp_exp_i32_f32_e32 v6, s7
@@ -15939,11 +15939,11 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v7
; GFX1200-NEXT: v_div_fixup_f32 v6, v6, v4, 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB12_31
-; GFX1200-NEXT: ; %bb.28: ; %frem.loop_body85.preheader
+; GFX1200-NEXT: ; %bb.28: ; %frem.loop_body.preheader
; GFX1200-NEXT: s_sub_co_i32 s11, s11, s12
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s11, s11, 12
-; GFX1200-NEXT: .LBB12_29: ; %frem.loop_body85
+; GFX1200-NEXT: .LBB12_29: ; %frem.loop_body
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1200-NEXT: v_mov_b32_e32 v8, v5
@@ -15967,7 +15967,7 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.30: ; %Flow
; GFX1200-NEXT: v_mov_b32_e32 v7, s11
; GFX1200-NEXT: v_mov_b32_e32 v5, v8
-; GFX1200-NEXT: .LBB12_31: ; %frem.loop_exit86
+; GFX1200-NEXT: .LBB12_31: ; %frem.loop_exit
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_add_nc_u32_e32 v7, -11, v7
; GFX1200-NEXT: v_ldexp_f32 v5, v5, v7
@@ -16048,7 +16048,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f64_e64 s[0:1], |v[0:1]|, |v[4:5]|
; SI-NEXT: s_and_b64 vcc, exec, s[0:1]
; SI-NEXT: s_cbranch_vccz .LBB13_2
-; SI-NEXT: ; %bb.1: ; %frem.else
+; SI-NEXT: ; %bb.1: ; %frem.else16
; SI-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; SI-NEXT: v_cmp_eq_f64_e64 vcc, |v[0:1]|, |v[4:5]|
; SI-NEXT: v_cndmask_b32_e32 v9, v1, v8, vcc
@@ -16059,7 +16059,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB13_2:
; SI-NEXT: ; implicit-def: $vgpr8_vgpr9
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB13_3: ; %frem.compute
+; SI-NEXT: .LBB13_3: ; %frem.compute15
; SI-NEXT: s_brev_b32 s5, -2
; SI-NEXT: v_and_b32_e32 v10, 0x7fffffff, v1
; SI-NEXT: s_mov_b32 s0, 0
@@ -16105,13 +16105,13 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; SI-NEXT: s_cmp_lt_i32 s6, 27
; SI-NEXT: s_cbranch_scc1 .LBB13_7
-; SI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; SI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; SI-NEXT: s_sub_i32 s0, s3, s7
; SI-NEXT: s_add_i32 s6, s0, 26
; SI-NEXT: s_mov_b32 s3, 0x432fffff
; SI-NEXT: v_mov_b32_e32 v18, 0x43300000
; SI-NEXT: v_mov_b32_e32 v14, 0
-; SI-NEXT: .LBB13_5: ; %frem.loop_body
+; SI-NEXT: .LBB13_5: ; %frem.loop_body23
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v17, v11
; SI-NEXT: v_mov_b32_e32 v16, v10
@@ -16134,7 +16134,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: ; %bb.6: ; %Flow51
; SI-NEXT: v_mov_b32_e32 v10, v16
; SI-NEXT: v_mov_b32_e32 v11, v17
-; SI-NEXT: .LBB13_7: ; %frem.loop_exit
+; SI-NEXT: .LBB13_7: ; %frem.loop_exit24
; SI-NEXT: s_sub_i32 s0, s6, 25
; SI-NEXT: v_ldexp_f64 v[10:11], v[10:11], s0
; SI-NEXT: v_mul_f64 v[12:13], v[10:11], v[12:13]
@@ -16160,7 +16160,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_cmp_ngt_f64_e64 s[0:1], |v[2:3]|, |v[6:7]|
; SI-NEXT: s_and_b64 vcc, exec, s[0:1]
; SI-NEXT: s_cbranch_vccz .LBB13_10
-; SI-NEXT: ; %bb.9: ; %frem.else16
+; SI-NEXT: ; %bb.9: ; %frem.else
; SI-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; SI-NEXT: v_cmp_eq_f64_e64 vcc, |v[2:3]|, |v[6:7]|
; SI-NEXT: v_cndmask_b32_e32 v11, v3, v10, vcc
@@ -16171,7 +16171,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: .LBB13_10:
; SI-NEXT: ; implicit-def: $vgpr10_vgpr11
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: .LBB13_11: ; %frem.compute15
+; SI-NEXT: .LBB13_11: ; %frem.compute
; SI-NEXT: s_brev_b32 s5, -2
; SI-NEXT: v_and_b32_e32 v12, 0x7fffffff, v3
; SI-NEXT: s_mov_b32 s0, 0
@@ -16217,13 +16217,13 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; SI-NEXT: s_cmp_lt_i32 s6, 27
; SI-NEXT: s_cbranch_scc1 .LBB13_15
-; SI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; SI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; SI-NEXT: s_sub_i32 s0, s3, s7
; SI-NEXT: s_add_i32 s6, s0, 26
; SI-NEXT: s_mov_b32 s3, 0x432fffff
; SI-NEXT: v_mov_b32_e32 v20, 0x43300000
; SI-NEXT: v_mov_b32_e32 v16, 0
-; SI-NEXT: .LBB13_13: ; %frem.loop_body23
+; SI-NEXT: .LBB13_13: ; %frem.loop_body
; SI-NEXT: ; =>This Inner Loop Header: Depth=1
; SI-NEXT: v_mov_b32_e32 v19, v13
; SI-NEXT: v_mov_b32_e32 v18, v12
@@ -16246,7 +16246,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; SI-NEXT: ; %bb.14: ; %Flow
; SI-NEXT: v_mov_b32_e32 v12, v18
; SI-NEXT: v_mov_b32_e32 v13, v19
-; SI-NEXT: .LBB13_15: ; %frem.loop_exit24
+; SI-NEXT: .LBB13_15: ; %frem.loop_exit
; SI-NEXT: s_sub_i32 s0, s6, 25
; SI-NEXT: v_ldexp_f64 v[12:13], v[12:13], s0
; SI-NEXT: v_mul_f64 v[14:15], v[12:13], v[14:15]
@@ -16304,7 +16304,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB13_2
-; CI-NEXT: ; %bb.1: ; %frem.else
+; CI-NEXT: ; %bb.1: ; %frem.else16
; CI-NEXT: v_cmp_eq_f64_e64 vcc, |v[0:1]|, |v[4:5]|
; CI-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; CI-NEXT: v_cndmask_b32_e32 v9, v1, v8, vcc
@@ -16313,7 +16313,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB13_8
; CI-NEXT: .LBB13_2:
; CI-NEXT: ; implicit-def: $vgpr8_vgpr9
-; CI-NEXT: .LBB13_3: ; %frem.compute
+; CI-NEXT: .LBB13_3: ; %frem.compute15
; CI-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; CI-NEXT: v_frexp_exp_i32_f64_e32 v15, v[4:5]
; CI-NEXT: v_frexp_exp_i32_f64_e32 v14, v[0:1]
@@ -16337,10 +16337,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 27, v17
; CI-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; CI-NEXT: s_cbranch_vccnz .LBB13_7
-; CI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; CI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; CI-NEXT: v_sub_i32_e32 v14, vcc, v14, v15
; CI-NEXT: v_add_i32_e32 v17, vcc, 26, v14
-; CI-NEXT: .LBB13_5: ; %frem.loop_body
+; CI-NEXT: .LBB13_5: ; %frem.loop_body23
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v15, v11
; CI-NEXT: v_mov_b32_e32 v14, v10
@@ -16358,7 +16358,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; %bb.6: ; %Flow51
; CI-NEXT: v_mov_b32_e32 v10, v14
; CI-NEXT: v_mov_b32_e32 v11, v15
-; CI-NEXT: .LBB13_7: ; %frem.loop_exit
+; CI-NEXT: .LBB13_7: ; %frem.loop_exit24
; CI-NEXT: v_subrev_i32_e32 v14, vcc, 25, v17
; CI-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
; CI-NEXT: s_brev_b32 s2, -2
@@ -16375,7 +16375,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[2:3]|, |v[6:7]|
; CI-NEXT: s_and_b64 vcc, exec, s[2:3]
; CI-NEXT: s_cbranch_vccz .LBB13_10
-; CI-NEXT: ; %bb.9: ; %frem.else16
+; CI-NEXT: ; %bb.9: ; %frem.else
; CI-NEXT: v_cmp_eq_f64_e64 vcc, |v[2:3]|, |v[6:7]|
; CI-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; CI-NEXT: v_cndmask_b32_e32 v11, v3, v10, vcc
@@ -16384,7 +16384,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: s_branch .LBB13_16
; CI-NEXT: .LBB13_10:
; CI-NEXT: ; implicit-def: $vgpr10_vgpr11
-; CI-NEXT: .LBB13_11: ; %frem.compute15
+; CI-NEXT: .LBB13_11: ; %frem.compute
; CI-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; CI-NEXT: v_frexp_exp_i32_f64_e32 v17, v[6:7]
; CI-NEXT: v_frexp_exp_i32_f64_e32 v16, v[2:3]
@@ -16408,10 +16408,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: v_cmp_gt_i32_e32 vcc, 27, v19
; CI-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; CI-NEXT: s_cbranch_vccnz .LBB13_15
-; CI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; CI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; CI-NEXT: v_sub_i32_e32 v16, vcc, v16, v17
; CI-NEXT: v_add_i32_e32 v19, vcc, 26, v16
-; CI-NEXT: .LBB13_13: ; %frem.loop_body23
+; CI-NEXT: .LBB13_13: ; %frem.loop_body
; CI-NEXT: ; =>This Inner Loop Header: Depth=1
; CI-NEXT: v_mov_b32_e32 v17, v13
; CI-NEXT: v_mov_b32_e32 v16, v12
@@ -16429,7 +16429,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CI-NEXT: ; %bb.14: ; %Flow
; CI-NEXT: v_mov_b32_e32 v12, v16
; CI-NEXT: v_mov_b32_e32 v13, v17
-; CI-NEXT: .LBB13_15: ; %frem.loop_exit24
+; CI-NEXT: .LBB13_15: ; %frem.loop_exit
; CI-NEXT: v_subrev_i32_e32 v16, vcc, 25, v19
; CI-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
; CI-NEXT: s_brev_b32 s2, -2
@@ -16478,7 +16478,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB13_2
-; VI-NEXT: ; %bb.1: ; %frem.else
+; VI-NEXT: ; %bb.1: ; %frem.else16
; VI-NEXT: v_cmp_eq_f64_e64 vcc, |v[0:1]|, |v[4:5]|
; VI-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; VI-NEXT: v_cndmask_b32_e32 v9, v1, v8, vcc
@@ -16487,7 +16487,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB13_8
; VI-NEXT: .LBB13_2:
; VI-NEXT: ; implicit-def: $vgpr8_vgpr9
-; VI-NEXT: .LBB13_3: ; %frem.compute
+; VI-NEXT: .LBB13_3: ; %frem.compute15
; VI-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; VI-NEXT: v_frexp_exp_i32_f64_e32 v15, v[4:5]
; VI-NEXT: v_frexp_exp_i32_f64_e32 v14, v[0:1]
@@ -16511,10 +16511,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 27, v17
; VI-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; VI-NEXT: s_cbranch_vccnz .LBB13_7
-; VI-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; VI-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; VI-NEXT: v_sub_u32_e32 v14, vcc, v14, v15
; VI-NEXT: v_add_u32_e32 v17, vcc, 26, v14
-; VI-NEXT: .LBB13_5: ; %frem.loop_body
+; VI-NEXT: .LBB13_5: ; %frem.loop_body23
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v15, v11
; VI-NEXT: v_mov_b32_e32 v14, v10
@@ -16532,7 +16532,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; %bb.6: ; %Flow51
; VI-NEXT: v_mov_b32_e32 v10, v14
; VI-NEXT: v_mov_b32_e32 v11, v15
-; VI-NEXT: .LBB13_7: ; %frem.loop_exit
+; VI-NEXT: .LBB13_7: ; %frem.loop_exit24
; VI-NEXT: v_subrev_u32_e32 v14, vcc, 25, v17
; VI-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
; VI-NEXT: s_brev_b32 s2, -2
@@ -16549,7 +16549,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[2:3]|, |v[6:7]|
; VI-NEXT: s_and_b64 vcc, exec, s[2:3]
; VI-NEXT: s_cbranch_vccz .LBB13_10
-; VI-NEXT: ; %bb.9: ; %frem.else16
+; VI-NEXT: ; %bb.9: ; %frem.else
; VI-NEXT: v_cmp_eq_f64_e64 vcc, |v[2:3]|, |v[6:7]|
; VI-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; VI-NEXT: v_cndmask_b32_e32 v11, v3, v10, vcc
@@ -16558,7 +16558,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: s_branch .LBB13_16
; VI-NEXT: .LBB13_10:
; VI-NEXT: ; implicit-def: $vgpr10_vgpr11
-; VI-NEXT: .LBB13_11: ; %frem.compute15
+; VI-NEXT: .LBB13_11: ; %frem.compute
; VI-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; VI-NEXT: v_frexp_exp_i32_f64_e32 v17, v[6:7]
; VI-NEXT: v_frexp_exp_i32_f64_e32 v16, v[2:3]
@@ -16582,10 +16582,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: v_cmp_gt_i32_e32 vcc, 27, v19
; VI-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; VI-NEXT: s_cbranch_vccnz .LBB13_15
-; VI-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; VI-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; VI-NEXT: v_sub_u32_e32 v16, vcc, v16, v17
; VI-NEXT: v_add_u32_e32 v19, vcc, 26, v16
-; VI-NEXT: .LBB13_13: ; %frem.loop_body23
+; VI-NEXT: .LBB13_13: ; %frem.loop_body
; VI-NEXT: ; =>This Inner Loop Header: Depth=1
; VI-NEXT: v_mov_b32_e32 v17, v13
; VI-NEXT: v_mov_b32_e32 v16, v12
@@ -16603,7 +16603,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; VI-NEXT: ; %bb.14: ; %Flow
; VI-NEXT: v_mov_b32_e32 v12, v16
; VI-NEXT: v_mov_b32_e32 v13, v17
-; VI-NEXT: .LBB13_15: ; %frem.loop_exit24
+; VI-NEXT: .LBB13_15: ; %frem.loop_exit
; VI-NEXT: v_subrev_u32_e32 v16, vcc, 25, v19
; VI-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
; VI-NEXT: s_brev_b32 s2, -2
@@ -16647,7 +16647,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB13_2
-; GFX9-NEXT: ; %bb.1: ; %frem.else
+; GFX9-NEXT: ; %bb.1: ; %frem.else16
; GFX9-NEXT: v_cmp_eq_f64_e64 vcc, |v[0:1]|, |v[4:5]|
; GFX9-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; GFX9-NEXT: v_cndmask_b32_e32 v9, v1, v8, vcc
@@ -16656,7 +16656,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB13_8
; GFX9-NEXT: .LBB13_2:
; GFX9-NEXT: ; implicit-def: $vgpr8_vgpr9
-; GFX9-NEXT: .LBB13_3: ; %frem.compute
+; GFX9-NEXT: .LBB13_3: ; %frem.compute15
; GFX9-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v15, v[4:5]
; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v14, v[0:1]
@@ -16680,10 +16680,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 27, v17
; GFX9-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB13_7
-; GFX9-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX9-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX9-NEXT: v_sub_u32_e32 v14, v14, v15
; GFX9-NEXT: v_add_u32_e32 v17, 26, v14
-; GFX9-NEXT: .LBB13_5: ; %frem.loop_body
+; GFX9-NEXT: .LBB13_5: ; %frem.loop_body23
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v15, v11
; GFX9-NEXT: v_mov_b32_e32 v14, v10
@@ -16701,7 +16701,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: ; %bb.6: ; %Flow51
; GFX9-NEXT: v_mov_b32_e32 v10, v14
; GFX9-NEXT: v_mov_b32_e32 v11, v15
-; GFX9-NEXT: .LBB13_7: ; %frem.loop_exit
+; GFX9-NEXT: .LBB13_7: ; %frem.loop_exit24
; GFX9-NEXT: v_subrev_u32_e32 v14, 25, v17
; GFX9-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
; GFX9-NEXT: s_brev_b32 s2, -2
@@ -16718,7 +16718,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_ngt_f64_e64 s[2:3], |v[2:3]|, |v[6:7]|
; GFX9-NEXT: s_and_b64 vcc, exec, s[2:3]
; GFX9-NEXT: s_cbranch_vccz .LBB13_10
-; GFX9-NEXT: ; %bb.9: ; %frem.else16
+; GFX9-NEXT: ; %bb.9: ; %frem.else
; GFX9-NEXT: v_cmp_eq_f64_e64 vcc, |v[2:3]|, |v[6:7]|
; GFX9-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; GFX9-NEXT: v_cndmask_b32_e32 v11, v3, v10, vcc
@@ -16727,7 +16727,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: s_branch .LBB13_16
; GFX9-NEXT: .LBB13_10:
; GFX9-NEXT: ; implicit-def: $vgpr10_vgpr11
-; GFX9-NEXT: .LBB13_11: ; %frem.compute15
+; GFX9-NEXT: .LBB13_11: ; %frem.compute
; GFX9-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v17, v[6:7]
; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v16, v[2:3]
@@ -16751,10 +16751,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: v_cmp_gt_i32_e32 vcc, 27, v19
; GFX9-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; GFX9-NEXT: s_cbranch_vccnz .LBB13_15
-; GFX9-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX9-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX9-NEXT: v_sub_u32_e32 v16, v16, v17
; GFX9-NEXT: v_add_u32_e32 v19, 26, v16
-; GFX9-NEXT: .LBB13_13: ; %frem.loop_body23
+; GFX9-NEXT: .LBB13_13: ; %frem.loop_body
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: v_mov_b32_e32 v17, v13
; GFX9-NEXT: v_mov_b32_e32 v16, v12
@@ -16772,7 +16772,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX9-NEXT: ; %bb.14: ; %Flow
; GFX9-NEXT: v_mov_b32_e32 v12, v16
; GFX9-NEXT: v_mov_b32_e32 v13, v17
-; GFX9-NEXT: .LBB13_15: ; %frem.loop_exit24
+; GFX9-NEXT: .LBB13_15: ; %frem.loop_exit
; GFX9-NEXT: v_subrev_u32_e32 v16, 25, v19
; GFX9-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
; GFX9-NEXT: s_brev_b32 s2, -2
@@ -16817,7 +16817,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f64_e64 s2, |v[0:1]|, |v[4:5]|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB13_2
-; GFX10-NEXT: ; %bb.1: ; %frem.else
+; GFX10-NEXT: ; %bb.1: ; %frem.else16
; GFX10-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[0:1]|, |v[4:5]|
; GFX10-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; GFX10-NEXT: v_cndmask_b32_e32 v9, v1, v8, vcc_lo
@@ -16826,7 +16826,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB13_8
; GFX10-NEXT: .LBB13_2:
; GFX10-NEXT: ; implicit-def: $vgpr8_vgpr9
-; GFX10-NEXT: .LBB13_3: ; %frem.compute
+; GFX10-NEXT: .LBB13_3: ; %frem.compute15
; GFX10-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; GFX10-NEXT: v_frexp_exp_i32_f64_e32 v13, v[4:5]
; GFX10-NEXT: v_frexp_exp_i32_f64_e32 v12, v[0:1]
@@ -16851,10 +16851,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v17
; GFX10-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB13_7
-; GFX10-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX10-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 26
-; GFX10-NEXT: .LBB13_5: ; %frem.loop_body
+; GFX10-NEXT: .LBB13_5: ; %frem.loop_body23
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v15, v11
; GFX10-NEXT: v_mov_b32_e32 v14, v10
@@ -16873,7 +16873,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_mov_b32_e32 v10, v14
; GFX10-NEXT: v_mov_b32_e32 v17, s2
; GFX10-NEXT: v_mov_b32_e32 v11, v15
-; GFX10-NEXT: .LBB13_7: ; %frem.loop_exit
+; GFX10-NEXT: .LBB13_7: ; %frem.loop_exit24
; GFX10-NEXT: v_subrev_nc_u32_e32 v14, 25, v17
; GFX10-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
; GFX10-NEXT: v_mul_f64 v[12:13], v[10:11], v[12:13]
@@ -16889,7 +16889,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_ngt_f64_e64 s2, |v[2:3]|, |v[6:7]|
; GFX10-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX10-NEXT: s_cbranch_vccz .LBB13_10
-; GFX10-NEXT: ; %bb.9: ; %frem.else16
+; GFX10-NEXT: ; %bb.9: ; %frem.else
; GFX10-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[2:3]|, |v[6:7]|
; GFX10-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; GFX10-NEXT: v_cndmask_b32_e32 v11, v3, v10, vcc_lo
@@ -16898,7 +16898,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: s_branch .LBB13_16
; GFX10-NEXT: .LBB13_10:
; GFX10-NEXT: ; implicit-def: $vgpr10_vgpr11
-; GFX10-NEXT: .LBB13_11: ; %frem.compute15
+; GFX10-NEXT: .LBB13_11: ; %frem.compute
; GFX10-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; GFX10-NEXT: v_frexp_exp_i32_f64_e32 v15, v[6:7]
; GFX10-NEXT: v_frexp_exp_i32_f64_e32 v14, v[2:3]
@@ -16923,10 +16923,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v19
; GFX10-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; GFX10-NEXT: s_cbranch_vccnz .LBB13_15
-; GFX10-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX10-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX10-NEXT: s_sub_i32 s2, s2, s3
; GFX10-NEXT: s_add_i32 s2, s2, 26
-; GFX10-NEXT: .LBB13_13: ; %frem.loop_body23
+; GFX10-NEXT: .LBB13_13: ; %frem.loop_body
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: v_mov_b32_e32 v17, v13
; GFX10-NEXT: v_mov_b32_e32 v16, v12
@@ -16945,7 +16945,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX10-NEXT: v_mov_b32_e32 v12, v16
; GFX10-NEXT: v_mov_b32_e32 v19, s2
; GFX10-NEXT: v_mov_b32_e32 v13, v17
-; GFX10-NEXT: .LBB13_15: ; %frem.loop_exit24
+; GFX10-NEXT: .LBB13_15: ; %frem.loop_exit
; GFX10-NEXT: v_subrev_nc_u32_e32 v16, 25, v19
; GFX10-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
; GFX10-NEXT: v_mul_f64 v[14:15], v[12:13], v[14:15]
@@ -16986,7 +16986,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f64_e64 s2, |v[0:1]|, |v[4:5]|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB13_2
-; GFX11-NEXT: ; %bb.1: ; %frem.else
+; GFX11-NEXT: ; %bb.1: ; %frem.else16
; GFX11-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[0:1]|, |v[4:5]|
; GFX11-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -16996,7 +16996,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB13_8
; GFX11-NEXT: .LBB13_2:
; GFX11-NEXT: ; implicit-def: $vgpr8_vgpr9
-; GFX11-NEXT: .LBB13_3: ; %frem.compute
+; GFX11-NEXT: .LBB13_3: ; %frem.compute15
; GFX11-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v13, v[4:5]
; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v12, v[0:1]
@@ -17029,12 +17029,12 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB13_7
-; GFX11-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX11-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 26
; GFX11-NEXT: .p2align 6
-; GFX11-NEXT: .LBB13_5: ; %frem.loop_body
+; GFX11-NEXT: .LBB13_5: ; %frem.loop_body23
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
@@ -17054,7 +17054,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.6: ; %Flow51
; GFX11-NEXT: v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v10, v14
; GFX11-NEXT: v_mov_b32_e32 v11, v15
-; GFX11-NEXT: .LBB13_7: ; %frem.loop_exit
+; GFX11-NEXT: .LBB13_7: ; %frem.loop_exit24
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_subrev_nc_u32_e32 v14, 25, v17
; GFX11-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
@@ -17074,7 +17074,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: v_cmp_ngt_f64_e64 s2, |v[2:3]|, |v[6:7]|
; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX11-NEXT: s_cbranch_vccz .LBB13_10
-; GFX11-NEXT: ; %bb.9: ; %frem.else16
+; GFX11-NEXT: ; %bb.9: ; %frem.else
; GFX11-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[2:3]|, |v[6:7]|
; GFX11-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -17084,7 +17084,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_branch .LBB13_16
; GFX11-NEXT: .LBB13_10:
; GFX11-NEXT: ; implicit-def: $vgpr10_vgpr11
-; GFX11-NEXT: .LBB13_11: ; %frem.compute15
+; GFX11-NEXT: .LBB13_11: ; %frem.compute
; GFX11-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v15, v[6:7]
; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v14, v[2:3]
@@ -17117,12 +17117,12 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; GFX11-NEXT: s_cbranch_vccnz .LBB13_15
-; GFX11-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX11-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX11-NEXT: s_sub_i32 s2, s2, s3
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s2, 26
; GFX11-NEXT: .p2align 6
-; GFX11-NEXT: .LBB13_13: ; %frem.loop_body23
+; GFX11-NEXT: .LBB13_13: ; %frem.loop_body
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-NEXT: v_dual_mov_b32 v17, v13 :: v_dual_mov_b32 v16, v12
@@ -17142,7 +17142,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX11-NEXT: ; %bb.14: ; %Flow
; GFX11-NEXT: v_dual_mov_b32 v19, s2 :: v_dual_mov_b32 v12, v16
; GFX11-NEXT: v_mov_b32_e32 v13, v17
-; GFX11-NEXT: .LBB13_15: ; %frem.loop_exit24
+; GFX11-NEXT: .LBB13_15: ; %frem.loop_exit
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-NEXT: v_subrev_nc_u32_e32 v16, 25, v19
; GFX11-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
@@ -17187,7 +17187,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_ngt_f64_e64 s2, |v[0:1]|, |v[4:5]|
; GFX1150-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX1150-NEXT: s_cbranch_vccz .LBB13_2
-; GFX1150-NEXT: ; %bb.1: ; %frem.else
+; GFX1150-NEXT: ; %bb.1: ; %frem.else16
; GFX1150-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[0:1]|, |v[4:5]|
; GFX1150-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -17197,7 +17197,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB13_8
; GFX1150-NEXT: .LBB13_2:
; GFX1150-NEXT: ; implicit-def: $vgpr8_vgpr9
-; GFX1150-NEXT: .LBB13_3: ; %frem.compute
+; GFX1150-NEXT: .LBB13_3: ; %frem.compute15
; GFX1150-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; GFX1150-NEXT: v_frexp_exp_i32_f64_e32 v13, v[4:5]
; GFX1150-NEXT: v_frexp_exp_i32_f64_e32 v12, v[0:1]
@@ -17229,12 +17229,12 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v17
; GFX1150-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB13_7
-; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1150-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX1150-NEXT: s_sub_i32 s2, s2, s3
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s2, s2, 26
; GFX1150-NEXT: .p2align 6
-; GFX1150-NEXT: .LBB13_5: ; %frem.loop_body
+; GFX1150-NEXT: .LBB13_5: ; %frem.loop_body23
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
@@ -17254,7 +17254,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.6: ; %Flow51
; GFX1150-NEXT: v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v10, v14
; GFX1150-NEXT: v_mov_b32_e32 v11, v15
-; GFX1150-NEXT: .LBB13_7: ; %frem.loop_exit
+; GFX1150-NEXT: .LBB13_7: ; %frem.loop_exit24
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_subrev_nc_u32_e32 v14, 25, v17
; GFX1150-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
@@ -17274,7 +17274,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_ngt_f64_e64 s2, |v[2:3]|, |v[6:7]|
; GFX1150-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX1150-NEXT: s_cbranch_vccz .LBB13_10
-; GFX1150-NEXT: ; %bb.9: ; %frem.else16
+; GFX1150-NEXT: ; %bb.9: ; %frem.else
; GFX1150-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[2:3]|, |v[6:7]|
; GFX1150-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -17284,7 +17284,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: s_branch .LBB13_16
; GFX1150-NEXT: .LBB13_10:
; GFX1150-NEXT: ; implicit-def: $vgpr10_vgpr11
-; GFX1150-NEXT: .LBB13_11: ; %frem.compute15
+; GFX1150-NEXT: .LBB13_11: ; %frem.compute
; GFX1150-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; GFX1150-NEXT: v_frexp_exp_i32_f64_e32 v15, v[6:7]
; GFX1150-NEXT: v_frexp_exp_i32_f64_e32 v14, v[2:3]
@@ -17316,12 +17316,12 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v19
; GFX1150-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; GFX1150-NEXT: s_cbranch_vccnz .LBB13_15
-; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1150-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1150-NEXT: s_sub_i32 s2, s2, s3
; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1150-NEXT: s_add_i32 s2, s2, 26
; GFX1150-NEXT: .p2align 6
-; GFX1150-NEXT: .LBB13_13: ; %frem.loop_body23
+; GFX1150-NEXT: .LBB13_13: ; %frem.loop_body
; GFX1150-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1150-NEXT: v_dual_mov_b32 v17, v13 :: v_dual_mov_b32 v16, v12
@@ -17341,7 +17341,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1150-NEXT: ; %bb.14: ; %Flow
; GFX1150-NEXT: v_dual_mov_b32 v19, s2 :: v_dual_mov_b32 v12, v16
; GFX1150-NEXT: v_mov_b32_e32 v13, v17
-; GFX1150-NEXT: .LBB13_15: ; %frem.loop_exit24
+; GFX1150-NEXT: .LBB13_15: ; %frem.loop_exit
; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1150-NEXT: v_subrev_nc_u32_e32 v16, 25, v19
; GFX1150-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
@@ -17386,7 +17386,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_ngt_f64_e64 s2, |v[0:1]|, |v[4:5]|
; GFX1200-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX1200-NEXT: s_cbranch_vccz .LBB13_2
-; GFX1200-NEXT: ; %bb.1: ; %frem.else
+; GFX1200-NEXT: ; %bb.1: ; %frem.else16
; GFX1200-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[0:1]|, |v[4:5]|
; GFX1200-NEXT: v_and_b32_e32 v8, 0x80000000, v1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
@@ -17396,7 +17396,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB13_8
; GFX1200-NEXT: .LBB13_2:
; GFX1200-NEXT: ; implicit-def: $vgpr8_vgpr9
-; GFX1200-NEXT: .LBB13_3: ; %frem.compute
+; GFX1200-NEXT: .LBB13_3: ; %frem.compute15
; GFX1200-NEXT: v_frexp_mant_f64_e64 v[8:9], |v[0:1]|
; GFX1200-NEXT: v_frexp_exp_i32_f64_e32 v13, v[4:5]
; GFX1200-NEXT: v_frexp_exp_i32_f64_e32 v12, v[0:1]
@@ -17429,11 +17429,11 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v17
; GFX1200-NEXT: v_div_fixup_f64 v[12:13], v[12:13], v[8:9], 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB13_7
-; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body.preheader
+; GFX1200-NEXT: ; %bb.4: ; %frem.loop_body23.preheader
; GFX1200-NEXT: s_sub_co_i32 s2, s2, s3
; GFX1200-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1200-NEXT: s_add_co_i32 s2, s2, 26
-; GFX1200-NEXT: .LBB13_5: ; %frem.loop_body
+; GFX1200-NEXT: .LBB13_5: ; %frem.loop_body23
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX1200-NEXT: v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
@@ -17454,7 +17454,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.6: ; %Flow51
; GFX1200-NEXT: v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v10, v14
; GFX1200-NEXT: v_mov_b32_e32 v11, v15
-; GFX1200-NEXT: .LBB13_7: ; %frem.loop_exit
+; GFX1200-NEXT: .LBB13_7: ; %frem.loop_exit24
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_subrev_nc_u32_e32 v14, 25, v17
; GFX1200-NEXT: v_ldexp_f64 v[10:11], v[10:11], v14
@@ -17476,7 +17476,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_and_b32 vcc_lo, exec_lo, s2
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_cbranch_vccz .LBB13_10
-; GFX1200-NEXT: ; %bb.9: ; %frem.else16
+; GFX1200-NEXT: ; %bb.9: ; %frem.else
; GFX1200-NEXT: v_cmp_eq_f64_e64 vcc_lo, |v[2:3]|, |v[6:7]|
; GFX1200-NEXT: v_and_b32_e32 v10, 0x80000000, v3
; GFX1200-NEXT: s_wait_alu 0xfffd
@@ -17487,7 +17487,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: s_branch .LBB13_16
; GFX1200-NEXT: .LBB13_10:
; GFX1200-NEXT: ; implicit-def: $vgpr10_vgpr11
-; GFX1200-NEXT: .LBB13_11: ; %frem.compute15
+; GFX1200-NEXT: .LBB13_11: ; %frem.compute
; GFX1200-NEXT: v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
; GFX1200-NEXT: v_frexp_exp_i32_f64_e32 v15, v[6:7]
; GFX1200-NEXT: v_frexp_exp_i32_f64_e32 v14, v[2:3]
@@ -17520,11 +17520,11 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: v_cmp_gt_i32_e32 vcc_lo, 27, v19
; GFX1200-NEXT: v_div_fixup_f64 v[14:15], v[14:15], v[10:11], 1.0
; GFX1200-NEXT: s_cbranch_vccnz .LBB13_15
-; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body23.preheader
+; GFX1200-NEXT: ; %bb.12: ; %frem.loop_body.preheader
; GFX1200-NEXT: s_sub_co_i32 s2, s2, s3
; GFX1200-NEXT: s_wait_alu 0xfffe
; GFX1200-NEXT: s_add_co_i32 s2, s2, 26
-; GFX1200-NEXT: .LBB13_13: ; %frem.loop_body23
+; GFX1200-NEXT: .LBB13_13: ; %frem.loop_body
; GFX1200-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
; GFX1200-NEXT: v_dual_mov_b32 v17, v13 :: v_dual_mov_b32 v16, v12
@@ -17547,7 +17547,7 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; GFX1200-NEXT: ; %bb.14: ; %Flow
; GFX1200-NEXT: v_dual_mov_b32 v19, s2 :: v_dual_mov_b32 v12, v16
; GFX1200-NEXT: v_mov_b32_e32 v13, v17
-; GFX1200-NEXT: .LBB13_15: ; %frem.loop_exit24
+; GFX1200-NEXT: .LBB13_15: ; %frem.loop_exit
; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1200-NEXT: v_subrev_nc_u32_e32 v16, 25, v19
; GFX1200-NEXT: v_ldexp_f64 v[12:13], v[12:13], v16
diff --git a/llvm/test/CodeGen/AMDGPU/function-args.ll b/llvm/test/CodeGen/AMDGPU/function-args.ll
index 3c41cc4..5babe9f 100644
--- a/llvm/test/CodeGen/AMDGPU/function-args.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-args.ll
@@ -1111,15 +1111,11 @@ define void @void_func_v4i8(<4 x i8> %arg0) #0 {
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 0
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1190,18 +1186,15 @@ define void @void_func_v5i8(<5 x i8> %arg0) #0 {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v3.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 4
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: buffer_store_b8 v4, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v2
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1281,28 +1274,22 @@ define void @void_func_v8i8(<8 x i8> %arg0) #0 {
; GFX11-TRUE16-LABEL: void_func_v8i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, 0
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v5.h, v4.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v6.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v6.l, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.l, v1.h
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 0
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v6
-; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v0, v6
-; GFX11-TRUE16-NEXT: buffer_store_b64 v[1:2], off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b64 v[2:3], off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: void_func_v8i8:
@@ -1416,44 +1403,34 @@ define void @void_func_v16i8(<16 x i8> %arg0) #0 {
; GFX11-TRUE16-LABEL: void_func_v16i8:
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v15.l
-; GFX11-TRUE16-NEXT: v_and_b16 v13.h, 0xff, v14.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v13.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.l, 8, v15.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v13.l
; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, 0
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v13.h, v12.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.l, 8, v11.l
; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v12.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v14.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.l, 8, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v10.h, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v10.l, v9.h
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v10.h, v9.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v14.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v8.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v5.h, v4.h
-; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v4.l, v5.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v14.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v10.h, v15.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v12.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v10.l, v13.l
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v6.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v6.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v0.h, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v8.h, v2.l, v1.h
+; GFX11-TRUE16-NEXT: v_or_b16 v8.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v4, v14
-; GFX11-TRUE16-NEXT: v_or_b16 v14.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v14.l
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v0, v14
-; GFX11-TRUE16-NEXT: buffer_store_b128 v[5:8], off, s[0:3], 0
+; GFX11-TRUE16-NEXT: buffer_store_b128 v[8:11], off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: void_func_v16i8:
@@ -1649,78 +1626,59 @@ define void @void_func_v32i8(<32 x i8> %arg0) #0 {
; GFX11-TRUE16: ; %bb.0:
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: scratch_load_d16_u8 v31, off, s32
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, 0
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v15.l
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v13.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v32.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v10.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v9.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v3.h, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v32.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v12.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v11.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v10.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.h, 8, v9.l
+; GFX11-TRUE16-NEXT: v_and_b16 v8.l, 0xff, v8.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v7.l
; GFX11-TRUE16-NEXT: v_and_b16 v6.l, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v7.h, v6.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v12, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v5.h, v4.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_and_b16 v10.l, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v10.h, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v11.l, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v11.h, 8, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v12.l, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v12.h, 8, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v13.l, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v13.h, 8, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v14.l, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v14.h, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v15.l, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v15.h, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.h, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v17.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v16.l, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.h, 8, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v9.l, 0xff, v2.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v9.h, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v4.l, v5.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v9, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v6.l, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v10, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v0.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v32.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_and_b16 v5.l, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v6.h, v5.h
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v11, v32
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v32.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v8.l, 8, v23.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v20.l
-; GFX11-TRUE16-NEXT: v_or_b16 v14.l, v7.h, v6.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v32.l
-; GFX11-TRUE16-NEXT: v_and_b16 v8.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v4.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v6.h, v5.h
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v8.l, v7.h
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v6.l, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v11.l, v10.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.h, v12.l, v11.h
+; GFX11-TRUE16-NEXT: v_or_b16 v6.l, v13.l, v12.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v14.l, v13.h
+; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v15.l, v14.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v16.h, v15.h
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v16.l, v17.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v9.h
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 16
-; GFX11-TRUE16-NEXT: v_or_b16 v15.l, v6.h, v5.h
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v31.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v4.h, v7.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v13, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v5.l, v4.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v19.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v17.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v14, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v4.h, v8.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v8.h, v5.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v15, v32
-; GFX11-TRUE16-NEXT: v_or_b16 v32.h, v4.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v31.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v9, v32
+; GFX11-TRUE16-NEXT: v_or_b16 v7.h, v10.l, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v9.l, v8.h
; GFX11-TRUE16-NEXT: buffer_store_b128 v[4:7], off, s[0:3], 0
; GFX11-TRUE16-NEXT: s_mov_b64 s[0:1], 0
; GFX11-TRUE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
index f67ab18..234eaa8 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
@@ -4985,21 +4985,17 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v42, 1
; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v42, 0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v2
; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v42, 2
; GFX11-TRUE16-NEXT: global_store_b32 v[40:41], v0, off
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s33
; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 offset:4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v42, 2
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s33 offset:8 ; 4-byte Folded Reload
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
@@ -5243,18 +5239,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 4
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, 4
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, 0
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: global_store_b8 v[0:1], v4, off
-; GFX11-TRUE16-NEXT: global_store_b32 v[40:41], v2, off
+; GFX11-TRUE16-NEXT: global_store_b8 v[2:3], v4, off
+; GFX11-TRUE16-NEXT: global_store_b32 v[40:41], v0, off
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s33
; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 offset:4
@@ -5528,27 +5520,21 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v5.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v5.l, v3.h, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v4.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4
; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v0, v4
-; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v42, 1
-; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v42, 0
-; GFX11-TRUE16-NEXT: global_store_b64 v[40:41], v[1:2], off
+; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v3.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v2.l, v3.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: global_store_b64 v[40:41], v[3:4], off
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s33
; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s33 offset:4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v42, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v42, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s32, s33
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v42, 2
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
@@ -5994,73 +5980,53 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v14.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v13.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v12.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, 0
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v7.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v6.l
; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v1.h, v0.h
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v11.l
-; GFX11-TRUE16-NEXT: v_or_b16 v13.l, v3.h, v2.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v12.l
+; GFX11-TRUE16-NEXT: v_or_b16 v12.l, v3.h, v2.h
; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v10.l
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v9.l
; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v13, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v7.l
-; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v3.h, v2.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 8, v5.l
-; GFX11-TRUE16-NEXT: v_and_b16 v3.h, 0xff, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v3.l
-; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v3.h, v2.h
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v2.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v12.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v4, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v1.h, v0.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.l, v1.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v31.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v30.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v29.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v28.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v2, v12
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v17.l
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v0.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v27.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v1.h, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v26.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v25.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v24.l
-; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v16.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v2, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v0.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v23.l
-; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v1.h, v1.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v22.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v21.l
-; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v20.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v12
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v0.h, v0.l
-; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v19.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.h, v1.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v12.l
-; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v18.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_or_b16 v12.h, v0.h, v0.l
-; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v4.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v12.l
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.l, 0xff, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v3.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v11.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v11.l, v3.h, v2.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.h, v5.h, v4.h
+; GFX11-TRUE16-NEXT: v_or_b16 v10.l, v4.l, v5.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.h, v2.l, v3.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 8, v31.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v30.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v29.l
+; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v28.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v27.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v26.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v1.l
+; GFX11-TRUE16-NEXT: v_and_b16 v5.h, 0xff, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v3.h, v1.h, v0.h
+; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.h, v2.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v4.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v25.l
+; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v24.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 8, v23.l
+; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v22.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v21.l
+; GFX11-TRUE16-NEXT: v_and_b16 v4.h, 0xff, v20.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v19.l
+; GFX11-TRUE16-NEXT: v_and_b16 v6.h, 0xff, v18.l
+; GFX11-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v17.l
+; GFX11-TRUE16-NEXT: v_and_b16 v7.h, 0xff, v16.l
+; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v0.h, v0.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.h, v4.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v6.l
+; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v7.h, v7.l
+; GFX11-TRUE16-NEXT: v_or_b16 v9.l, v5.h, v5.l
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_store_b128 v[42:43], v[0:3], off
-; GFX11-TRUE16-NEXT: global_store_b128 v[40:41], v[5:8], off
+; GFX11-TRUE16-NEXT: global_store_b128 v[40:41], v[9:12], off
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s33
; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s33 offset:4
diff --git a/llvm/test/CodeGen/AMDGPU/global-constant.ll b/llvm/test/CodeGen/AMDGPU/global-constant.ll
index 866d3a1..b04602a 100644
--- a/llvm/test/CodeGen/AMDGPU/global-constant.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-constant.ll
@@ -12,21 +12,21 @@
; Non-R600 OSes use relocations.
; GCN-DEFAULT: s_getpc_b64 s[[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]]
-; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4
-; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+12
+; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], .Lprivate1@rel32@lo+4
+; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], .Lprivate1@rel32@hi+12
; GCN-DEFAULT: s_getpc_b64 s[[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]]
-; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4
-; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+12
+; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], .Lprivate2@rel32@lo+4
+; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], .Lprivate2@rel32@hi+12
; MESA uses absolute relocations.
-; GCN-MESA: s_add_u32 s2, private1@abs32@lo, s4
-; GCN-MESA: s_addc_u32 s3, private1@abs32@hi, s5
+; GCN-MESA: s_add_u32 s2, .Lprivate1@abs32@lo, s4
+; GCN-MESA: s_addc_u32 s3, .Lprivate1@abs32@hi, s5
; PAL uses absolute relocations.
-; GCN-PAL: s_add_u32 s2, private1@abs32@lo, s4
-; GCN-PAL: s_addc_u32 s3, private1@abs32@hi, s5
-; GCN-PAL: s_add_u32 s4, private2@abs32@lo, s4
-; GCN-PAL: s_addc_u32 s5, private2@abs32@hi, s5
+; GCN-PAL: s_add_u32 s2, .Lprivate1@abs32@lo, s4
+; GCN-PAL: s_addc_u32 s3, .Lprivate1@abs32@hi, s5
+; GCN-PAL: s_add_u32 s4, .Lprivate2@abs32@lo, s4
+; GCN-PAL: s_addc_u32 s5, .Lprivate2@abs32@hi, s5
; R600-LABEL: private_test
define amdgpu_kernel void @private_test(i32 %index, ptr addrspace(1) %out) {
diff --git a/llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll b/llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
index b8cfcbf..6d55e79 100644
--- a/llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
@@ -14,8 +14,8 @@
; CHECK-LABEL: private_test:
; CHECK: s_getpc_b64 s[[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]]
-; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], private@rel32@lo+8
-; CHECK: s_addc_u32 s[[ADDR_HI:[0-9]+]], s[[PC_HI]], private@rel32@hi+16
+; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], .Lprivate@rel32@lo+8
+; CHECK: s_addc_u32 s[[ADDR_HI:[0-9]+]], s[[PC_HI]], .Lprivate@rel32@hi+16
; CHECK: s_load_dword s{{[0-9]+}}, s[[[ADDR_LO]]:[[ADDR_HI]]]
define amdgpu_kernel void @private_test(ptr addrspace(1) %out) {
%ptr = getelementptr [256 x i32], ptr addrspace(1) @private, i32 0, i32 1
@@ -153,7 +153,7 @@ define amdgpu_kernel void @external_w_init_test(ptr addrspace(1) %out) {
ret void
}
-; CHECK: .local private
+; CHECK: .local .Lprivate
; CHECK: .local internal
; CHECK: .weak linkonce
; CHECK: .weak weak
diff --git a/llvm/test/CodeGen/AMDGPU/idot4u.ll b/llvm/test/CodeGen/AMDGPU/idot4u.ll
index 049663a..f80d50b 100644
--- a/llvm/test/CodeGen/AMDGPU/idot4u.ll
+++ b/llvm/test/CodeGen/AMDGPU/idot4u.ll
@@ -2730,18 +2730,15 @@ define amdgpu_kernel void @udot4_acc8_vecMul(ptr addrspace(1) %src1,
; GFX11-DL-TRUE16-NEXT: v_lshrrev_b16 v1.h, 8, v4.l
; GFX11-DL-TRUE16-NEXT: v_mad_u16 v0.l, v3.l, v4.l, v0.l
; GFX11-DL-TRUE16-NEXT: v_mul_lo_u16 v2.l, v2.l, v6.l
-; GFX11-DL-TRUE16-NEXT: v_mov_b16_e32 v6.l, 0
+; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-DL-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l
; GFX11-DL-TRUE16-NEXT: v_mul_lo_u16 v0.h, v0.h, v1.h
-; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-DL-TRUE16-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
-; GFX11-DL-TRUE16-NEXT: v_mov_b16_e32 v7.h, v6.l
-; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-DL-TRUE16-NEXT: v_lshlrev_b16 v7.l, 8, v0.h
+; GFX11-DL-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v0.h
+; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-DL-TRUE16-NEXT: v_or_b16 v6.h, v1.l, v2.l
-; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-DL-TRUE16-NEXT: v_or_b32_e32 v1, v7, v6
-; GFX11-DL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-DL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v6
; GFX11-DL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-DL-TRUE16-NEXT: v_add_nc_u16 v0.l, v0.l, v1.l
; GFX11-DL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll b/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
index 63e9eef..66b7958 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
@@ -315,7 +315,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align16(ptr ad
; FUNC-LABEL: {{^}}test_memcpy_const_string_align4:
; SI: s_getpc_b64
-; SI: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, hello.align4@rel32@lo+4
+; SI: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, .Lhello.align4@rel32@lo+4
; SI: s_addc_u32
; SI-DAG: s_load_dwordx8
; SI-DAG: s_load_dwordx2
diff --git a/llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll b/llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
index 5ff2d82..2509497 100644
--- a/llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
+++ b/llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
@@ -5,8 +5,8 @@ declare dso_local void @main()
define dso_local void @naked() naked "frame-pointer"="all" {
; CHECK-LABEL: naked:
-; CHECK: naked$local:
-; CHECK-NEXT: .type naked$local,@function
+; CHECK: .Lnaked$local:
+; CHECK-NEXT: .type .Lnaked$local,@function
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_getpc_b64 s[16:17]
@@ -19,8 +19,8 @@ define dso_local void @naked() naked "frame-pointer"="all" {
define dso_local void @normal() "frame-pointer"="all" {
; CHECK-LABEL: normal:
-; CHECK: normal$local:
-; CHECK-NEXT: .type normal$local,@function
+; CHECK: .Lnormal$local:
+; CHECK-NEXT: .type .Lnormal$local,@function
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s16, s33
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
index c8fee5d..7cbe5de 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
@@ -119,9 +119,10 @@ body: |
; CHECK: [[R32:%[0-9]+]]:_(s32) = G_SUB [[COUNT]], [[BITDIFF]]
%2(s16) = G_CTLZ %1
- ; CHECK: [[SHIFTEDR:%[0-9]+]]:_(s32) = G_SHL [[R32]], [[BITDIFF]]
- ; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDR]], [[BITDIFF]]
- ; CHECK: $r0 = COPY [[R]]
+ ; LIBCALLS: [[SHIFTEDR:%[0-9]+]]:_(s32) = G_SHL [[R32]], [[BITDIFF]]
+ ; LIBCALLS: [[R:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDR]], [[BITDIFF]]
+ ; LIBCALLS: $r0 = COPY [[R]]
+ ; CLZ: $r0 = COPY [[R32]]
%3(s32) = G_SEXT %2(s16)
$r0 = COPY %3(s32)
BX_RET 14, $noreg, implicit $r0
diff --git a/llvm/test/CodeGen/LoongArch/calling-conv-half.ll b/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
index d111cf2..50f7d40 100644
--- a/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
+++ b/llvm/test/CodeGen/LoongArch/calling-conv-half.ll
@@ -284,7 +284,6 @@ define i32 @caller_half_in_fregs() nounwind {
; LA64S-NEXT: addi.d $sp, $sp, -16
; LA64S-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64S-NEXT: lu12i.w $a0, -12
-; LA64S-NEXT: lu32i.d $a0, 0
; LA64S-NEXT: movgr2fr.w $fa0, $a0
; LA64S-NEXT: ori $a0, $zero, 1
; LA64S-NEXT: ori $a1, $zero, 2
@@ -326,7 +325,6 @@ define i32 @caller_half_in_fregs() nounwind {
; LA64F-LP64D-NEXT: addi.d $sp, $sp, -16
; LA64F-LP64D-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64F-LP64D-NEXT: lu12i.w $a0, -12
-; LA64F-LP64D-NEXT: lu32i.d $a0, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa0, $a0
; LA64F-LP64D-NEXT: ori $a0, $zero, 1
; LA64F-LP64D-NEXT: ori $a1, $zero, 2
@@ -368,7 +366,6 @@ define i32 @caller_half_in_fregs() nounwind {
; LA64D-LP64D-NEXT: addi.d $sp, $sp, -16
; LA64D-LP64D-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64D-LP64D-NEXT: lu12i.w $a0, -12
-; LA64D-LP64D-NEXT: lu32i.d $a0, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa0, $a0
; LA64D-LP64D-NEXT: ori $a0, $zero, 1
; LA64D-LP64D-NEXT: ori $a1, $zero, 2
@@ -688,32 +685,23 @@ define i32 @caller_half_in_gregs() nounwind {
; LA64S-NEXT: addi.d $sp, $sp, -16
; LA64S-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64S-NEXT: lu12i.w $a1, -12
+; LA64S-NEXT: movgr2fr.w $fa1, $a1
; LA64S-NEXT: ori $a0, $a1, 2176
+; LA64S-NEXT: lu12i.w $a2, -13
+; LA64S-NEXT: ori $a2, $a2, 3072
+; LA64S-NEXT: movgr2fr.w $fa0, $a2
; LA64S-NEXT: ori $a2, $a1, 512
-; LA64S-NEXT: ori $a3, $a1, 1024
-; LA64S-NEXT: ori $a4, $a1, 1280
-; LA64S-NEXT: ori $a5, $a1, 1536
-; LA64S-NEXT: ori $a6, $a1, 1792
-; LA64S-NEXT: ori $a7, $a1, 2048
-; LA64S-NEXT: lu32i.d $a1, 0
-; LA64S-NEXT: movgr2fr.w $fa1, $a1
-; LA64S-NEXT: lu12i.w $a1, -13
-; LA64S-NEXT: ori $a1, $a1, 3072
-; LA64S-NEXT: lu32i.d $a1, 0
-; LA64S-NEXT: movgr2fr.w $fa0, $a1
-; LA64S-NEXT: lu32i.d $a2, 0
; LA64S-NEXT: movgr2fr.w $fa2, $a2
-; LA64S-NEXT: lu32i.d $a3, 0
-; LA64S-NEXT: movgr2fr.w $fa3, $a3
-; LA64S-NEXT: lu32i.d $a4, 0
-; LA64S-NEXT: movgr2fr.w $fa4, $a4
-; LA64S-NEXT: lu32i.d $a5, 0
-; LA64S-NEXT: movgr2fr.w $fa5, $a5
-; LA64S-NEXT: lu32i.d $a0, 0
-; LA64S-NEXT: lu32i.d $a6, 0
-; LA64S-NEXT: movgr2fr.w $fa6, $a6
-; LA64S-NEXT: lu32i.d $a7, 0
-; LA64S-NEXT: movgr2fr.w $fa7, $a7
+; LA64S-NEXT: ori $a2, $a1, 1024
+; LA64S-NEXT: movgr2fr.w $fa3, $a2
+; LA64S-NEXT: ori $a2, $a1, 1280
+; LA64S-NEXT: movgr2fr.w $fa4, $a2
+; LA64S-NEXT: ori $a2, $a1, 1536
+; LA64S-NEXT: movgr2fr.w $fa5, $a2
+; LA64S-NEXT: ori $a2, $a1, 1792
+; LA64S-NEXT: movgr2fr.w $fa6, $a2
+; LA64S-NEXT: ori $a1, $a1, 2048
+; LA64S-NEXT: movgr2fr.w $fa7, $a1
; LA64S-NEXT: ori $a1, $zero, 10
; LA64S-NEXT: pcaddu18i $ra, %call36(callee_half_in_gregs)
; LA64S-NEXT: jirl $ra, $ra, 0
@@ -730,22 +718,14 @@ define i32 @caller_half_in_gregs() nounwind {
; LA64F-LP64S-NEXT: lu12i.w $a1, -12
; LA64F-LP64S-NEXT: ori $t0, $a1, 2176
; LA64F-LP64S-NEXT: lu32i.d $t0, 0
+; LA64F-LP64S-NEXT: lu12i.w $a0, -13
+; LA64F-LP64S-NEXT: ori $a0, $a0, 3072
; LA64F-LP64S-NEXT: ori $a2, $a1, 512
; LA64F-LP64S-NEXT: ori $a3, $a1, 1024
; LA64F-LP64S-NEXT: ori $a4, $a1, 1280
; LA64F-LP64S-NEXT: ori $a5, $a1, 1536
; LA64F-LP64S-NEXT: ori $a6, $a1, 1792
; LA64F-LP64S-NEXT: ori $a7, $a1, 2048
-; LA64F-LP64S-NEXT: lu32i.d $a1, 0
-; LA64F-LP64S-NEXT: lu12i.w $a0, -13
-; LA64F-LP64S-NEXT: ori $a0, $a0, 3072
-; LA64F-LP64S-NEXT: lu32i.d $a0, 0
-; LA64F-LP64S-NEXT: lu32i.d $a2, 0
-; LA64F-LP64S-NEXT: lu32i.d $a3, 0
-; LA64F-LP64S-NEXT: lu32i.d $a4, 0
-; LA64F-LP64S-NEXT: lu32i.d $a5, 0
-; LA64F-LP64S-NEXT: lu32i.d $a6, 0
-; LA64F-LP64S-NEXT: lu32i.d $a7, 0
; LA64F-LP64S-NEXT: st.w $t0, $sp, 0
; LA64F-LP64S-NEXT: pcaddu18i $ra, %call36(callee_half_in_gregs)
; LA64F-LP64S-NEXT: jirl $ra, $ra, 0
@@ -758,32 +738,23 @@ define i32 @caller_half_in_gregs() nounwind {
; LA64F-LP64D-NEXT: addi.d $sp, $sp, -16
; LA64F-LP64D-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64F-LP64D-NEXT: lu12i.w $a1, -12
+; LA64F-LP64D-NEXT: movgr2fr.w $fa1, $a1
; LA64F-LP64D-NEXT: ori $a0, $a1, 2176
+; LA64F-LP64D-NEXT: lu12i.w $a2, -13
+; LA64F-LP64D-NEXT: ori $a2, $a2, 3072
+; LA64F-LP64D-NEXT: movgr2fr.w $fa0, $a2
; LA64F-LP64D-NEXT: ori $a2, $a1, 512
-; LA64F-LP64D-NEXT: ori $a3, $a1, 1024
-; LA64F-LP64D-NEXT: ori $a4, $a1, 1280
-; LA64F-LP64D-NEXT: ori $a5, $a1, 1536
-; LA64F-LP64D-NEXT: ori $a6, $a1, 1792
-; LA64F-LP64D-NEXT: ori $a7, $a1, 2048
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa1, $a1
-; LA64F-LP64D-NEXT: lu12i.w $a1, -13
-; LA64F-LP64D-NEXT: ori $a1, $a1, 3072
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa0, $a1
-; LA64F-LP64D-NEXT: lu32i.d $a2, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa2, $a2
-; LA64F-LP64D-NEXT: lu32i.d $a3, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa3, $a3
-; LA64F-LP64D-NEXT: lu32i.d $a4, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa4, $a4
-; LA64F-LP64D-NEXT: lu32i.d $a5, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa5, $a5
-; LA64F-LP64D-NEXT: lu32i.d $a0, 0
-; LA64F-LP64D-NEXT: lu32i.d $a6, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa6, $a6
-; LA64F-LP64D-NEXT: lu32i.d $a7, 0
-; LA64F-LP64D-NEXT: movgr2fr.w $fa7, $a7
+; LA64F-LP64D-NEXT: ori $a2, $a1, 1024
+; LA64F-LP64D-NEXT: movgr2fr.w $fa3, $a2
+; LA64F-LP64D-NEXT: ori $a2, $a1, 1280
+; LA64F-LP64D-NEXT: movgr2fr.w $fa4, $a2
+; LA64F-LP64D-NEXT: ori $a2, $a1, 1536
+; LA64F-LP64D-NEXT: movgr2fr.w $fa5, $a2
+; LA64F-LP64D-NEXT: ori $a2, $a1, 1792
+; LA64F-LP64D-NEXT: movgr2fr.w $fa6, $a2
+; LA64F-LP64D-NEXT: ori $a1, $a1, 2048
+; LA64F-LP64D-NEXT: movgr2fr.w $fa7, $a1
; LA64F-LP64D-NEXT: ori $a1, $zero, 10
; LA64F-LP64D-NEXT: pcaddu18i $ra, %call36(callee_half_in_gregs)
; LA64F-LP64D-NEXT: jirl $ra, $ra, 0
@@ -800,22 +771,14 @@ define i32 @caller_half_in_gregs() nounwind {
; LA64D-LP64S-NEXT: lu12i.w $a1, -12
; LA64D-LP64S-NEXT: ori $t0, $a1, 2176
; LA64D-LP64S-NEXT: lu32i.d $t0, 0
+; LA64D-LP64S-NEXT: lu12i.w $a0, -13
+; LA64D-LP64S-NEXT: ori $a0, $a0, 3072
; LA64D-LP64S-NEXT: ori $a2, $a1, 512
; LA64D-LP64S-NEXT: ori $a3, $a1, 1024
; LA64D-LP64S-NEXT: ori $a4, $a1, 1280
; LA64D-LP64S-NEXT: ori $a5, $a1, 1536
; LA64D-LP64S-NEXT: ori $a6, $a1, 1792
; LA64D-LP64S-NEXT: ori $a7, $a1, 2048
-; LA64D-LP64S-NEXT: lu32i.d $a1, 0
-; LA64D-LP64S-NEXT: lu12i.w $a0, -13
-; LA64D-LP64S-NEXT: ori $a0, $a0, 3072
-; LA64D-LP64S-NEXT: lu32i.d $a0, 0
-; LA64D-LP64S-NEXT: lu32i.d $a2, 0
-; LA64D-LP64S-NEXT: lu32i.d $a3, 0
-; LA64D-LP64S-NEXT: lu32i.d $a4, 0
-; LA64D-LP64S-NEXT: lu32i.d $a5, 0
-; LA64D-LP64S-NEXT: lu32i.d $a6, 0
-; LA64D-LP64S-NEXT: lu32i.d $a7, 0
; LA64D-LP64S-NEXT: st.w $t0, $sp, 0
; LA64D-LP64S-NEXT: pcaddu18i $ra, %call36(callee_half_in_gregs)
; LA64D-LP64S-NEXT: jirl $ra, $ra, 0
@@ -828,32 +791,23 @@ define i32 @caller_half_in_gregs() nounwind {
; LA64D-LP64D-NEXT: addi.d $sp, $sp, -16
; LA64D-LP64D-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; LA64D-LP64D-NEXT: lu12i.w $a1, -12
+; LA64D-LP64D-NEXT: movgr2fr.w $fa1, $a1
; LA64D-LP64D-NEXT: ori $a0, $a1, 2176
+; LA64D-LP64D-NEXT: lu12i.w $a2, -13
+; LA64D-LP64D-NEXT: ori $a2, $a2, 3072
+; LA64D-LP64D-NEXT: movgr2fr.w $fa0, $a2
; LA64D-LP64D-NEXT: ori $a2, $a1, 512
-; LA64D-LP64D-NEXT: ori $a3, $a1, 1024
-; LA64D-LP64D-NEXT: ori $a4, $a1, 1280
-; LA64D-LP64D-NEXT: ori $a5, $a1, 1536
-; LA64D-LP64D-NEXT: ori $a6, $a1, 1792
-; LA64D-LP64D-NEXT: ori $a7, $a1, 2048
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa1, $a1
-; LA64D-LP64D-NEXT: lu12i.w $a1, -13
-; LA64D-LP64D-NEXT: ori $a1, $a1, 3072
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa0, $a1
-; LA64D-LP64D-NEXT: lu32i.d $a2, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa2, $a2
-; LA64D-LP64D-NEXT: lu32i.d $a3, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa3, $a3
-; LA64D-LP64D-NEXT: lu32i.d $a4, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa4, $a4
-; LA64D-LP64D-NEXT: lu32i.d $a5, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa5, $a5
-; LA64D-LP64D-NEXT: lu32i.d $a0, 0
-; LA64D-LP64D-NEXT: lu32i.d $a6, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa6, $a6
-; LA64D-LP64D-NEXT: lu32i.d $a7, 0
-; LA64D-LP64D-NEXT: movgr2fr.w $fa7, $a7
+; LA64D-LP64D-NEXT: ori $a2, $a1, 1024
+; LA64D-LP64D-NEXT: movgr2fr.w $fa3, $a2
+; LA64D-LP64D-NEXT: ori $a2, $a1, 1280
+; LA64D-LP64D-NEXT: movgr2fr.w $fa4, $a2
+; LA64D-LP64D-NEXT: ori $a2, $a1, 1536
+; LA64D-LP64D-NEXT: movgr2fr.w $fa5, $a2
+; LA64D-LP64D-NEXT: ori $a2, $a1, 1792
+; LA64D-LP64D-NEXT: movgr2fr.w $fa6, $a2
+; LA64D-LP64D-NEXT: ori $a1, $a1, 2048
+; LA64D-LP64D-NEXT: movgr2fr.w $fa7, $a1
; LA64D-LP64D-NEXT: ori $a1, $zero, 10
; LA64D-LP64D-NEXT: pcaddu18i $ra, %call36(callee_half_in_gregs)
; LA64D-LP64D-NEXT: jirl $ra, $ra, 0
@@ -1231,28 +1185,20 @@ define i32 @caller_half_on_stack() nounwind {
; LA64S-NEXT: ori $t0, $a0, 3200
; LA64S-NEXT: lu32i.d $t0, 0
; LA64S-NEXT: ori $a1, $a0, 2304
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa0, $a1
; LA64S-NEXT: ori $a1, $a0, 2432
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa1, $a1
; LA64S-NEXT: ori $a1, $a0, 2560
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa2, $a1
; LA64S-NEXT: ori $a1, $a0, 2688
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa3, $a1
; LA64S-NEXT: ori $a1, $a0, 2816
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa4, $a1
; LA64S-NEXT: ori $a1, $a0, 2944
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa5, $a1
; LA64S-NEXT: ori $a1, $a0, 3072
-; LA64S-NEXT: lu32i.d $a1, 0
; LA64S-NEXT: movgr2fr.w $fa6, $a1
; LA64S-NEXT: ori $a0, $a0, 3136
-; LA64S-NEXT: lu32i.d $a0, 0
; LA64S-NEXT: movgr2fr.w $fa7, $a0
; LA64S-NEXT: ori $a0, $zero, 1
; LA64S-NEXT: ori $a1, $zero, 2
@@ -1323,28 +1269,20 @@ define i32 @caller_half_on_stack() nounwind {
; LA64F-LP64D-NEXT: ori $t0, $a0, 3200
; LA64F-LP64D-NEXT: lu32i.d $t0, 0
; LA64F-LP64D-NEXT: ori $a1, $a0, 2304
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa0, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 2432
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa1, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 2560
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa2, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 2688
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa3, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 2816
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa4, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 2944
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa5, $a1
; LA64F-LP64D-NEXT: ori $a1, $a0, 3072
-; LA64F-LP64D-NEXT: lu32i.d $a1, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa6, $a1
; LA64F-LP64D-NEXT: ori $a0, $a0, 3136
-; LA64F-LP64D-NEXT: lu32i.d $a0, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa7, $a0
; LA64F-LP64D-NEXT: ori $a0, $zero, 1
; LA64F-LP64D-NEXT: ori $a1, $zero, 2
@@ -1415,28 +1353,20 @@ define i32 @caller_half_on_stack() nounwind {
; LA64D-LP64D-NEXT: ori $t0, $a0, 3200
; LA64D-LP64D-NEXT: lu32i.d $t0, 0
; LA64D-LP64D-NEXT: ori $a1, $a0, 2304
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa0, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 2432
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa1, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 2560
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa2, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 2688
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa3, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 2816
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa4, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 2944
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa5, $a1
; LA64D-LP64D-NEXT: ori $a1, $a0, 3072
-; LA64D-LP64D-NEXT: lu32i.d $a1, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa6, $a1
; LA64D-LP64D-NEXT: ori $a0, $a0, 3136
-; LA64D-LP64D-NEXT: lu32i.d $a0, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa7, $a0
; LA64D-LP64D-NEXT: ori $a0, $zero, 1
; LA64D-LP64D-NEXT: ori $a1, $zero, 2
@@ -1493,7 +1423,6 @@ define half @callee_half_ret() nounwind {
; LA64S: # %bb.0:
; LA64S-NEXT: lu12i.w $a0, -13
; LA64S-NEXT: ori $a0, $a0, 3072
-; LA64S-NEXT: lu32i.d $a0, 0
; LA64S-NEXT: movgr2fr.w $fa0, $a0
; LA64S-NEXT: ret
;
@@ -1501,14 +1430,12 @@ define half @callee_half_ret() nounwind {
; LA64F-LP64S: # %bb.0:
; LA64F-LP64S-NEXT: lu12i.w $a0, -13
; LA64F-LP64S-NEXT: ori $a0, $a0, 3072
-; LA64F-LP64S-NEXT: lu32i.d $a0, 0
; LA64F-LP64S-NEXT: ret
;
; LA64F-LP64D-LABEL: callee_half_ret:
; LA64F-LP64D: # %bb.0:
; LA64F-LP64D-NEXT: lu12i.w $a0, -13
; LA64F-LP64D-NEXT: ori $a0, $a0, 3072
-; LA64F-LP64D-NEXT: lu32i.d $a0, 0
; LA64F-LP64D-NEXT: movgr2fr.w $fa0, $a0
; LA64F-LP64D-NEXT: ret
;
@@ -1516,14 +1443,12 @@ define half @callee_half_ret() nounwind {
; LA64D-LP64S: # %bb.0:
; LA64D-LP64S-NEXT: lu12i.w $a0, -13
; LA64D-LP64S-NEXT: ori $a0, $a0, 3072
-; LA64D-LP64S-NEXT: lu32i.d $a0, 0
; LA64D-LP64S-NEXT: ret
;
; LA64D-LP64D-LABEL: callee_half_ret:
; LA64D-LP64D: # %bb.0:
; LA64D-LP64D-NEXT: lu12i.w $a0, -13
; LA64D-LP64D-NEXT: ori $a0, $a0, 3072
-; LA64D-LP64D-NEXT: lu32i.d $a0, 0
; LA64D-LP64D-NEXT: movgr2fr.w $fa0, $a0
; LA64D-LP64D-NEXT: ret
ret half 1.0
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
index a6e3f79..0d0fb21 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
@@ -76,7 +76,6 @@ define float @float_fsub_acquire(ptr %p) nounwind {
; LA64F: # %bb.0:
; LA64F-NEXT: fld.s $fa0, $a0, 0
; LA64F-NEXT: lu12i.w $a1, -264192
-; LA64F-NEXT: lu32i.d $a1, 0
; LA64F-NEXT: movgr2fr.w $fa1, $a1
; LA64F-NEXT: .p2align 4, , 16
; LA64F-NEXT: .LBB1_1: # %atomicrmw.start
@@ -641,7 +640,6 @@ define float @float_fsub_release(ptr %p) nounwind {
; LA64F: # %bb.0:
; LA64F-NEXT: fld.s $fa0, $a0, 0
; LA64F-NEXT: lu12i.w $a1, -264192
-; LA64F-NEXT: lu32i.d $a1, 0
; LA64F-NEXT: movgr2fr.w $fa1, $a1
; LA64F-NEXT: .p2align 4, , 16
; LA64F-NEXT: .LBB9_1: # %atomicrmw.start
@@ -1206,7 +1204,6 @@ define float @float_fsub_acq_rel(ptr %p) nounwind {
; LA64F: # %bb.0:
; LA64F-NEXT: fld.s $fa0, $a0, 0
; LA64F-NEXT: lu12i.w $a1, -264192
-; LA64F-NEXT: lu32i.d $a1, 0
; LA64F-NEXT: movgr2fr.w $fa1, $a1
; LA64F-NEXT: .p2align 4, , 16
; LA64F-NEXT: .LBB17_1: # %atomicrmw.start
@@ -1771,7 +1768,6 @@ define float @float_fsub_seq_cst(ptr %p) nounwind {
; LA64F: # %bb.0:
; LA64F-NEXT: fld.s $fa0, $a0, 0
; LA64F-NEXT: lu12i.w $a1, -264192
-; LA64F-NEXT: lu32i.d $a1, 0
; LA64F-NEXT: movgr2fr.w $fa1, $a1
; LA64F-NEXT: .p2align 4, , 16
; LA64F-NEXT: .LBB25_1: # %atomicrmw.start
@@ -2336,7 +2332,6 @@ define float @float_fsub_monotonic(ptr %p) nounwind {
; LA64F: # %bb.0:
; LA64F-NEXT: fld.s $fa0, $a0, 0
; LA64F-NEXT: lu12i.w $a1, -264192
-; LA64F-NEXT: lu32i.d $a1, 0
; LA64F-NEXT: movgr2fr.w $fa1, $a1
; LA64F-NEXT: .p2align 4, , 16
; LA64F-NEXT: .LBB33_1: # %atomicrmw.start
diff --git a/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll b/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
index edfa0b9..2ee6e08 100644
--- a/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
@@ -31,7 +31,7 @@ define i32 @varalloca() local_unnamed_addr {
; CHECK-ASM32-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-ASM32-NEXT: .byte 0x00 # Version = 0
; CHECK-ASM32-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-ASM32-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-ASM32-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-ASM32-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-ASM32-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-ASM32-NEXT: # -IsFloatingPointPresent
@@ -70,7 +70,7 @@ define i32 @varalloca() local_unnamed_addr {
; CHECK-ASM64-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-ASM64-NEXT: .byte 0x00 # Version = 0
; CHECK-ASM64-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-ASM64-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-ASM64-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-ASM64-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-ASM64-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-ASM64-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
index 42bd478..8e4e0d3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
@@ -49,7 +49,7 @@ entry:
; COMMON: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
@@ -70,7 +70,7 @@ entry:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-redzone-boundary.mir b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-redzone-boundary.mir
index 3d4b5a7..7041315 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-redzone-boundary.mir
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-redzone-boundary.mir
@@ -25,7 +25,7 @@ body: |
; CHECK: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
- ; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+ ; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
@@ -43,7 +43,7 @@ body: |
; CHECK: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
- ; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+ ; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
index 83e413a..f03a6c0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
@@ -82,7 +82,7 @@ declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
@@ -107,7 +107,7 @@ declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
index 8c0a589..26506f8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
@@ -15,7 +15,7 @@ entry:
;CHECK-ASM: .vbyte 4, 0x00000000 # Traceback table begin
;CHECK-ASM-NEXT: .byte 0x00 # Version = 0
;CHECK-ASM-NEXT: .byte 0x09 # Language = CPlusPlus
-;CHECK-ASM-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+;CHECK-ASM-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
;CHECK-ASM-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
;CHECK-ASM-NEXT: # -HasControlledStorage, -IsTOCless
;CHECK-ASM-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
index ce97f37..2827155 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
@@ -138,7 +138,7 @@ entry:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
@@ -167,7 +167,7 @@ entry:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
@@ -190,7 +190,7 @@ entry:
; COMMON: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x22 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # +IsFloatingPointPresent
@@ -217,7 +217,7 @@ entry:
; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
-; COMMON-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; COMMON-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
; COMMON-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/PowerPC/aix-exception.ll b/llvm/test/CodeGen/PowerPC/aix-exception.ll
index 5035d8e..5b364ef 100644
--- a/llvm/test/CodeGen/PowerPC/aix-exception.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-exception.ll
@@ -113,7 +113,7 @@ eh.resume: ; preds = %catch.dispatch
; ASM: .vbyte 4, 0x00000000 # Traceback table begin
; ASM: .byte 0x00 # Version = 0
; ASM: .byte 0x09 # Language = CPlusPlus
-; ASM: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; ASM: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; ASM: # +HasTraceBackTableOffset, -IsInternalProcedure
; ASM: # -HasControlledStorage, -IsTOCless
; ASM: # -IsFloatingPointPresent
diff --git a/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
index 7bde1b7..7cdfd51 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
@@ -7,12 +7,15 @@ define i128 @test_add_i128(i128 %arg1, i128 %arg2) nounwind {
; X64: # %bb.0:
; X64-NEXT: movq %rdx, %rax
; X64-NEXT: addq %rdi, %rax
+; X64-NEXT: setb %dl
+; X64-NEXT: cmpb $1, %dl
; X64-NEXT: adcq %rsi, %rcx
; X64-NEXT: movq %rcx, %rdx
; X64-NEXT: retq
;
; X86-LABEL: test_add_i128:
; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -21,8 +24,14 @@ define i128 @test_add_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: adcl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, (%eax)
; X86-NEXT: movl %edx, 4(%eax)
@@ -30,6 +39,7 @@ define i128 @test_add_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl %edi, 12(%eax)
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%ret = add i128 %arg1, %arg2
ret i128 %ret
@@ -46,6 +56,8 @@ define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: setb %cl
+; X86-NEXT: cmpb $1, %cl
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
%ret = add i64 %arg1, %arg2
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
index ec9db78..dae2ad6 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir
@@ -157,8 +157,8 @@ body: |
; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[UV]], [[UV2]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
; X86-NEXT: RET 0
@@ -192,8 +192,8 @@ body: |
; X86-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[UV]], [[UV2]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
; X86-NEXT: RET 0
@@ -219,8 +219,8 @@ body: |
; X64-NEXT: [[DEF1:%[0-9]+]]:_(s128) = IMPLICIT_DEF
; X64-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF]](s128)
; X64-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF1]](s128)
- ; X64-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]
- ; X64-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
+ ; X64-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[UV]], [[UV2]]
+ ; X64-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
; X64-NEXT: $rax = COPY [[UADDO]](s64)
; X64-NEXT: $rdx = COPY [[UADDE]](s64)
; X64-NEXT: RET 0
@@ -230,10 +230,10 @@ body: |
; X86-NEXT: [[DEF1:%[0-9]+]]:_(s128) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s128)
; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s128)
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV4]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV5]], [[UADDO1]]
- ; X86-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV2]], [[UV6]], [[UADDE1]]
- ; X86-NEXT: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV3]], [[UV7]], [[UADDE3]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[UV]], [[UV4]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[UV1]], [[UV5]], [[UADDO1]]
+ ; X86-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s8) = G_UADDE [[UV2]], [[UV6]], [[UADDE1]]
+ ; X86-NEXT: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s8) = G_UADDE [[UV3]], [[UV7]], [[UADDE3]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)
; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDE2]](s32), [[UADDE4]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir
index 19fe5b8..470a30fd 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir
@@ -25,6 +25,7 @@ body: |
; X64-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[CTLZ]], [[C1]]
; X64-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C]]
; X64-NEXT: RET 0, implicit [[AND1]](s64)
+ ;
; X86-LABEL: name: test_ctlz35
; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[COPY]](s64)
@@ -46,12 +47,15 @@ body: |
; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C2]](s32), [[C]](s32)
; X86-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
; X86-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV1]](s64)
- ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV6]], [[UV8]]
- ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV7]], [[UV9]], [[USUBO1]]
+ ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV6]], [[UV8]]
+ ; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[USUBO1]](s8)
+ ; X86-NEXT: [[ZEXT2:%[0-9]+]]:_(s8) = G_ZEXT [[TRUNC1]](s1)
+ ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV7]], [[UV9]], [[ZEXT2]]
+ ; X86-NEXT: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[USUBE1]](s8)
; X86-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
- ; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s35) = G_TRUNC [[MV2]](s64)
- ; X86-NEXT: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC1]](s35)
- ; X86-NEXT: RET 0, implicit [[ZEXT2]](s64)
+ ; X86-NEXT: [[TRUNC3:%[0-9]+]]:_(s35) = G_TRUNC [[MV2]](s64)
+ ; X86-NEXT: [[ZEXT3:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC3]](s35)
+ ; X86-NEXT: RET 0, implicit [[ZEXT3]](s64)
%0(s64) = COPY $rdx
%1:_(s35) = G_TRUNC %0(s64)
%2:_(s35) = G_CTLZ %1
@@ -97,6 +101,7 @@ body: |
; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[DEF]](s64)
; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTLZ]](s64)
; X64-NEXT: RET 0, implicit [[COPY]](s64)
+ ;
; X86-LABEL: name: test_ctlz64
; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir
index ee2b9ee..ac3bf33 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir
@@ -157,8 +157,8 @@ body: |
; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
- ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
- ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
+ ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV]], [[UV2]]
+ ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
; X86-NEXT: RET 0
@@ -192,8 +192,8 @@ body: |
; X86-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
- ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
- ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
+ ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV]], [[UV2]]
+ ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
; X86-NEXT: RET 0
@@ -219,8 +219,8 @@ body: |
; X64-NEXT: [[DEF1:%[0-9]+]]:_(s128) = IMPLICIT_DEF
; X64-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF]](s128)
; X64-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF1]](s128)
- ; X64-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
- ; X64-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
+ ; X64-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV]], [[UV2]]
+ ; X64-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
; X64-NEXT: $rax = COPY [[USUBO]](s64)
; X64-NEXT: $rdx = COPY [[USUBE]](s64)
; X64-NEXT: RET 0
@@ -230,10 +230,10 @@ body: |
; X86-NEXT: [[DEF1:%[0-9]+]]:_(s128) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s128)
; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s128)
- ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV4]]
- ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV5]], [[USUBO1]]
- ; X86-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV2]], [[UV6]], [[USUBE1]]
- ; X86-NEXT: [[USUBE4:%[0-9]+]]:_(s32), [[USUBE5:%[0-9]+]]:_(s1) = G_USUBE [[UV3]], [[UV7]], [[USUBE3]]
+ ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV]], [[UV4]]
+ ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV1]], [[UV5]], [[USUBO1]]
+ ; X86-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s8) = G_USUBE [[UV2]], [[UV6]], [[USUBE1]]
+ ; X86-NEXT: [[USUBE4:%[0-9]+]]:_(s32), [[USUBE5:%[0-9]+]]:_(s8) = G_USUBE [[UV3]], [[UV7]], [[USUBE3]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBE2]](s32), [[USUBE4]](s32)
; X86-NEXT: $rax = COPY [[MV]](s64)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir
index 9807d13..57e729f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir
@@ -32,8 +32,8 @@ body: |
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(eq), [[OR]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[OR1]](s32)
; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C2]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[C]], [[C]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C2]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[C]], [[C]], [[UADDO1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[OR]](s32)
; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
; X86-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
@@ -97,8 +97,8 @@ body: |
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C1]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[C]], [[C]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C1]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[C]], [[C]], [[UADDO1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir
index e2d10423..f5d8477 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir
@@ -32,8 +32,8 @@ body: |
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(eq), [[OR]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[OR1]](s32)
; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C2]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[C]], [[C]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[CTTZ_ZERO_UNDEF]], [[C2]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[C]], [[C]], [[UADDO1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[OR]](s32)
; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
; X86-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
@@ -99,8 +99,8 @@ body: |
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[CTTZ]], [[C1]]
- ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[C]], [[C]], [[UADDO1]]
+ ; X86-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s8) = G_UADDO [[CTTZ]], [[C1]]
+ ; X86-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s8) = G_UADDE [[C]], [[C]], [[UADDO1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
diff --git a/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll b/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll
new file mode 100644
index 0000000..41d890b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s
+
+define i32 @test_01(ptr %p, i64 %len, i32 %x) {
+; CHECK-LABEL: test_01:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .LBB0_1: # %loop
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: subq %rax, %rsi
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: testb $1, %cl
+; CHECK-NEXT: jne .LBB0_4
+; CHECK-NEXT: # %bb.2: # %backedge
+; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
+; CHECK-NEXT: imulq $4, %rsi, %rcx
+; CHECK-NEXT: addq %rdi, %rcx
+; CHECK-NEXT: cmpl %edx, (%rcx)
+; CHECK-NEXT: sete %cl
+; CHECK-NEXT: testb $1, %cl
+; CHECK-NEXT: je .LBB0_1
+; CHECK-NEXT: # %bb.3: # %failure
+; CHECK-NEXT: .LBB0_4: # %exit
+; CHECK-NEXT: movl $-1, %eax
+; CHECK-NEXT: retq
+
+entry:
+ %scevgep = getelementptr i32, ptr %p, i64 -1
+ br label %loop
+
+loop: ; preds = %backedge, %entry
+ %iv = phi i64 [ %iv.next, %backedge ], [ %len, %entry ]
+ %iv.next = add i64 %iv, -1
+ %cond_1 = icmp eq i64 %iv, 0
+ br i1 %cond_1, label %exit, label %backedge
+
+backedge: ; preds = %loop
+ %scevgep1 = getelementptr i32, ptr %scevgep, i64 %iv
+ %loaded = load atomic i32, ptr %scevgep1 unordered, align 4
+ %cond_2 = icmp eq i32 %loaded, %x
+ br i1 %cond_2, label %failure, label %loop
+
+exit: ; preds = %loop
+ ret i32 -1
+
+failure:
+ unreachable
+}
+
diff --git a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir
index 8eac3eaf..76680ac 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir
@@ -29,8 +29,8 @@ body: |
bb.0 (%ir-block.0):
%0(s32) = IMPLICIT_DEF
%1(s32) = IMPLICIT_DEF
- %2(s1) = IMPLICIT_DEF
- %3(s32), %4(s1) = G_UADDE %0, %1, %2
+ %2(s8) = IMPLICIT_DEF
+ %3(s32), %4(s8) = G_UADDE %0, %1, %2
RET 0
...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir b/llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir
index 773813f..b85180f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir
@@ -27,25 +27,24 @@ body: |
bb.0 (%ir-block.0):
; X32-LABEL: name: test_add_i64
; X32: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
- ; X32: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
- ; X32: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
- ; X32: [[DEF3:%[0-9]+]]:gr32 = IMPLICIT_DEF
- ; X32: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[DEF]], [[DEF2]], implicit-def $eflags
- ; X32: [[COPY:%[0-9]+]]:gr32 = COPY $eflags
- ; X32: $eflags = COPY [[COPY]]
- ; X32: [[ADC32rr:%[0-9]+]]:gr32 = ADC32rr [[DEF1]], [[DEF3]], implicit-def $eflags, implicit $eflags
- ; X32: [[COPY1:%[0-9]+]]:gr32 = COPY $eflags
- ; X32: $eax = COPY [[ADD32rr]]
- ; X32: $edx = COPY [[ADC32rr]]
- ; X32: RET 0, implicit $eax, implicit $edx
+ ; X32-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
+ ; X32-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
+ ; X32-NEXT: [[DEF3:%[0-9]+]]:gr32 = IMPLICIT_DEF
+ ; X32-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[DEF]], [[DEF2]], implicit-def $eflags
+ ; X32-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+ ; X32-NEXT: CMP8ri [[SETCCr]], 1, implicit-def $eflags
+ ; X32-NEXT: [[ADC32rr:%[0-9]+]]:gr32 = ADC32rr [[DEF1]], [[DEF3]], implicit-def $eflags, implicit $eflags
+ ; X32-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+ ; X32-NEXT: $eax = COPY [[ADD32rr]]
+ ; X32-NEXT: $edx = COPY [[ADC32rr]]
+ ; X32-NEXT: RET 0, implicit $eax, implicit $edx
%0(s32) = IMPLICIT_DEF
%1(s32) = IMPLICIT_DEF
%2(s32) = IMPLICIT_DEF
%3(s32) = IMPLICIT_DEF
%9(s8) = G_CONSTANT i8 0
- %4(s1) = G_TRUNC %9(s8)
- %5(s32), %6(s1) = G_UADDE %0, %2, %4
- %7(s32), %8(s1) = G_UADDE %1, %3, %6
+ %5(s32), %6(s8) = G_UADDE %0, %2, %9
+ %7(s32), %8(s8) = G_UADDE %1, %3, %6
$eax = COPY %5(s32)
$edx = COPY %7(s32)
RET 0, implicit $eax, implicit $edx
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll b/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll
new file mode 100644
index 0000000..0cf1372
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel=1 -global-isel-abort=1 | FileCheck %s
+
+; Issue #120029
+define i16 @use_carry_bit(i16 %2) {
+; CHECK-LABEL: use_carry_bit:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movw $1, %ax
+; CHECK-NEXT: xorl %ecx, %ecx
+; CHECK-NEXT: addw %di, %ax
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: andl $1, %ecx
+; CHECK-NEXT: cmovnew %di, %ax
+; CHECK-NEXT: retq
+ %uadd = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 %2, i16 1)
+ %res = extractvalue { i16, i1 } %uadd, 0
+ %carry = extractvalue { i16, i1 } %uadd, 1
+ %ret = select i1 %carry, i16 %2, i16 %res
+ ret i16 %ret
+}
+
diff --git a/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
index 7a035f5..be75d7c 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
@@ -7,12 +7,15 @@ define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq %rdx, %rax
+; X64-NEXT: setb %dl
+; X64-NEXT: cmpb $1, %dl
; X64-NEXT: sbbq %rcx, %rsi
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i128:
; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -21,8 +24,14 @@ define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: setb %bl
+; X86-NEXT: cmpb $1, %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, (%eax)
; X86-NEXT: movl %edx, 4(%eax)
@@ -30,6 +39,7 @@ define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl %edi, 12(%eax)
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: retl
%ret = sub i128 %arg1, %arg2
ret i128 %ret
@@ -47,6 +57,8 @@ define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: setb %cl
+; X86-NEXT: cmpb $1, %cl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
%ret = sub i64 %arg1, %arg2
diff --git a/llvm/test/CodeGen/X86/pr49087.ll b/llvm/test/CodeGen/X86/pr49087.ll
deleted file mode 100644
index 1a29222..0000000
--- a/llvm/test/CodeGen/X86/pr49087.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -global-isel < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
-; XFAIL: *
-
-define i32 @test_01(ptr %p, i64 %len, i32 %x) {
-; CHECK-LABEL: test_01
-
-entry:
- %scevgep = getelementptr i32, ptr %p, i64 -1
- br label %loop
-
-loop: ; preds = %backedge, %entry
- %iv = phi i64 [ %iv.next, %backedge ], [ %len, %entry ]
- %iv.next = add i64 %iv, -1
- %cond_1 = icmp eq i64 %iv, 0
- br i1 %cond_1, label %exit, label %backedge
-
-backedge: ; preds = %loop
- %scevgep1 = getelementptr i32, ptr %scevgep, i64 %iv
- %loaded = load atomic i32, ptr %scevgep1 unordered, align 4
- %cond_2 = icmp eq i32 %loaded, %x
- br i1 %cond_2, label %failure, label %loop
-
-exit: ; preds = %loop
- ret i32 -1
-
-failure:
- unreachable
-}
-
diff --git a/llvm/test/DebugInfo/COFF/AArch64/codeview-sve.ll b/llvm/test/DebugInfo/COFF/AArch64/codeview-sve.ll
index 446a84d..ffdc80a 100644
--- a/llvm/test/DebugInfo/COFF/AArch64/codeview-sve.ll
+++ b/llvm/test/DebugInfo/COFF/AArch64/codeview-sve.ll
@@ -101,7 +101,7 @@
; CHECK-NEXT: LocalVariableAddrRange {
; CHECK-NEXT: OffsetStart: .text+0x0
; CHECK-NEXT: ISectStart: 0x0
-; CHECK-NEXT: Range: 0xBC
+; CHECK-NEXT: Range: 0xB8
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ProcEnd {
diff --git a/llvm/test/DebugInfo/XCOFF/empty.ll b/llvm/test/DebugInfo/XCOFF/empty.ll
index af2f74f..24655e5 100644
--- a/llvm/test/DebugInfo/XCOFF/empty.ll
+++ b/llvm/test/DebugInfo/XCOFF/empty.ll
@@ -61,7 +61,7 @@ entry:
; ASM32-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; ASM32-NEXT: .byte 0x00 # Version = 0
; ASM32-NEXT: .byte 0x09 # Language = CPlusPlus
-; ASM32-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; ASM32-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; ASM32-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; ASM32-NEXT: # -HasControlledStorage, -IsTOCless
; ASM32-NEXT: # -IsFloatingPointPresent
@@ -264,7 +264,7 @@ entry:
; ASM64-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; ASM64-NEXT: .byte 0x00 # Version = 0
; ASM64-NEXT: .byte 0x09 # Language = CPlusPlus
-; ASM64-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; ASM64-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; ASM64-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; ASM64-NEXT: # -HasControlledStorage, -IsTOCless
; ASM64-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/DebugInfo/XCOFF/explicit-section.ll b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
index 0ae9289..3bcc0f9 100644
--- a/llvm/test/DebugInfo/XCOFF/explicit-section.ll
+++ b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
@@ -65,7 +65,7 @@ entry:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
@@ -113,7 +113,7 @@ entry:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/DebugInfo/XCOFF/function-sections.ll b/llvm/test/DebugInfo/XCOFF/function-sections.ll
index 6a86ae6..0b7a03b 100644
--- a/llvm/test/DebugInfo/XCOFF/function-sections.ll
+++ b/llvm/test/DebugInfo/XCOFF/function-sections.ll
@@ -60,7 +60,7 @@ entry:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
@@ -95,7 +95,7 @@ entry:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
; CHECK-NEXT: .byte 0x09 # Language = CPlusPlus
-; CHECK-NEXT: .byte 0x20 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
+; CHECK-NEXT: .byte 0x20 # -IsGlobalLinkage, -IsOutOfLineEpilogOrPrologue
; CHECK-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
; CHECK-NEXT: # -HasControlledStorage, -IsTOCless
; CHECK-NEXT: # -IsFloatingPointPresent
diff --git a/llvm/test/Other/debugcounter-dce.ll b/llvm/test/Other/debugcounter-dce.ll
index 54d929f..3b1dfb4 100644
--- a/llvm/test/Other/debugcounter-dce.ll
+++ b/llvm/test/Other/debugcounter-dce.ll
@@ -1,8 +1,16 @@
; REQUIRES: asserts
-; RUN: opt -passes=dce -S -debug-counter=dce-transform=1-2 < %s | FileCheck %s
+; RUN: opt -passes=dce -S -debug-counter=dce-transform=1-2 < %s | FileCheck %s --check-prefixes=CHECK,NO-PRINT
+; RUN: opt -passes=dce -S -debug-counter=dce-transform=1-2 -print-debug-counter-queries < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT
;; Test that, with debug counters on, we will skip the first DCE opportunity, perform next 2,
;; and ignore all the others left.
+; NO-PRINT-NOT: DebugCounter
+; PRINT: DebugCounter dce-transform=0 skip
+; PRINT-NEXT: DebugCounter dce-transform=1 execute
+; PRINT-NEXT: DebugCounter dce-transform=2 execute
+; PRINT-NEXT: DebugCounter dce-transform=3 skip
+; PRINT-NEXT: DebugCounter dce-transform=4 skip
+
; CHECK-LABEL: @test
; CHECK-NEXT: %add1 = add i32 1, 2
; CHECK-NEXT: %sub1 = sub i32 %add1, 1
diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll b/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll
index d25d0f1..4c0f9db 100644
--- a/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll
+++ b/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll
@@ -380,9 +380,9 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX1:%.*]] = fpext half [[AX]] to float
; CHECK-NEXT: [[AY2:%.*]] = fpext half [[AY]] to float
; CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt float [[AX1]], [[AY2]]
-; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE19:.*]], label %[[FREM_ELSE20:.*]]
; CHECK: [[BB4:.*]]:
-; CHECK-NEXT: [[RET:%.*]] = phi half [ [[TMP38:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP29:%.*]], %[[FREM_ELSE]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi half [ [[TMP58:%.*]], %[[FREM_LOOP_EXIT28:.*]] ], [ [[TMP57:%.*]], %[[FREM_ELSE20]] ]
; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq half [[TMP2]], 0xH0000
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], half 0xH7E00, half [[RET]]
; CHECK-NEXT: [[TMP7:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
@@ -396,9 +396,9 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX16:%.*]] = fpext half [[AX14]] to float
; CHECK-NEXT: [[AY17:%.*]] = fpext half [[AY15]] to float
; CHECK-NEXT: [[TMP13:%.*]] = fcmp ogt float [[AX16]], [[AY17]]
-; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE19:.*]], label %[[FREM_ELSE20:.*]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
; CHECK: [[BB14:.*]]:
-; CHECK-NEXT: [[RET18:%.*]] = phi half [ [[TMP57:%.*]], %[[FREM_LOOP_EXIT28:.*]] ], [ [[TMP48:%.*]], %[[FREM_ELSE20]] ]
+; CHECK-NEXT: [[RET18:%.*]] = phi half [ [[TMP46:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP38:%.*]], %[[FREM_ELSE]] ]
; CHECK-NEXT: [[TMP15:%.*]] = fcmp ueq half [[TMP12]], 0xH0000
; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], half 0xH7E00, half [[RET18]]
; CHECK-NEXT: [[TMP17:%.*]] = call half @llvm.fabs.f16(half [[TMP11]])
@@ -408,12 +408,12 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: store <2 x half> [[R2]], ptr addrspace(1) [[OUT]], align 8
; CHECK-NEXT: ret void
; CHECK: [[FREM_COMPUTE]]:
-; CHECK-NEXT: [[TMP20:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX1]])
+; CHECK-NEXT: [[TMP20:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX16]])
; CHECK-NEXT: [[TMP21:%.*]] = extractvalue { float, i32 } [[TMP20]], 0
; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { float, i32 } [[TMP20]], 1
; CHECK-NEXT: [[EX:%.*]] = sub i32 [[TMP22]], 1
; CHECK-NEXT: [[AX3:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP21]], i32 11)
-; CHECK-NEXT: [[TMP23:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY2]])
+; CHECK-NEXT: [[TMP23:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY17]])
; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { float, i32 } [[TMP23]], 0
; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { float, i32 } [[TMP23]], 1
; CHECK-NEXT: [[EY:%.*]] = sub i32 [[TMP25]], 1
@@ -423,10 +423,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP26:%.*]] = icmp sgt i32 [[NB]], 11
; CHECK-NEXT: br i1 [[TMP26]], label %[[FREM_LOOP_BODY:.*]], label %[[FREM_LOOP_EXIT]]
; CHECK: [[FREM_ELSE]]:
-; CHECK-NEXT: [[TMP27:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP1]])
-; CHECK-NEXT: [[TMP28:%.*]] = fcmp oeq float [[AX1]], [[AY2]]
-; CHECK-NEXT: [[TMP29]] = select i1 [[TMP28]], half [[TMP27]], half [[TMP1]]
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP28:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP11]])
+; CHECK-NEXT: [[TMP29:%.*]] = fcmp oeq float [[AX16]], [[AY17]]
+; CHECK-NEXT: [[TMP38]] = select i1 [[TMP29]], half [[TMP28]], half [[TMP11]]
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_LOOP_BODY]]:
; CHECK-NEXT: [[NB_IV:%.*]] = phi i32 [ [[NB]], %[[FREM_COMPUTE]] ], [ [[NB_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
; CHECK-NEXT: [[AX_LOOP_PHI:%.*]] = phi float [ [[AX3]], %[[FREM_COMPUTE]] ], [ [[AX_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
@@ -456,15 +456,15 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX12:%.*]] = select i1 [[CLT10]], float [[AXP11]], float [[AX9]]
; CHECK-NEXT: [[AX13:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX12]], i32 [[EY]])
; CHECK-NEXT: [[TMP37:%.*]] = fptrunc float [[AX13]] to half
-; CHECK-NEXT: [[TMP38]] = call half @llvm.copysign.f16(half [[TMP37]], half [[TMP1]])
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP46]] = call half @llvm.copysign.f16(half [[TMP37]], half [[TMP11]])
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_COMPUTE19]]:
-; CHECK-NEXT: [[TMP39:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX16]])
+; CHECK-NEXT: [[TMP39:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX1]])
; CHECK-NEXT: [[TMP40:%.*]] = extractvalue { float, i32 } [[TMP39]], 0
; CHECK-NEXT: [[TMP41:%.*]] = extractvalue { float, i32 } [[TMP39]], 1
; CHECK-NEXT: [[EX21:%.*]] = sub i32 [[TMP41]], 1
; CHECK-NEXT: [[AX22:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP40]], i32 11)
-; CHECK-NEXT: [[TMP42:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY17]])
+; CHECK-NEXT: [[TMP42:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY2]])
; CHECK-NEXT: [[TMP43:%.*]] = extractvalue { float, i32 } [[TMP42]], 0
; CHECK-NEXT: [[TMP44:%.*]] = extractvalue { float, i32 } [[TMP42]], 1
; CHECK-NEXT: [[EY23:%.*]] = sub i32 [[TMP44]], 1
@@ -474,10 +474,10 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP45:%.*]] = icmp sgt i32 [[NB25]], 11
; CHECK-NEXT: br i1 [[TMP45]], label %[[FREM_LOOP_BODY27:.*]], label %[[FREM_LOOP_EXIT28]]
; CHECK: [[FREM_ELSE20]]:
-; CHECK-NEXT: [[TMP46:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP11]])
-; CHECK-NEXT: [[TMP47:%.*]] = fcmp oeq float [[AX16]], [[AY17]]
-; CHECK-NEXT: [[TMP48]] = select i1 [[TMP47]], half [[TMP46]], half [[TMP11]]
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP47:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP1]])
+; CHECK-NEXT: [[TMP48:%.*]] = fcmp oeq float [[AX1]], [[AY2]]
+; CHECK-NEXT: [[TMP57]] = select i1 [[TMP48]], half [[TMP47]], half [[TMP1]]
+; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[FREM_LOOP_BODY27]]:
; CHECK-NEXT: [[NB_IV29:%.*]] = phi i32 [ [[NB25]], %[[FREM_COMPUTE19]] ], [ [[NB_UPDATE37:%.*]], %[[FREM_LOOP_BODY27]] ]
; CHECK-NEXT: [[AX_LOOP_PHI30:%.*]] = phi float [ [[AX22]], %[[FREM_COMPUTE19]] ], [ [[AX_UPDATE36:%.*]], %[[FREM_LOOP_BODY27]] ]
@@ -507,8 +507,8 @@ define amdgpu_kernel void @frem_v2f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX45:%.*]] = select i1 [[CLT43]], float [[AXP44]], float [[AX42]]
; CHECK-NEXT: [[AX46:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX45]], i32 [[EY23]])
; CHECK-NEXT: [[TMP56:%.*]] = fptrunc float [[AX46]] to half
-; CHECK-NEXT: [[TMP57]] = call half @llvm.copysign.f16(half [[TMP56]], half [[TMP11]])
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP58]] = call half @llvm.copysign.f16(half [[TMP56]], half [[TMP1]])
+; CHECK-NEXT: br label %[[BB4]]
;
ptr addrspace(1) %in2) {
%gep2 = getelementptr <2 x half>, ptr addrspace(1) %in2, i32 4
@@ -532,9 +532,9 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX1:%.*]] = fpext half [[AX]] to float
; CHECK-NEXT: [[AY2:%.*]] = fpext half [[AY]] to float
; CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt float [[AX1]], [[AY2]]
-; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE85:.*]], label %[[FREM_ELSE86:.*]]
; CHECK: [[BB4:.*]]:
-; CHECK-NEXT: [[RET:%.*]] = phi half [ [[TMP58:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP49:%.*]], %[[FREM_ELSE]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi half [ [[TMP116:%.*]], %[[FREM_LOOP_EXIT94:.*]] ], [ [[TMP115:%.*]], %[[FREM_ELSE86]] ]
; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq half [[TMP2]], 0xH0000
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], half 0xH7E00, half [[RET]]
; CHECK-NEXT: [[TMP7:%.*]] = call half @llvm.fabs.f16(half [[TMP1]])
@@ -548,9 +548,9 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX16:%.*]] = fpext half [[AX14]] to float
; CHECK-NEXT: [[AY17:%.*]] = fpext half [[AY15]] to float
; CHECK-NEXT: [[TMP13:%.*]] = fcmp ogt float [[AX16]], [[AY17]]
-; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE19:.*]], label %[[FREM_ELSE20:.*]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE52:.*]], label %[[FREM_ELSE53:.*]]
; CHECK: [[BB14:.*]]:
-; CHECK-NEXT: [[RET18:%.*]] = phi half [ [[TMP77:%.*]], %[[FREM_LOOP_EXIT28:.*]] ], [ [[TMP68:%.*]], %[[FREM_ELSE20]] ]
+; CHECK-NEXT: [[RET18:%.*]] = phi half [ [[TMP104:%.*]], %[[FREM_LOOP_EXIT61:.*]] ], [ [[TMP96:%.*]], %[[FREM_ELSE53]] ]
; CHECK-NEXT: [[TMP15:%.*]] = fcmp ueq half [[TMP12]], 0xH0000
; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], half 0xH7E00, half [[RET18]]
; CHECK-NEXT: [[TMP17:%.*]] = call half @llvm.fabs.f16(half [[TMP11]])
@@ -564,9 +564,9 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX49:%.*]] = fpext half [[AX47]] to float
; CHECK-NEXT: [[AY50:%.*]] = fpext half [[AY48]] to float
; CHECK-NEXT: [[TMP23:%.*]] = fcmp ogt float [[AX49]], [[AY50]]
-; CHECK-NEXT: br i1 [[TMP23]], label %[[FREM_COMPUTE52:.*]], label %[[FREM_ELSE53:.*]]
+; CHECK-NEXT: br i1 [[TMP23]], label %[[FREM_COMPUTE19:.*]], label %[[FREM_ELSE20:.*]]
; CHECK: [[BB24:.*]]:
-; CHECK-NEXT: [[RET51:%.*]] = phi half [ [[TMP96:%.*]], %[[FREM_LOOP_EXIT61:.*]] ], [ [[TMP87:%.*]], %[[FREM_ELSE53]] ]
+; CHECK-NEXT: [[RET51:%.*]] = phi half [ [[TMP85:%.*]], %[[FREM_LOOP_EXIT28:.*]] ], [ [[TMP77:%.*]], %[[FREM_ELSE20]] ]
; CHECK-NEXT: [[TMP25:%.*]] = fcmp ueq half [[TMP22]], 0xH0000
; CHECK-NEXT: [[TMP26:%.*]] = select i1 [[TMP25]], half 0xH7E00, half [[RET51]]
; CHECK-NEXT: [[TMP27:%.*]] = call half @llvm.fabs.f16(half [[TMP21]])
@@ -580,9 +580,9 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX82:%.*]] = fpext half [[AX80]] to float
; CHECK-NEXT: [[AY83:%.*]] = fpext half [[AY81]] to float
; CHECK-NEXT: [[TMP33:%.*]] = fcmp ogt float [[AX82]], [[AY83]]
-; CHECK-NEXT: br i1 [[TMP33]], label %[[FREM_COMPUTE85:.*]], label %[[FREM_ELSE86:.*]]
+; CHECK-NEXT: br i1 [[TMP33]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
; CHECK: [[BB34:.*]]:
-; CHECK-NEXT: [[RET84:%.*]] = phi half [ [[TMP115:%.*]], %[[FREM_LOOP_EXIT94:.*]] ], [ [[TMP106:%.*]], %[[FREM_ELSE86]] ]
+; CHECK-NEXT: [[RET84:%.*]] = phi half [ [[TMP66:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP58:%.*]], %[[FREM_ELSE]] ]
; CHECK-NEXT: [[TMP35:%.*]] = fcmp ueq half [[TMP32]], 0xH0000
; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], half 0xH7E00, half [[RET84]]
; CHECK-NEXT: [[TMP37:%.*]] = call half @llvm.fabs.f16(half [[TMP31]])
@@ -592,12 +592,12 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: store <4 x half> [[R2]], ptr addrspace(1) [[OUT]], align 16
; CHECK-NEXT: ret void
; CHECK: [[FREM_COMPUTE]]:
-; CHECK-NEXT: [[TMP40:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX1]])
+; CHECK-NEXT: [[TMP40:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX82]])
; CHECK-NEXT: [[TMP41:%.*]] = extractvalue { float, i32 } [[TMP40]], 0
; CHECK-NEXT: [[TMP42:%.*]] = extractvalue { float, i32 } [[TMP40]], 1
; CHECK-NEXT: [[EX:%.*]] = sub i32 [[TMP42]], 1
; CHECK-NEXT: [[AX3:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP41]], i32 11)
-; CHECK-NEXT: [[TMP43:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY2]])
+; CHECK-NEXT: [[TMP43:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY83]])
; CHECK-NEXT: [[TMP44:%.*]] = extractvalue { float, i32 } [[TMP43]], 0
; CHECK-NEXT: [[TMP45:%.*]] = extractvalue { float, i32 } [[TMP43]], 1
; CHECK-NEXT: [[EY:%.*]] = sub i32 [[TMP45]], 1
@@ -607,10 +607,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP46:%.*]] = icmp sgt i32 [[NB]], 11
; CHECK-NEXT: br i1 [[TMP46]], label %[[FREM_LOOP_BODY:.*]], label %[[FREM_LOOP_EXIT]]
; CHECK: [[FREM_ELSE]]:
-; CHECK-NEXT: [[TMP47:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP1]])
-; CHECK-NEXT: [[TMP48:%.*]] = fcmp oeq float [[AX1]], [[AY2]]
-; CHECK-NEXT: [[TMP49]] = select i1 [[TMP48]], half [[TMP47]], half [[TMP1]]
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP48:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP31]])
+; CHECK-NEXT: [[TMP49:%.*]] = fcmp oeq float [[AX82]], [[AY83]]
+; CHECK-NEXT: [[TMP58]] = select i1 [[TMP49]], half [[TMP48]], half [[TMP31]]
+; CHECK-NEXT: br label %[[BB34]]
; CHECK: [[FREM_LOOP_BODY]]:
; CHECK-NEXT: [[NB_IV:%.*]] = phi i32 [ [[NB]], %[[FREM_COMPUTE]] ], [ [[NB_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
; CHECK-NEXT: [[AX_LOOP_PHI:%.*]] = phi float [ [[AX3]], %[[FREM_COMPUTE]] ], [ [[AX_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
@@ -640,15 +640,15 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX12:%.*]] = select i1 [[CLT10]], float [[AXP11]], float [[AX9]]
; CHECK-NEXT: [[AX13:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX12]], i32 [[EY]])
; CHECK-NEXT: [[TMP57:%.*]] = fptrunc float [[AX13]] to half
-; CHECK-NEXT: [[TMP58]] = call half @llvm.copysign.f16(half [[TMP57]], half [[TMP1]])
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP66]] = call half @llvm.copysign.f16(half [[TMP57]], half [[TMP31]])
+; CHECK-NEXT: br label %[[BB34]]
; CHECK: [[FREM_COMPUTE19]]:
-; CHECK-NEXT: [[TMP59:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX16]])
+; CHECK-NEXT: [[TMP59:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX49]])
; CHECK-NEXT: [[TMP60:%.*]] = extractvalue { float, i32 } [[TMP59]], 0
; CHECK-NEXT: [[TMP61:%.*]] = extractvalue { float, i32 } [[TMP59]], 1
; CHECK-NEXT: [[EX21:%.*]] = sub i32 [[TMP61]], 1
; CHECK-NEXT: [[AX22:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP60]], i32 11)
-; CHECK-NEXT: [[TMP62:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY17]])
+; CHECK-NEXT: [[TMP62:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY50]])
; CHECK-NEXT: [[TMP63:%.*]] = extractvalue { float, i32 } [[TMP62]], 0
; CHECK-NEXT: [[TMP64:%.*]] = extractvalue { float, i32 } [[TMP62]], 1
; CHECK-NEXT: [[EY23:%.*]] = sub i32 [[TMP64]], 1
@@ -658,10 +658,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP65:%.*]] = icmp sgt i32 [[NB25]], 11
; CHECK-NEXT: br i1 [[TMP65]], label %[[FREM_LOOP_BODY27:.*]], label %[[FREM_LOOP_EXIT28]]
; CHECK: [[FREM_ELSE20]]:
-; CHECK-NEXT: [[TMP66:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP11]])
-; CHECK-NEXT: [[TMP67:%.*]] = fcmp oeq float [[AX16]], [[AY17]]
-; CHECK-NEXT: [[TMP68]] = select i1 [[TMP67]], half [[TMP66]], half [[TMP11]]
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP67:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP21]])
+; CHECK-NEXT: [[TMP68:%.*]] = fcmp oeq float [[AX49]], [[AY50]]
+; CHECK-NEXT: [[TMP77]] = select i1 [[TMP68]], half [[TMP67]], half [[TMP21]]
+; CHECK-NEXT: br label %[[BB24]]
; CHECK: [[FREM_LOOP_BODY27]]:
; CHECK-NEXT: [[NB_IV29:%.*]] = phi i32 [ [[NB25]], %[[FREM_COMPUTE19]] ], [ [[NB_UPDATE37:%.*]], %[[FREM_LOOP_BODY27]] ]
; CHECK-NEXT: [[AX_LOOP_PHI30:%.*]] = phi float [ [[AX22]], %[[FREM_COMPUTE19]] ], [ [[AX_UPDATE36:%.*]], %[[FREM_LOOP_BODY27]] ]
@@ -691,15 +691,15 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX45:%.*]] = select i1 [[CLT43]], float [[AXP44]], float [[AX42]]
; CHECK-NEXT: [[AX46:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX45]], i32 [[EY23]])
; CHECK-NEXT: [[TMP76:%.*]] = fptrunc float [[AX46]] to half
-; CHECK-NEXT: [[TMP77]] = call half @llvm.copysign.f16(half [[TMP76]], half [[TMP11]])
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP85]] = call half @llvm.copysign.f16(half [[TMP76]], half [[TMP21]])
+; CHECK-NEXT: br label %[[BB24]]
; CHECK: [[FREM_COMPUTE52]]:
-; CHECK-NEXT: [[TMP78:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX49]])
+; CHECK-NEXT: [[TMP78:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX16]])
; CHECK-NEXT: [[TMP79:%.*]] = extractvalue { float, i32 } [[TMP78]], 0
; CHECK-NEXT: [[TMP80:%.*]] = extractvalue { float, i32 } [[TMP78]], 1
; CHECK-NEXT: [[EX54:%.*]] = sub i32 [[TMP80]], 1
; CHECK-NEXT: [[AX55:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP79]], i32 11)
-; CHECK-NEXT: [[TMP81:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY50]])
+; CHECK-NEXT: [[TMP81:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY17]])
; CHECK-NEXT: [[TMP82:%.*]] = extractvalue { float, i32 } [[TMP81]], 0
; CHECK-NEXT: [[TMP83:%.*]] = extractvalue { float, i32 } [[TMP81]], 1
; CHECK-NEXT: [[EY56:%.*]] = sub i32 [[TMP83]], 1
@@ -709,10 +709,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP84:%.*]] = icmp sgt i32 [[NB58]], 11
; CHECK-NEXT: br i1 [[TMP84]], label %[[FREM_LOOP_BODY60:.*]], label %[[FREM_LOOP_EXIT61]]
; CHECK: [[FREM_ELSE53]]:
-; CHECK-NEXT: [[TMP85:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP21]])
-; CHECK-NEXT: [[TMP86:%.*]] = fcmp oeq float [[AX49]], [[AY50]]
-; CHECK-NEXT: [[TMP87]] = select i1 [[TMP86]], half [[TMP85]], half [[TMP21]]
-; CHECK-NEXT: br label %[[BB24]]
+; CHECK-NEXT: [[TMP86:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP11]])
+; CHECK-NEXT: [[TMP87:%.*]] = fcmp oeq float [[AX16]], [[AY17]]
+; CHECK-NEXT: [[TMP96]] = select i1 [[TMP87]], half [[TMP86]], half [[TMP11]]
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_LOOP_BODY60]]:
; CHECK-NEXT: [[NB_IV62:%.*]] = phi i32 [ [[NB58]], %[[FREM_COMPUTE52]] ], [ [[NB_UPDATE70:%.*]], %[[FREM_LOOP_BODY60]] ]
; CHECK-NEXT: [[AX_LOOP_PHI63:%.*]] = phi float [ [[AX55]], %[[FREM_COMPUTE52]] ], [ [[AX_UPDATE69:%.*]], %[[FREM_LOOP_BODY60]] ]
@@ -742,15 +742,15 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX78:%.*]] = select i1 [[CLT76]], float [[AXP77]], float [[AX75]]
; CHECK-NEXT: [[AX79:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX78]], i32 [[EY56]])
; CHECK-NEXT: [[TMP95:%.*]] = fptrunc float [[AX79]] to half
-; CHECK-NEXT: [[TMP96]] = call half @llvm.copysign.f16(half [[TMP95]], half [[TMP21]])
-; CHECK-NEXT: br label %[[BB24]]
+; CHECK-NEXT: [[TMP104]] = call half @llvm.copysign.f16(half [[TMP95]], half [[TMP11]])
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_COMPUTE85]]:
-; CHECK-NEXT: [[TMP97:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX82]])
+; CHECK-NEXT: [[TMP97:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX1]])
; CHECK-NEXT: [[TMP98:%.*]] = extractvalue { float, i32 } [[TMP97]], 0
; CHECK-NEXT: [[TMP99:%.*]] = extractvalue { float, i32 } [[TMP97]], 1
; CHECK-NEXT: [[EX87:%.*]] = sub i32 [[TMP99]], 1
; CHECK-NEXT: [[AX88:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP98]], i32 11)
-; CHECK-NEXT: [[TMP100:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY83]])
+; CHECK-NEXT: [[TMP100:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY2]])
; CHECK-NEXT: [[TMP101:%.*]] = extractvalue { float, i32 } [[TMP100]], 0
; CHECK-NEXT: [[TMP102:%.*]] = extractvalue { float, i32 } [[TMP100]], 1
; CHECK-NEXT: [[EY89:%.*]] = sub i32 [[TMP102]], 1
@@ -760,10 +760,10 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP103:%.*]] = icmp sgt i32 [[NB91]], 11
; CHECK-NEXT: br i1 [[TMP103]], label %[[FREM_LOOP_BODY93:.*]], label %[[FREM_LOOP_EXIT94]]
; CHECK: [[FREM_ELSE86]]:
-; CHECK-NEXT: [[TMP104:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP31]])
-; CHECK-NEXT: [[TMP105:%.*]] = fcmp oeq float [[AX82]], [[AY83]]
-; CHECK-NEXT: [[TMP106]] = select i1 [[TMP105]], half [[TMP104]], half [[TMP31]]
-; CHECK-NEXT: br label %[[BB34]]
+; CHECK-NEXT: [[TMP105:%.*]] = call half @llvm.copysign.f16(half 0xH0000, half [[TMP1]])
+; CHECK-NEXT: [[TMP106:%.*]] = fcmp oeq float [[AX1]], [[AY2]]
+; CHECK-NEXT: [[TMP115]] = select i1 [[TMP106]], half [[TMP105]], half [[TMP1]]
+; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[FREM_LOOP_BODY93]]:
; CHECK-NEXT: [[NB_IV95:%.*]] = phi i32 [ [[NB91]], %[[FREM_COMPUTE85]] ], [ [[NB_UPDATE103:%.*]], %[[FREM_LOOP_BODY93]] ]
; CHECK-NEXT: [[AX_LOOP_PHI96:%.*]] = phi float [ [[AX88]], %[[FREM_COMPUTE85]] ], [ [[AX_UPDATE102:%.*]], %[[FREM_LOOP_BODY93]] ]
@@ -793,8 +793,8 @@ define amdgpu_kernel void @frem_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX111:%.*]] = select i1 [[CLT109]], float [[AXP110]], float [[AX108]]
; CHECK-NEXT: [[AX112:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX111]], i32 [[EY89]])
; CHECK-NEXT: [[TMP114:%.*]] = fptrunc float [[AX112]] to half
-; CHECK-NEXT: [[TMP115]] = call half @llvm.copysign.f16(half [[TMP114]], half [[TMP31]])
-; CHECK-NEXT: br label %[[BB34]]
+; CHECK-NEXT: [[TMP116]] = call half @llvm.copysign.f16(half [[TMP114]], half [[TMP1]])
+; CHECK-NEXT: br label %[[BB4]]
;
ptr addrspace(1) %in2) {
%gep2 = getelementptr <4 x half>, ptr addrspace(1) %in2, i32 4
@@ -816,9 +816,9 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
; CHECK-NEXT: [[AY:%.*]] = call float @llvm.fabs.f32(float [[TMP2]])
; CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt float [[AX]], [[AY]]
-; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
; CHECK: [[BB4:.*]]:
-; CHECK-NEXT: [[RET:%.*]] = phi float [ [[TMP37:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP29:%.*]], %[[FREM_ELSE]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi float [ [[TMP56:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP55:%.*]], %[[FREM_ELSE16]] ]
; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq float [[TMP2]], 0.000000e+00
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float 0x7FF8000000000000, float [[RET]]
; CHECK-NEXT: [[TMP7:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
@@ -830,9 +830,9 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX12:%.*]] = call float @llvm.fabs.f32(float [[TMP11]])
; CHECK-NEXT: [[AY13:%.*]] = call float @llvm.fabs.f32(float [[TMP12]])
; CHECK-NEXT: [[TMP13:%.*]] = fcmp ogt float [[AX12]], [[AY13]]
-; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
; CHECK: [[BB14:.*]]:
-; CHECK-NEXT: [[RET14:%.*]] = phi float [ [[TMP55:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP47:%.*]], %[[FREM_ELSE16]] ]
+; CHECK-NEXT: [[RET14:%.*]] = phi float [ [[TMP45:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP37:%.*]], %[[FREM_ELSE]] ]
; CHECK-NEXT: [[TMP15:%.*]] = fcmp ueq float [[TMP12]], 0.000000e+00
; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], float 0x7FF8000000000000, float [[RET14]]
; CHECK-NEXT: [[TMP17:%.*]] = call float @llvm.fabs.f32(float [[TMP11]])
@@ -842,12 +842,12 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: store <2 x float> [[R2]], ptr addrspace(1) [[OUT]], align 8
; CHECK-NEXT: ret void
; CHECK: [[FREM_COMPUTE]]:
-; CHECK-NEXT: [[TMP20:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX]])
+; CHECK-NEXT: [[TMP20:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX12]])
; CHECK-NEXT: [[TMP21:%.*]] = extractvalue { float, i32 } [[TMP20]], 0
; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { float, i32 } [[TMP20]], 1
; CHECK-NEXT: [[EX:%.*]] = sub i32 [[TMP22]], 1
; CHECK-NEXT: [[AX1:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP21]], i32 12)
-; CHECK-NEXT: [[TMP23:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY]])
+; CHECK-NEXT: [[TMP23:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY13]])
; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { float, i32 } [[TMP23]], 0
; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { float, i32 } [[TMP23]], 1
; CHECK-NEXT: [[EY:%.*]] = sub i32 [[TMP25]], 1
@@ -857,10 +857,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP26:%.*]] = icmp sgt i32 [[NB]], 12
; CHECK-NEXT: br i1 [[TMP26]], label %[[FREM_LOOP_BODY:.*]], label %[[FREM_LOOP_EXIT]]
; CHECK: [[FREM_ELSE]]:
-; CHECK-NEXT: [[TMP27:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP1]])
-; CHECK-NEXT: [[TMP28:%.*]] = fcmp oeq float [[AX]], [[AY]]
-; CHECK-NEXT: [[TMP29]] = select i1 [[TMP28]], float [[TMP27]], float [[TMP1]]
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP28:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP11]])
+; CHECK-NEXT: [[TMP29:%.*]] = fcmp oeq float [[AX12]], [[AY13]]
+; CHECK-NEXT: [[TMP37]] = select i1 [[TMP29]], float [[TMP28]], float [[TMP11]]
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_LOOP_BODY]]:
; CHECK-NEXT: [[NB_IV:%.*]] = phi i32 [ [[NB]], %[[FREM_COMPUTE]] ], [ [[NB_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
; CHECK-NEXT: [[AX_LOOP_PHI:%.*]] = phi float [ [[AX1]], %[[FREM_COMPUTE]] ], [ [[AX_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
@@ -889,15 +889,15 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP9:%.*]] = fadd float [[AX7]], [[AY2]]
; CHECK-NEXT: [[AX10:%.*]] = select i1 [[CLT8]], float [[AXP9]], float [[AX7]]
; CHECK-NEXT: [[AX11:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX10]], i32 [[EY]])
-; CHECK-NEXT: [[TMP37]] = call float @llvm.copysign.f32(float [[AX11]], float [[TMP1]])
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP45]] = call float @llvm.copysign.f32(float [[AX11]], float [[TMP11]])
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_COMPUTE15]]:
-; CHECK-NEXT: [[TMP38:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX12]])
+; CHECK-NEXT: [[TMP38:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX]])
; CHECK-NEXT: [[TMP39:%.*]] = extractvalue { float, i32 } [[TMP38]], 0
; CHECK-NEXT: [[TMP40:%.*]] = extractvalue { float, i32 } [[TMP38]], 1
; CHECK-NEXT: [[EX17:%.*]] = sub i32 [[TMP40]], 1
; CHECK-NEXT: [[AX18:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP39]], i32 12)
-; CHECK-NEXT: [[TMP41:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY13]])
+; CHECK-NEXT: [[TMP41:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY]])
; CHECK-NEXT: [[TMP42:%.*]] = extractvalue { float, i32 } [[TMP41]], 0
; CHECK-NEXT: [[TMP43:%.*]] = extractvalue { float, i32 } [[TMP41]], 1
; CHECK-NEXT: [[EY19:%.*]] = sub i32 [[TMP43]], 1
@@ -907,10 +907,10 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP44:%.*]] = icmp sgt i32 [[NB21]], 12
; CHECK-NEXT: br i1 [[TMP44]], label %[[FREM_LOOP_BODY23:.*]], label %[[FREM_LOOP_EXIT24]]
; CHECK: [[FREM_ELSE16]]:
-; CHECK-NEXT: [[TMP45:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP11]])
-; CHECK-NEXT: [[TMP46:%.*]] = fcmp oeq float [[AX12]], [[AY13]]
-; CHECK-NEXT: [[TMP47]] = select i1 [[TMP46]], float [[TMP45]], float [[TMP11]]
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP46:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP1]])
+; CHECK-NEXT: [[TMP47:%.*]] = fcmp oeq float [[AX]], [[AY]]
+; CHECK-NEXT: [[TMP55]] = select i1 [[TMP47]], float [[TMP46]], float [[TMP1]]
+; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[FREM_LOOP_BODY23]]:
; CHECK-NEXT: [[NB_IV25:%.*]] = phi i32 [ [[NB21]], %[[FREM_COMPUTE15]] ], [ [[NB_UPDATE33:%.*]], %[[FREM_LOOP_BODY23]] ]
; CHECK-NEXT: [[AX_LOOP_PHI26:%.*]] = phi float [ [[AX18]], %[[FREM_COMPUTE15]] ], [ [[AX_UPDATE32:%.*]], %[[FREM_LOOP_BODY23]] ]
@@ -939,8 +939,8 @@ define amdgpu_kernel void @frem_v2f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP40:%.*]] = fadd float [[AX38]], [[AY20]]
; CHECK-NEXT: [[AX41:%.*]] = select i1 [[CLT39]], float [[AXP40]], float [[AX38]]
; CHECK-NEXT: [[AX42:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX41]], i32 [[EY19]])
-; CHECK-NEXT: [[TMP55]] = call float @llvm.copysign.f32(float [[AX42]], float [[TMP11]])
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP56]] = call float @llvm.copysign.f32(float [[AX42]], float [[TMP1]])
+; CHECK-NEXT: br label %[[BB4]]
;
ptr addrspace(1) %in2) {
%gep2 = getelementptr <2 x float>, ptr addrspace(1) %in2, i32 4
@@ -962,9 +962,9 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
; CHECK-NEXT: [[AY:%.*]] = call float @llvm.fabs.f32(float [[TMP2]])
; CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt float [[AX]], [[AY]]
-; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE77:.*]], label %[[FREM_ELSE78:.*]]
; CHECK: [[BB4:.*]]:
-; CHECK-NEXT: [[RET:%.*]] = phi float [ [[TMP57:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP49:%.*]], %[[FREM_ELSE]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi float [ [[TMP112:%.*]], %[[FREM_LOOP_EXIT86:.*]] ], [ [[TMP111:%.*]], %[[FREM_ELSE78]] ]
; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq float [[TMP2]], 0.000000e+00
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float 0x7FF8000000000000, float [[RET]]
; CHECK-NEXT: [[TMP7:%.*]] = call float @llvm.fabs.f32(float [[TMP1]])
@@ -976,9 +976,9 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX12:%.*]] = call float @llvm.fabs.f32(float [[TMP11]])
; CHECK-NEXT: [[AY13:%.*]] = call float @llvm.fabs.f32(float [[TMP12]])
; CHECK-NEXT: [[TMP13:%.*]] = fcmp ogt float [[AX12]], [[AY13]]
-; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE46:.*]], label %[[FREM_ELSE47:.*]]
; CHECK: [[BB14:.*]]:
-; CHECK-NEXT: [[RET14:%.*]] = phi float [ [[TMP75:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP67:%.*]], %[[FREM_ELSE16]] ]
+; CHECK-NEXT: [[RET14:%.*]] = phi float [ [[TMP101:%.*]], %[[FREM_LOOP_EXIT55:.*]] ], [ [[TMP93:%.*]], %[[FREM_ELSE47]] ]
; CHECK-NEXT: [[TMP15:%.*]] = fcmp ueq float [[TMP12]], 0.000000e+00
; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], float 0x7FF8000000000000, float [[RET14]]
; CHECK-NEXT: [[TMP17:%.*]] = call float @llvm.fabs.f32(float [[TMP11]])
@@ -990,9 +990,9 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX43:%.*]] = call float @llvm.fabs.f32(float [[TMP21]])
; CHECK-NEXT: [[AY44:%.*]] = call float @llvm.fabs.f32(float [[TMP22]])
; CHECK-NEXT: [[TMP23:%.*]] = fcmp ogt float [[AX43]], [[AY44]]
-; CHECK-NEXT: br i1 [[TMP23]], label %[[FREM_COMPUTE46:.*]], label %[[FREM_ELSE47:.*]]
+; CHECK-NEXT: br i1 [[TMP23]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
; CHECK: [[BB24:.*]]:
-; CHECK-NEXT: [[RET45:%.*]] = phi float [ [[TMP93:%.*]], %[[FREM_LOOP_EXIT55:.*]] ], [ [[TMP85:%.*]], %[[FREM_ELSE47]] ]
+; CHECK-NEXT: [[RET45:%.*]] = phi float [ [[TMP83:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP75:%.*]], %[[FREM_ELSE16]] ]
; CHECK-NEXT: [[TMP25:%.*]] = fcmp ueq float [[TMP22]], 0.000000e+00
; CHECK-NEXT: [[TMP26:%.*]] = select i1 [[TMP25]], float 0x7FF8000000000000, float [[RET45]]
; CHECK-NEXT: [[TMP27:%.*]] = call float @llvm.fabs.f32(float [[TMP21]])
@@ -1004,9 +1004,9 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX74:%.*]] = call float @llvm.fabs.f32(float [[TMP31]])
; CHECK-NEXT: [[AY75:%.*]] = call float @llvm.fabs.f32(float [[TMP32]])
; CHECK-NEXT: [[TMP33:%.*]] = fcmp ogt float [[AX74]], [[AY75]]
-; CHECK-NEXT: br i1 [[TMP33]], label %[[FREM_COMPUTE77:.*]], label %[[FREM_ELSE78:.*]]
+; CHECK-NEXT: br i1 [[TMP33]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
; CHECK: [[BB34:.*]]:
-; CHECK-NEXT: [[RET76:%.*]] = phi float [ [[TMP111:%.*]], %[[FREM_LOOP_EXIT86:.*]] ], [ [[TMP103:%.*]], %[[FREM_ELSE78]] ]
+; CHECK-NEXT: [[RET76:%.*]] = phi float [ [[TMP65:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP57:%.*]], %[[FREM_ELSE]] ]
; CHECK-NEXT: [[TMP35:%.*]] = fcmp ueq float [[TMP32]], 0.000000e+00
; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], float 0x7FF8000000000000, float [[RET76]]
; CHECK-NEXT: [[TMP37:%.*]] = call float @llvm.fabs.f32(float [[TMP31]])
@@ -1016,12 +1016,12 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: store <4 x float> [[R2]], ptr addrspace(1) [[OUT]], align 16
; CHECK-NEXT: ret void
; CHECK: [[FREM_COMPUTE]]:
-; CHECK-NEXT: [[TMP40:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX]])
+; CHECK-NEXT: [[TMP40:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX74]])
; CHECK-NEXT: [[TMP41:%.*]] = extractvalue { float, i32 } [[TMP40]], 0
; CHECK-NEXT: [[TMP42:%.*]] = extractvalue { float, i32 } [[TMP40]], 1
; CHECK-NEXT: [[EX:%.*]] = sub i32 [[TMP42]], 1
; CHECK-NEXT: [[AX1:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP41]], i32 12)
-; CHECK-NEXT: [[TMP43:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY]])
+; CHECK-NEXT: [[TMP43:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY75]])
; CHECK-NEXT: [[TMP44:%.*]] = extractvalue { float, i32 } [[TMP43]], 0
; CHECK-NEXT: [[TMP45:%.*]] = extractvalue { float, i32 } [[TMP43]], 1
; CHECK-NEXT: [[EY:%.*]] = sub i32 [[TMP45]], 1
@@ -1031,10 +1031,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP46:%.*]] = icmp sgt i32 [[NB]], 12
; CHECK-NEXT: br i1 [[TMP46]], label %[[FREM_LOOP_BODY:.*]], label %[[FREM_LOOP_EXIT]]
; CHECK: [[FREM_ELSE]]:
-; CHECK-NEXT: [[TMP47:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP1]])
-; CHECK-NEXT: [[TMP48:%.*]] = fcmp oeq float [[AX]], [[AY]]
-; CHECK-NEXT: [[TMP49]] = select i1 [[TMP48]], float [[TMP47]], float [[TMP1]]
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP48:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP31]])
+; CHECK-NEXT: [[TMP49:%.*]] = fcmp oeq float [[AX74]], [[AY75]]
+; CHECK-NEXT: [[TMP57]] = select i1 [[TMP49]], float [[TMP48]], float [[TMP31]]
+; CHECK-NEXT: br label %[[BB34]]
; CHECK: [[FREM_LOOP_BODY]]:
; CHECK-NEXT: [[NB_IV:%.*]] = phi i32 [ [[NB]], %[[FREM_COMPUTE]] ], [ [[NB_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
; CHECK-NEXT: [[AX_LOOP_PHI:%.*]] = phi float [ [[AX1]], %[[FREM_COMPUTE]] ], [ [[AX_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
@@ -1063,15 +1063,15 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP9:%.*]] = fadd float [[AX7]], [[AY2]]
; CHECK-NEXT: [[AX10:%.*]] = select i1 [[CLT8]], float [[AXP9]], float [[AX7]]
; CHECK-NEXT: [[AX11:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX10]], i32 [[EY]])
-; CHECK-NEXT: [[TMP57]] = call float @llvm.copysign.f32(float [[AX11]], float [[TMP1]])
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP65]] = call float @llvm.copysign.f32(float [[AX11]], float [[TMP31]])
+; CHECK-NEXT: br label %[[BB34]]
; CHECK: [[FREM_COMPUTE15]]:
-; CHECK-NEXT: [[TMP58:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX12]])
+; CHECK-NEXT: [[TMP58:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX43]])
; CHECK-NEXT: [[TMP59:%.*]] = extractvalue { float, i32 } [[TMP58]], 0
; CHECK-NEXT: [[TMP60:%.*]] = extractvalue { float, i32 } [[TMP58]], 1
; CHECK-NEXT: [[EX17:%.*]] = sub i32 [[TMP60]], 1
; CHECK-NEXT: [[AX18:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP59]], i32 12)
-; CHECK-NEXT: [[TMP61:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY13]])
+; CHECK-NEXT: [[TMP61:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY44]])
; CHECK-NEXT: [[TMP62:%.*]] = extractvalue { float, i32 } [[TMP61]], 0
; CHECK-NEXT: [[TMP63:%.*]] = extractvalue { float, i32 } [[TMP61]], 1
; CHECK-NEXT: [[EY19:%.*]] = sub i32 [[TMP63]], 1
@@ -1081,10 +1081,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP64:%.*]] = icmp sgt i32 [[NB21]], 12
; CHECK-NEXT: br i1 [[TMP64]], label %[[FREM_LOOP_BODY23:.*]], label %[[FREM_LOOP_EXIT24]]
; CHECK: [[FREM_ELSE16]]:
-; CHECK-NEXT: [[TMP65:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP11]])
-; CHECK-NEXT: [[TMP66:%.*]] = fcmp oeq float [[AX12]], [[AY13]]
-; CHECK-NEXT: [[TMP67]] = select i1 [[TMP66]], float [[TMP65]], float [[TMP11]]
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP66:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP21]])
+; CHECK-NEXT: [[TMP67:%.*]] = fcmp oeq float [[AX43]], [[AY44]]
+; CHECK-NEXT: [[TMP75]] = select i1 [[TMP67]], float [[TMP66]], float [[TMP21]]
+; CHECK-NEXT: br label %[[BB24]]
; CHECK: [[FREM_LOOP_BODY23]]:
; CHECK-NEXT: [[NB_IV25:%.*]] = phi i32 [ [[NB21]], %[[FREM_COMPUTE15]] ], [ [[NB_UPDATE33:%.*]], %[[FREM_LOOP_BODY23]] ]
; CHECK-NEXT: [[AX_LOOP_PHI26:%.*]] = phi float [ [[AX18]], %[[FREM_COMPUTE15]] ], [ [[AX_UPDATE32:%.*]], %[[FREM_LOOP_BODY23]] ]
@@ -1113,15 +1113,15 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP40:%.*]] = fadd float [[AX38]], [[AY20]]
; CHECK-NEXT: [[AX41:%.*]] = select i1 [[CLT39]], float [[AXP40]], float [[AX38]]
; CHECK-NEXT: [[AX42:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX41]], i32 [[EY19]])
-; CHECK-NEXT: [[TMP75]] = call float @llvm.copysign.f32(float [[AX42]], float [[TMP11]])
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP83]] = call float @llvm.copysign.f32(float [[AX42]], float [[TMP21]])
+; CHECK-NEXT: br label %[[BB24]]
; CHECK: [[FREM_COMPUTE46]]:
-; CHECK-NEXT: [[TMP76:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX43]])
+; CHECK-NEXT: [[TMP76:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX12]])
; CHECK-NEXT: [[TMP77:%.*]] = extractvalue { float, i32 } [[TMP76]], 0
; CHECK-NEXT: [[TMP78:%.*]] = extractvalue { float, i32 } [[TMP76]], 1
; CHECK-NEXT: [[EX48:%.*]] = sub i32 [[TMP78]], 1
; CHECK-NEXT: [[AX49:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP77]], i32 12)
-; CHECK-NEXT: [[TMP79:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY44]])
+; CHECK-NEXT: [[TMP79:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY13]])
; CHECK-NEXT: [[TMP80:%.*]] = extractvalue { float, i32 } [[TMP79]], 0
; CHECK-NEXT: [[TMP81:%.*]] = extractvalue { float, i32 } [[TMP79]], 1
; CHECK-NEXT: [[EY50:%.*]] = sub i32 [[TMP81]], 1
@@ -1131,10 +1131,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP82:%.*]] = icmp sgt i32 [[NB52]], 12
; CHECK-NEXT: br i1 [[TMP82]], label %[[FREM_LOOP_BODY54:.*]], label %[[FREM_LOOP_EXIT55]]
; CHECK: [[FREM_ELSE47]]:
-; CHECK-NEXT: [[TMP83:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP21]])
-; CHECK-NEXT: [[TMP84:%.*]] = fcmp oeq float [[AX43]], [[AY44]]
-; CHECK-NEXT: [[TMP85]] = select i1 [[TMP84]], float [[TMP83]], float [[TMP21]]
-; CHECK-NEXT: br label %[[BB24]]
+; CHECK-NEXT: [[TMP84:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP11]])
+; CHECK-NEXT: [[TMP85:%.*]] = fcmp oeq float [[AX12]], [[AY13]]
+; CHECK-NEXT: [[TMP93]] = select i1 [[TMP85]], float [[TMP84]], float [[TMP11]]
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_LOOP_BODY54]]:
; CHECK-NEXT: [[NB_IV56:%.*]] = phi i32 [ [[NB52]], %[[FREM_COMPUTE46]] ], [ [[NB_UPDATE64:%.*]], %[[FREM_LOOP_BODY54]] ]
; CHECK-NEXT: [[AX_LOOP_PHI57:%.*]] = phi float [ [[AX49]], %[[FREM_COMPUTE46]] ], [ [[AX_UPDATE63:%.*]], %[[FREM_LOOP_BODY54]] ]
@@ -1163,15 +1163,15 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP71:%.*]] = fadd float [[AX69]], [[AY51]]
; CHECK-NEXT: [[AX72:%.*]] = select i1 [[CLT70]], float [[AXP71]], float [[AX69]]
; CHECK-NEXT: [[AX73:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX72]], i32 [[EY50]])
-; CHECK-NEXT: [[TMP93]] = call float @llvm.copysign.f32(float [[AX73]], float [[TMP21]])
-; CHECK-NEXT: br label %[[BB24]]
+; CHECK-NEXT: [[TMP101]] = call float @llvm.copysign.f32(float [[AX73]], float [[TMP11]])
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_COMPUTE77]]:
-; CHECK-NEXT: [[TMP94:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX74]])
+; CHECK-NEXT: [[TMP94:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AX]])
; CHECK-NEXT: [[TMP95:%.*]] = extractvalue { float, i32 } [[TMP94]], 0
; CHECK-NEXT: [[TMP96:%.*]] = extractvalue { float, i32 } [[TMP94]], 1
; CHECK-NEXT: [[EX79:%.*]] = sub i32 [[TMP96]], 1
; CHECK-NEXT: [[AX80:%.*]] = call float @llvm.ldexp.f32.i32(float [[TMP95]], i32 12)
-; CHECK-NEXT: [[TMP97:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY75]])
+; CHECK-NEXT: [[TMP97:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[AY]])
; CHECK-NEXT: [[TMP98:%.*]] = extractvalue { float, i32 } [[TMP97]], 0
; CHECK-NEXT: [[TMP99:%.*]] = extractvalue { float, i32 } [[TMP97]], 1
; CHECK-NEXT: [[EY81:%.*]] = sub i32 [[TMP99]], 1
@@ -1181,10 +1181,10 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP100:%.*]] = icmp sgt i32 [[NB83]], 12
; CHECK-NEXT: br i1 [[TMP100]], label %[[FREM_LOOP_BODY85:.*]], label %[[FREM_LOOP_EXIT86]]
; CHECK: [[FREM_ELSE78]]:
-; CHECK-NEXT: [[TMP101:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP31]])
-; CHECK-NEXT: [[TMP102:%.*]] = fcmp oeq float [[AX74]], [[AY75]]
-; CHECK-NEXT: [[TMP103]] = select i1 [[TMP102]], float [[TMP101]], float [[TMP31]]
-; CHECK-NEXT: br label %[[BB34]]
+; CHECK-NEXT: [[TMP102:%.*]] = call float @llvm.copysign.f32(float 0.000000e+00, float [[TMP1]])
+; CHECK-NEXT: [[TMP103:%.*]] = fcmp oeq float [[AX]], [[AY]]
+; CHECK-NEXT: [[TMP111]] = select i1 [[TMP103]], float [[TMP102]], float [[TMP1]]
+; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[FREM_LOOP_BODY85]]:
; CHECK-NEXT: [[NB_IV87:%.*]] = phi i32 [ [[NB83]], %[[FREM_COMPUTE77]] ], [ [[NB_UPDATE95:%.*]], %[[FREM_LOOP_BODY85]] ]
; CHECK-NEXT: [[AX_LOOP_PHI88:%.*]] = phi float [ [[AX80]], %[[FREM_COMPUTE77]] ], [ [[AX_UPDATE94:%.*]], %[[FREM_LOOP_BODY85]] ]
@@ -1213,8 +1213,8 @@ define amdgpu_kernel void @frem_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP102:%.*]] = fadd float [[AX100]], [[AY82]]
; CHECK-NEXT: [[AX103:%.*]] = select i1 [[CLT101]], float [[AXP102]], float [[AX100]]
; CHECK-NEXT: [[AX104:%.*]] = call float @llvm.ldexp.f32.i32(float [[AX103]], i32 [[EY81]])
-; CHECK-NEXT: [[TMP111]] = call float @llvm.copysign.f32(float [[AX104]], float [[TMP31]])
-; CHECK-NEXT: br label %[[BB34]]
+; CHECK-NEXT: [[TMP112]] = call float @llvm.copysign.f32(float [[AX104]], float [[TMP1]])
+; CHECK-NEXT: br label %[[BB4]]
;
ptr addrspace(1) %in2) {
%gep2 = getelementptr <4 x float>, ptr addrspace(1) %in2, i32 4
@@ -1236,9 +1236,9 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX:%.*]] = call double @llvm.fabs.f64(double [[TMP1]])
; CHECK-NEXT: [[AY:%.*]] = call double @llvm.fabs.f64(double [[TMP2]])
; CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt double [[AX]], [[AY]]
-; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
; CHECK: [[BB4:.*]]:
-; CHECK-NEXT: [[RET:%.*]] = phi double [ [[TMP37:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP29:%.*]], %[[FREM_ELSE]] ]
+; CHECK-NEXT: [[RET:%.*]] = phi double [ [[TMP56:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP55:%.*]], %[[FREM_ELSE16]] ]
; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq double [[TMP2]], 0.000000e+00
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], double 0x7FF8000000000000, double [[RET]]
; CHECK-NEXT: [[TMP7:%.*]] = call double @llvm.fabs.f64(double [[TMP1]])
@@ -1250,9 +1250,9 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AX12:%.*]] = call double @llvm.fabs.f64(double [[TMP11]])
; CHECK-NEXT: [[AY13:%.*]] = call double @llvm.fabs.f64(double [[TMP12]])
; CHECK-NEXT: [[TMP13:%.*]] = fcmp ogt double [[AX12]], [[AY13]]
-; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE15:.*]], label %[[FREM_ELSE16:.*]]
+; CHECK-NEXT: br i1 [[TMP13]], label %[[FREM_COMPUTE:.*]], label %[[FREM_ELSE:.*]]
; CHECK: [[BB14:.*]]:
-; CHECK-NEXT: [[RET14:%.*]] = phi double [ [[TMP55:%.*]], %[[FREM_LOOP_EXIT24:.*]] ], [ [[TMP47:%.*]], %[[FREM_ELSE16]] ]
+; CHECK-NEXT: [[RET14:%.*]] = phi double [ [[TMP45:%.*]], %[[FREM_LOOP_EXIT:.*]] ], [ [[TMP37:%.*]], %[[FREM_ELSE]] ]
; CHECK-NEXT: [[TMP15:%.*]] = fcmp ueq double [[TMP12]], 0.000000e+00
; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], double 0x7FF8000000000000, double [[RET14]]
; CHECK-NEXT: [[TMP17:%.*]] = call double @llvm.fabs.f64(double [[TMP11]])
@@ -1262,12 +1262,12 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: store <2 x double> [[R2]], ptr addrspace(1) [[OUT]], align 16
; CHECK-NEXT: ret void
; CHECK: [[FREM_COMPUTE]]:
-; CHECK-NEXT: [[TMP20:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AX]])
+; CHECK-NEXT: [[TMP20:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AX12]])
; CHECK-NEXT: [[TMP21:%.*]] = extractvalue { double, i32 } [[TMP20]], 0
; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { double, i32 } [[TMP20]], 1
; CHECK-NEXT: [[EX:%.*]] = sub i32 [[TMP22]], 1
; CHECK-NEXT: [[AX1:%.*]] = call double @llvm.ldexp.f64.i32(double [[TMP21]], i32 26)
-; CHECK-NEXT: [[TMP23:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AY]])
+; CHECK-NEXT: [[TMP23:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AY13]])
; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { double, i32 } [[TMP23]], 0
; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { double, i32 } [[TMP23]], 1
; CHECK-NEXT: [[EY:%.*]] = sub i32 [[TMP25]], 1
@@ -1277,10 +1277,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP26:%.*]] = icmp sgt i32 [[NB]], 26
; CHECK-NEXT: br i1 [[TMP26]], label %[[FREM_LOOP_BODY:.*]], label %[[FREM_LOOP_EXIT]]
; CHECK: [[FREM_ELSE]]:
-; CHECK-NEXT: [[TMP27:%.*]] = call double @llvm.copysign.f64(double 0.000000e+00, double [[TMP1]])
-; CHECK-NEXT: [[TMP28:%.*]] = fcmp oeq double [[AX]], [[AY]]
-; CHECK-NEXT: [[TMP29]] = select i1 [[TMP28]], double [[TMP27]], double [[TMP1]]
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP28:%.*]] = call double @llvm.copysign.f64(double 0.000000e+00, double [[TMP11]])
+; CHECK-NEXT: [[TMP29:%.*]] = fcmp oeq double [[AX12]], [[AY13]]
+; CHECK-NEXT: [[TMP37]] = select i1 [[TMP29]], double [[TMP28]], double [[TMP11]]
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_LOOP_BODY]]:
; CHECK-NEXT: [[NB_IV:%.*]] = phi i32 [ [[NB]], %[[FREM_COMPUTE]] ], [ [[NB_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
; CHECK-NEXT: [[AX_LOOP_PHI:%.*]] = phi double [ [[AX1]], %[[FREM_COMPUTE]] ], [ [[AX_UPDATE:%.*]], %[[FREM_LOOP_BODY]] ]
@@ -1309,15 +1309,15 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP9:%.*]] = fadd double [[AX7]], [[AY2]]
; CHECK-NEXT: [[AX10:%.*]] = select i1 [[CLT8]], double [[AXP9]], double [[AX7]]
; CHECK-NEXT: [[AX11:%.*]] = call double @llvm.ldexp.f64.i32(double [[AX10]], i32 [[EY]])
-; CHECK-NEXT: [[TMP37]] = call double @llvm.copysign.f64(double [[AX11]], double [[TMP1]])
-; CHECK-NEXT: br label %[[BB4]]
+; CHECK-NEXT: [[TMP45]] = call double @llvm.copysign.f64(double [[AX11]], double [[TMP11]])
+; CHECK-NEXT: br label %[[BB14]]
; CHECK: [[FREM_COMPUTE15]]:
-; CHECK-NEXT: [[TMP38:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AX12]])
+; CHECK-NEXT: [[TMP38:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AX]])
; CHECK-NEXT: [[TMP39:%.*]] = extractvalue { double, i32 } [[TMP38]], 0
; CHECK-NEXT: [[TMP40:%.*]] = extractvalue { double, i32 } [[TMP38]], 1
; CHECK-NEXT: [[EX17:%.*]] = sub i32 [[TMP40]], 1
; CHECK-NEXT: [[AX18:%.*]] = call double @llvm.ldexp.f64.i32(double [[TMP39]], i32 26)
-; CHECK-NEXT: [[TMP41:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AY13]])
+; CHECK-NEXT: [[TMP41:%.*]] = call { double, i32 } @llvm.frexp.f64.i32(double [[AY]])
; CHECK-NEXT: [[TMP42:%.*]] = extractvalue { double, i32 } [[TMP41]], 0
; CHECK-NEXT: [[TMP43:%.*]] = extractvalue { double, i32 } [[TMP41]], 1
; CHECK-NEXT: [[EY19:%.*]] = sub i32 [[TMP43]], 1
@@ -1327,10 +1327,10 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[TMP44:%.*]] = icmp sgt i32 [[NB21]], 26
; CHECK-NEXT: br i1 [[TMP44]], label %[[FREM_LOOP_BODY23:.*]], label %[[FREM_LOOP_EXIT24]]
; CHECK: [[FREM_ELSE16]]:
-; CHECK-NEXT: [[TMP45:%.*]] = call double @llvm.copysign.f64(double 0.000000e+00, double [[TMP11]])
-; CHECK-NEXT: [[TMP46:%.*]] = fcmp oeq double [[AX12]], [[AY13]]
-; CHECK-NEXT: [[TMP47]] = select i1 [[TMP46]], double [[TMP45]], double [[TMP11]]
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP46:%.*]] = call double @llvm.copysign.f64(double 0.000000e+00, double [[TMP1]])
+; CHECK-NEXT: [[TMP47:%.*]] = fcmp oeq double [[AX]], [[AY]]
+; CHECK-NEXT: [[TMP55]] = select i1 [[TMP47]], double [[TMP46]], double [[TMP1]]
+; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[FREM_LOOP_BODY23]]:
; CHECK-NEXT: [[NB_IV25:%.*]] = phi i32 [ [[NB21]], %[[FREM_COMPUTE15]] ], [ [[NB_UPDATE33:%.*]], %[[FREM_LOOP_BODY23]] ]
; CHECK-NEXT: [[AX_LOOP_PHI26:%.*]] = phi double [ [[AX18]], %[[FREM_COMPUTE15]] ], [ [[AX_UPDATE32:%.*]], %[[FREM_LOOP_BODY23]] ]
@@ -1359,8 +1359,8 @@ define amdgpu_kernel void @frem_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %i
; CHECK-NEXT: [[AXP40:%.*]] = fadd double [[AX38]], [[AY20]]
; CHECK-NEXT: [[AX41:%.*]] = select i1 [[CLT39]], double [[AXP40]], double [[AX38]]
; CHECK-NEXT: [[AX42:%.*]] = call double @llvm.ldexp.f64.i32(double [[AX41]], i32 [[EY19]])
-; CHECK-NEXT: [[TMP55]] = call double @llvm.copysign.f64(double [[AX42]], double [[TMP11]])
-; CHECK-NEXT: br label %[[BB14]]
+; CHECK-NEXT: [[TMP56]] = call double @llvm.copysign.f64(double [[AX42]], double [[TMP1]])
+; CHECK-NEXT: br label %[[BB4]]
;
ptr addrspace(1) %in2) {
%gep2 = getelementptr <2 x double>, ptr addrspace(1) %in2, i32 4
diff --git a/llvm/test/Transforms/InstCombine/add-sitofp.ll b/llvm/test/Transforms/InstCombine/add-sitofp.ll
index fae1365..e1d39fd 100644
--- a/llvm/test/Transforms/InstCombine/add-sitofp.ll
+++ b/llvm/test/Transforms/InstCombine/add-sitofp.ll
@@ -99,12 +99,15 @@ define float @test_3(i32 %a, i32 %b) {
ret float %p
}
+; Don't perform the fold on vector operations, as the integer op may be
+; much more expensive than the float op in that case.
define <4 x double> @test_4(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @test_4(
; CHECK-NEXT: [[A_AND:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 1073741823)
; CHECK-NEXT: [[B_AND:%.*]] = and <4 x i32> [[B:%.*]], splat (i32 1073741823)
-; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw <4 x i32> [[A_AND]], [[B_AND]]
-; CHECK-NEXT: [[RES:%.*]] = uitofp nneg <4 x i32> [[TMP1]] to <4 x double>
+; CHECK-NEXT: [[A_AND_FP:%.*]] = uitofp nneg <4 x i32> [[A_AND]] to <4 x double>
+; CHECK-NEXT: [[B_AND_FP:%.*]] = uitofp nneg <4 x i32> [[B_AND]] to <4 x double>
+; CHECK-NEXT: [[RES:%.*]] = fadd <4 x double> [[A_AND_FP]], [[B_AND_FP]]
; CHECK-NEXT: ret <4 x double> [[RES]]
;
; Drop two highest bits to guarantee that %a + %b doesn't overflow
diff --git a/llvm/test/Transforms/InstCombine/binop-itofp.ll b/llvm/test/Transforms/InstCombine/binop-itofp.ll
index 702bbbb..57184ea 100644
--- a/llvm/test/Transforms/InstCombine/binop-itofp.ll
+++ b/llvm/test/Transforms/InstCombine/binop-itofp.ll
@@ -1063,6 +1063,25 @@ define float @negzero_check_on_constant_for_si_fmul(i1 %c, i1 %.b, ptr %g_2345)
ret float %mul3.i.i
}
+; Don't perform the fold on vector operations, as the integer op may be
+; much more expensive than the float op in that case.
+define <2 x half> @test_ui_ui_i8_mul_vec(<2 x i8> noundef %x_in, <2 x i8> noundef %y_in) {
+; CHECK-LABEL: @test_ui_ui_i8_mul_vec(
+; CHECK-NEXT: [[X:%.*]] = and <2 x i8> [[X_IN:%.*]], splat (i8 15)
+; CHECK-NEXT: [[Y:%.*]] = and <2 x i8> [[Y_IN:%.*]], splat (i8 15)
+; CHECK-NEXT: [[XF:%.*]] = uitofp nneg <2 x i8> [[X]] to <2 x half>
+; CHECK-NEXT: [[YF:%.*]] = uitofp nneg <2 x i8> [[Y]] to <2 x half>
+; CHECK-NEXT: [[R:%.*]] = fmul <2 x half> [[XF]], [[YF]]
+; CHECK-NEXT: ret <2 x half> [[R]]
+;
+ %x = and <2 x i8> %x_in, splat (i8 15)
+ %y = and <2 x i8> %y_in, splat (i8 15)
+ %xf = uitofp <2 x i8> %x to <2 x half>
+ %yf = uitofp <2 x i8> %y to <2 x half>
+ %r = fmul <2 x half> %xf, %yf
+ ret <2 x half> %r
+}
+
define <2 x float> @nonzero_check_on_constant_for_si_fmul_vec_w_poison(i1 %c, i1 %.b, ptr %g_2345) {
; CHECK-LABEL: @nonzero_check_on_constant_for_si_fmul_vec_w_poison(
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], i32 65529, i32 53264
@@ -1091,8 +1110,9 @@ define <2 x float> @nonzero_check_on_constant_for_si_fmul_nz_vec_w_poison(i1 %c,
; CHECK-NEXT: [[CONV_I_V:%.*]] = insertelement <2 x i16> poison, i16 [[CONV_I_S]], i64 0
; CHECK-NEXT: [[CONV_I:%.*]] = shufflevector <2 x i16> [[CONV_I_V]], <2 x i16> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[MUL3_I_I:%.*]] = sitofp <2 x i16> [[CONV_I]] to <2 x float>
+; CHECK-NEXT: [[MUL3_I_I1:%.*]] = fmul <2 x float> [[MUL3_I_I]], <float poison, float 1.000000e+00>
; CHECK-NEXT: store i32 [[SEL]], ptr [[G_2345:%.*]], align 4
-; CHECK-NEXT: ret <2 x float> [[MUL3_I_I]]
+; CHECK-NEXT: ret <2 x float> [[MUL3_I_I1]]
;
%sel = select i1 %c, i32 65529, i32 53264
%conv.i.s = trunc i32 %sel to i16
diff --git a/llvm/test/Transforms/InstCombine/ptrtoaddr.ll b/llvm/test/Transforms/InstCombine/ptrtoaddr.ll
index 7b0b152..ffaa8b1 100644
--- a/llvm/test/Transforms/InstCombine/ptrtoaddr.ll
+++ b/llvm/test/Transforms/InstCombine/ptrtoaddr.ll
@@ -23,10 +23,7 @@ define i64 @ptrtoaddr_inttoptr_arg(i64 %a) {
define i32 @ptrtoaddr_inttoptr_arg_addrsize(i32 %a) {
; CHECK-LABEL: define i32 @ptrtoaddr_inttoptr_arg_addrsize(
; CHECK-SAME: i32 [[A:%.*]]) {
-; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A]] to i64
-; CHECK-NEXT: [[TOPTR:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(1)
-; CHECK-NEXT: [[TOADDR:%.*]] = ptrtoaddr ptr addrspace(1) [[TOPTR]] to i32
-; CHECK-NEXT: ret i32 [[TOADDR]]
+; CHECK-NEXT: ret i32 [[A]]
;
%toptr = inttoptr i32 %a to ptr addrspace(1)
%toaddr = ptrtoaddr ptr addrspace(1) %toptr to i32
diff --git a/llvm/test/Transforms/LoopVectorize/loop-form.ll b/llvm/test/Transforms/LoopVectorize/loop-form.ll
index aed1e29..4db3d1e 100644
--- a/llvm/test/Transforms/LoopVectorize/loop-form.ll
+++ b/llvm/test/Transforms/LoopVectorize/loop-form.ll
@@ -1374,3 +1374,49 @@ exit.1:
exit.2:
ret i16 1
}
+
+; Loop with a switch terminator in the latch block. Cannot be vectorized
+; currently.
+; Test case for https://github.com/llvm/llvm-project/issues/156894.
+define void @switch_in_latch(ptr %a) {
+; CHECK-LABEL: @switch_in_latch(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 1, ptr [[GEP]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: switch i32 [[IV_NEXT]], label [[LOOP]] [
+; CHECK-NEXT: i32 100, label [[EXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+; TAILFOLD-LABEL: @switch_in_latch(
+; TAILFOLD-NEXT: entry:
+; TAILFOLD-NEXT: br label [[LOOP:%.*]]
+; TAILFOLD: loop:
+; TAILFOLD-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; TAILFOLD-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]
+; TAILFOLD-NEXT: store i32 1, ptr [[GEP]], align 4
+; TAILFOLD-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; TAILFOLD-NEXT: switch i32 [[IV_NEXT]], label [[LOOP]] [
+; TAILFOLD-NEXT: i32 100, label [[EXIT:%.*]]
+; TAILFOLD-NEXT: ]
+; TAILFOLD: exit:
+; TAILFOLD-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep = getelementptr i32, ptr %a, i32 %iv
+ store i32 1, ptr %gep, align 4
+ %iv.next = add i32 %iv, 1
+ switch i32 %iv.next, label %loop [i32 100, label %exit]
+
+exit:
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll b/llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
index 9ed2240..9357adf 100644
--- a/llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
+++ b/llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
@@ -273,3 +273,106 @@ loop:
exit:
ret void
}
+
+define void @ld_div2_ld_scevunknown_nonuniform(ptr %src.a, ptr noalias %src.b, ptr noalias %dst) {
+; CHECK-LABEL: define void @ld_div2_ld_scevunknown_nonuniform
+; CHECK-SAME: (ptr [[SRC_A:%.*]], ptr noalias [[SRC_B:%.*]], ptr noalias [[DST:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2
+; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4
+; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5
+; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6
+; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7
+; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP0]]
+; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP1]]
+; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP2]]
+; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP3]]
+; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP4]]
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP5]]
+; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP6]]
+; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[SRC_A]], i64 [[TMP7]]
+; CHECK-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP8]], align 4
+; CHECK-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP9]], align 4
+; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP10]], align 4
+; CHECK-NEXT: [[TMP19:%.*]] = load i64, ptr [[TMP11]], align 4
+; CHECK-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP12]], align 4
+; CHECK-NEXT: [[TMP21:%.*]] = load i64, ptr [[TMP13]], align 4
+; CHECK-NEXT: [[TMP22:%.*]] = load i64, ptr [[TMP14]], align 4
+; CHECK-NEXT: [[TMP23:%.*]] = load i64, ptr [[TMP15]], align 4
+; CHECK-NEXT: [[TMP24:%.*]] = insertelement <8 x i64> poison, i64 [[TMP16]], i32 0
+; CHECK-NEXT: [[TMP25:%.*]] = insertelement <8 x i64> [[TMP24]], i64 [[TMP17]], i32 1
+; CHECK-NEXT: [[TMP26:%.*]] = insertelement <8 x i64> [[TMP25]], i64 [[TMP18]], i32 2
+; CHECK-NEXT: [[TMP27:%.*]] = insertelement <8 x i64> [[TMP26]], i64 [[TMP19]], i32 3
+; CHECK-NEXT: [[TMP28:%.*]] = insertelement <8 x i64> [[TMP27]], i64 [[TMP20]], i32 4
+; CHECK-NEXT: [[TMP29:%.*]] = insertelement <8 x i64> [[TMP28]], i64 [[TMP21]], i32 5
+; CHECK-NEXT: [[TMP30:%.*]] = insertelement <8 x i64> [[TMP29]], i64 [[TMP22]], i32 6
+; CHECK-NEXT: [[TMP31:%.*]] = insertelement <8 x i64> [[TMP30]], i64 [[TMP23]], i32 7
+; CHECK-NEXT: [[TMP32:%.*]] = udiv <8 x i64> [[TMP31]], splat (i64 2)
+; CHECK-NEXT: [[TMP33:%.*]] = extractelement <8 x i64> [[TMP32]], i32 0
+; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP33]]
+; CHECK-NEXT: [[TMP35:%.*]] = extractelement <8 x i64> [[TMP32]], i32 1
+; CHECK-NEXT: [[TMP36:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP35]]
+; CHECK-NEXT: [[TMP37:%.*]] = extractelement <8 x i64> [[TMP32]], i32 2
+; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP37]]
+; CHECK-NEXT: [[TMP39:%.*]] = extractelement <8 x i64> [[TMP32]], i32 3
+; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP39]]
+; CHECK-NEXT: [[TMP41:%.*]] = extractelement <8 x i64> [[TMP32]], i32 4
+; CHECK-NEXT: [[TMP42:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP41]]
+; CHECK-NEXT: [[TMP43:%.*]] = extractelement <8 x i64> [[TMP32]], i32 5
+; CHECK-NEXT: [[TMP44:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP43]]
+; CHECK-NEXT: [[TMP45:%.*]] = extractelement <8 x i64> [[TMP32]], i32 6
+; CHECK-NEXT: [[TMP46:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP45]]
+; CHECK-NEXT: [[TMP47:%.*]] = extractelement <8 x i64> [[TMP32]], i32 7
+; CHECK-NEXT: [[TMP48:%.*]] = getelementptr i32, ptr [[SRC_B]], i64 [[TMP47]]
+; CHECK-NEXT: [[TMP49:%.*]] = load i32, ptr [[TMP34]], align 4
+; CHECK-NEXT: [[TMP50:%.*]] = load i32, ptr [[TMP36]], align 4
+; CHECK-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP38]], align 4
+; CHECK-NEXT: [[TMP52:%.*]] = load i32, ptr [[TMP40]], align 4
+; CHECK-NEXT: [[TMP53:%.*]] = load i32, ptr [[TMP42]], align 4
+; CHECK-NEXT: [[TMP54:%.*]] = load i32, ptr [[TMP44]], align 4
+; CHECK-NEXT: [[TMP55:%.*]] = load i32, ptr [[TMP46]], align 4
+; CHECK-NEXT: [[TMP56:%.*]] = load i32, ptr [[TMP48]], align 4
+; CHECK-NEXT: [[TMP57:%.*]] = insertelement <8 x i32> poison, i32 [[TMP49]], i32 0
+; CHECK-NEXT: [[TMP58:%.*]] = insertelement <8 x i32> [[TMP57]], i32 [[TMP50]], i32 1
+; CHECK-NEXT: [[TMP59:%.*]] = insertelement <8 x i32> [[TMP58]], i32 [[TMP51]], i32 2
+; CHECK-NEXT: [[TMP60:%.*]] = insertelement <8 x i32> [[TMP59]], i32 [[TMP52]], i32 3
+; CHECK-NEXT: [[TMP61:%.*]] = insertelement <8 x i32> [[TMP60]], i32 [[TMP53]], i32 4
+; CHECK-NEXT: [[TMP62:%.*]] = insertelement <8 x i32> [[TMP61]], i32 [[TMP54]], i32 5
+; CHECK-NEXT: [[TMP63:%.*]] = insertelement <8 x i32> [[TMP62]], i32 [[TMP55]], i32 6
+; CHECK-NEXT: [[TMP64:%.*]] = insertelement <8 x i32> [[TMP63]], i32 [[TMP56]], i32 7
+; CHECK-NEXT: [[TMP65:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP0]]
+; CHECK-NEXT: store <8 x i32> [[TMP64]], ptr [[TMP65]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[TMP66:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP66]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK: middle.block:
+; CHECK-NEXT: br label [[SCALAR_PH:%.*]]
+; CHECK: scalar.ph:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep.a = getelementptr i32, ptr %src.a, i64 %iv
+ %load.a = load i64, ptr %gep.a
+ %d = udiv i64 %load.a, 2
+ %gep.b = getelementptr i32, ptr %src.b, i64 %d
+ %load.b = load i32, ptr %gep.b
+ %gep.dst = getelementptr i32, ptr %dst, i64 %iv
+ store i32 %load.b, ptr %gep.dst
+ %iv.next = add i64 %iv, 1
+ %exit.cond = icmp eq i64 %iv, 1000
+ br i1 %exit.cond, label %exit, label %loop
+
+exit:
+ ret void
+}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
new file mode 100644
index 0000000..0561466
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=slp-vectorizer -S -slp-threshold=-9999 -mtriple=riscv64-unknown-linux-gnu -mattr=+v < %s | FileCheck %s
+
+define i32 @main(ptr %q, ptr %a, i8 %.pre) {
+; CHECK-LABEL: define i32 @main(
+; CHECK-SAME: ptr [[Q:%.*]], ptr [[A:%.*]], i8 [[DOTPRE:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[DOTPRE1:%.*]] = load i8, ptr [[Q]], align 1
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[DOTPRE]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[DOTPRE1]], i32 1
+; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i8> [[TMP1]] to <2 x i32>
+; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i32> [[TMP2]], <i32 0, i32 1>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> <i32 poison, i32 1>, <2 x i32> <i32 0, i32 3>
+; CHECK-NEXT: [[TMP5:%.*]] = shl <2 x i32> [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = trunc <2 x i32> [[TMP5]] to <2 x i16>
+; CHECK-NEXT: store <2 x i16> [[TMP6]], ptr [[A]], align 2
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %.pre1 = load i8, ptr %q, align 1
+ %conv11.i = sext i8 %.pre to i32
+ %shl18.i = shl i32 %conv11.i, %conv11.i
+ %conv19.i = trunc i32 %shl18.i to i16
+ store i16 %conv19.i, ptr %a, align 2
+ %0 = sext i8 %.pre1 to i32
+ %1 = add i32 %0, 1
+ %shl18.i.1 = shl i32 1, %1
+ %conv19.i.1 = trunc i32 %shl18.i.1 to i16
+ %arrayidx21.i.1 = getelementptr i8, ptr %a, i64 2
+ store i16 %conv19.i.1, ptr %arrayidx21.i.1, align 2
+ ret i32 0
+}
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll b/llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll
new file mode 100644
index 0000000..d01c35f
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll
@@ -0,0 +1,118 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define void @test(i32 %arg, i32 %arg1) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: i32 [[ARG:%.*]], i32 [[ARG1:%.*]]) {
+; CHECK-NEXT: [[BB:.*]]:
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[ARG1]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[ARG]], i32 0
+; CHECK-NEXT: br label %[[BB6:.*]]
+; CHECK: [[BB2:.*]]:
+; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x i32> [ [[TMP14:%.*]], %[[BB19:.*]] ]
+; CHECK-NEXT: ret void
+; CHECK: [[BB6]]:
+; CHECK-NEXT: [[TMP3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[BB]] ], [ [[TMP17:%.*]], %[[BB26:.*]] ], [ [[TMP16:%.*]], %[[BB27:.*]] ], [ zeroinitializer, %[[BB25:.*]] ]
+; CHECK-NEXT: switch i8 0, label %[[BB11:.*]] [
+; CHECK-NEXT: i8 0, label %[[BB28:.*]]
+; CHECK-NEXT: ]
+; CHECK: [[BB11]]:
+; CHECK-NEXT: [[PHI12:%.*]] = phi i32 [ 0, %[[BB28]] ], [ 0, %[[BB6]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i32> [ [[TMP3]], %[[BB28]] ], [ zeroinitializer, %[[BB6]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> <i32 poison, i32 0, i32 poison, i32 poison>, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[ARG]], i32 0
+; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[PHI12]], i32 3
+; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, <4 x i32> <i32 poison, i32 5, i32 2, i32 7>
+; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> [[TMP1]], <4 x i32> <i32 4, i32 1, i32 2, i32 3>
+; CHECK-NEXT: switch i8 0, label %[[BB19]] [
+; CHECK-NEXT: i8 1, label %[[BB17:.*]]
+; CHECK-NEXT: i8 0, label %[[BB18:.*]]
+; CHECK-NEXT: ]
+; CHECK: [[BB17]]:
+; CHECK-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP4]], zeroinitializer
+; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> [[TMP10]], <4 x i32> <i32 0, i32 3, i32 6, i32 poison>
+; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x i32> [[TMP11]], <4 x i32> <i32 poison, i32 poison, i32 poison, i32 0>, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
+; CHECK-NEXT: br label %[[BB19]]
+; CHECK: [[BB18]]:
+; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> <i32 0, i32 3, i32 2, i32 0>
+; CHECK-NEXT: br label %[[BB19]]
+; CHECK: [[BB19]]:
+; CHECK-NEXT: [[TMP14]] = phi <4 x i32> [ [[TMP10]], %[[BB17]] ], [ [[TMP7]], %[[BB18]] ], [ [[TMP9]], %[[BB11]] ]
+; CHECK-NEXT: [[TMP15:%.*]] = phi <4 x i32> [ [[TMP12]], %[[BB17]] ], [ [[TMP13]], %[[BB18]] ], [ [[TMP7]], %[[BB11]] ]
+; CHECK-NEXT: [[TMP16]] = shufflevector <4 x i32> [[TMP15]], <4 x i32> poison, <4 x i32> <i32 0, i32 3, i32 2, i32 1>
+; CHECK-NEXT: br i1 false, label %[[BB2]], label %[[BB25]]
+; CHECK: [[BB25]]:
+; CHECK-NEXT: switch i8 0, label %[[BB6]] [
+; CHECK-NEXT: i8 0, label %[[BB26]]
+; CHECK-NEXT: i8 1, label %[[BB27]]
+; CHECK-NEXT: i8 6, label %[[BB27]]
+; CHECK-NEXT: ]
+; CHECK: [[BB26]]:
+; CHECK-NEXT: [[TMP17]] = shufflevector <4 x i32> [[TMP14]], <4 x i32> [[TMP0]], <4 x i32> <i32 4, i32 1, i32 2, i32 3>
+; CHECK-NEXT: br label %[[BB6]]
+; CHECK: [[BB27]]:
+; CHECK-NEXT: br label %[[BB6]]
+; CHECK: [[BB28]]:
+; CHECK-NEXT: br label %[[BB11]]
+;
+bb:
+ br label %bb6
+
+bb2:
+ %phi = phi i32 [ %phi21, %bb19 ]
+ %phi3 = phi i32 [ %phi22, %bb19 ]
+ %phi4 = phi i32 [ %phi23, %bb19 ]
+ %phi5 = phi i32 [ %phi24, %bb19 ]
+ ret void
+
+bb6:
+ %phi7 = phi i32 [ 0, %bb ], [ %phi24, %bb26 ], [ %phi24, %bb27 ], [ 0, %bb25 ]
+ %phi8 = phi i32 [ 0, %bb ], [ %arg1, %bb26 ], [ %phi23, %bb27 ], [ 0, %bb25 ]
+ %phi9 = phi i32 [ 0, %bb ], [ %phi22, %bb26 ], [ %phi20, %bb27 ], [ 0, %bb25 ]
+ %phi10 = phi i32 [ 0, %bb ], [ %phi21, %bb26 ], [ %phi21, %bb27 ], [ 0, %bb25 ]
+ switch i8 0, label %bb11 [
+ i8 0, label %bb28
+ ]
+
+bb11:
+ %phi12 = phi i32 [ 0, %bb28 ], [ 0, %bb6 ]
+ %phi13 = phi i32 [ %phi10, %bb28 ], [ 0, %bb6 ]
+ %phi14 = phi i32 [ %phi9, %bb28 ], [ 0, %bb6 ]
+ %phi15 = phi i32 [ %phi8, %bb28 ], [ 0, %bb6 ]
+ %phi16 = phi i32 [ %phi7, %bb28 ], [ 0, %bb6 ]
+ switch i8 0, label %bb19 [
+ i8 1, label %bb17
+ i8 0, label %bb18
+ ]
+
+bb17:
+ %add = add i32 %phi16, 0
+ br label %bb19
+
+bb18:
+ br label %bb19
+
+bb19:
+ %phi20 = phi i32 [ 0, %bb17 ], [ %arg, %bb18 ], [ %phi12, %bb11 ]
+ %phi21 = phi i32 [ %phi13, %bb17 ], [ %phi12, %bb18 ], [ 0, %bb11 ]
+ %phi22 = phi i32 [ %phi14, %bb17 ], [ 0, %bb18 ], [ 0, %bb11 ]
+ %phi23 = phi i32 [ %phi15, %bb17 ], [ %arg, %bb18 ], [ %arg, %bb11 ]
+ %phi24 = phi i32 [ %add, %bb17 ], [ %phi16, %bb18 ], [ %phi16, %bb11 ]
+ br i1 false, label %bb2, label %bb25
+
+bb25:
+ switch i8 0, label %bb6 [
+ i8 0, label %bb26
+ i8 1, label %bb27
+ i8 6, label %bb27
+ ]
+
+bb26:
+ br label %bb6
+
+bb27:
+ br label %bb6
+
+bb28:
+ br label %bb11
+}
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll b/llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll
index d626230..5253f9f 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/phi-nodes-incoming-same-blocks.ll
@@ -6,7 +6,7 @@ define void @test(ptr %0, i1 %1, i1 %2) {
; CHECK-SAME: ptr [[TMP0:%.*]], i1 [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: br label %[[BB4:.*]]
; CHECK: [[BB4]]:
-; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x i32> [ [[TMP12:%.*]], %[[TMP7:.*]] ], [ zeroinitializer, [[TMP3:%.*]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x i32> [ [[TMP15:%.*]], %[[TMP7:.*]] ], [ zeroinitializer, [[TMP3:%.*]] ]
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
; CHECK-NEXT: br i1 [[TMP1]], label %[[TMP7]], label %[[BB15:.*]]
; CHECK: [[TMP7]]:
@@ -14,9 +14,9 @@ define void @test(ptr %0, i1 %1, i1 %2) {
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i64 16
; CHECK-NEXT: [[TMP10:%.*]] = load <2 x i32>, ptr [[TMP9]], align 1
; CHECK-NEXT: [[TMP11:%.*]] = or <2 x i32> [[TMP10]], splat (i32 1)
-; CHECK-NEXT: [[TMP12]] = shufflevector <2 x i32> [[TMP11]], <2 x i32> <i32 1, i32 poison>, <2 x i32> <i32 2, i32 1>
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x i32> [[TMP11]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 poison, i32 poison>, <4 x i32> [[TMP13]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; CHECK-NEXT: [[TMP15]] = shufflevector <2 x i32> [[TMP11]], <2 x i32> <i32 1, i32 poison>, <2 x i32> <i32 2, i32 1>
; CHECK-NEXT: br i1 [[TMP2]], label %[[BB16:.*]], label %[[BB4]]
; CHECK: [[BB15]]:
; CHECK-NEXT: br label %[[BB16]]
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
index 429bee4..a8c2531 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
@@ -65,8 +65,8 @@ define dso_local i32 @main() #0 {
attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-LABEL: check_boundaries:
-; CHECK: check_boundaries$local:
-; CHECK-NEXT: .type check_boundaries$local,@function
+; CHECK: .Lcheck_boundaries$local:
+; CHECK-NEXT: .type .Lcheck_boundaries$local,@function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -107,8 +107,8 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-NEXT: s_setpc_b64 s[30:31]
;
; CHECK-LABEL: main:
-; CHECK: main$local:
-; CHECK-NEXT: .type main$local,@function
+; CHECK: .Lmain$local:
+; CHECK-NEXT: .type .Lmain$local,@function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
index 842fd88..34530f2 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
@@ -6,8 +6,8 @@
define dso_local i32 @check_boundaries() #0 {
; CHECK-LABEL: check_boundaries:
-; CHECK: check_boundaries$local:
-; CHECK-NEXT: .type check_boundaries$local,@function
+; CHECK: .Lcheck_boundaries$local:
+; CHECK-NEXT: .type .Lcheck_boundaries$local,@function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -84,8 +84,8 @@ define dso_local i32 @check_boundaries() #0 {
define dso_local i32 @main() #0 {
; CHECK-LABEL: main:
-; CHECK: main$local:
-; CHECK-NEXT: .type main$local,@function
+; CHECK: .Lmain$local:
+; CHECK-NEXT: .type .Lmain$local,@function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)