diff options
Diffstat (limited to 'llvm/test/CodeGen/RISCV')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll | 1068 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll | 219 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv32.ll | 22 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv64.ll | 22 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/atomic-rmw.ll | 14130 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/attributes.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/float-imm.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/half-imm.ll | 76 | ||||
| -rw-r--r-- | llvm/test/CodeGen/RISCV/rv64zba.ll | 10 |
9 files changed, 11602 insertions, 3959 deletions
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll b/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll new file mode 100644 index 0000000..4914357 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll @@ -0,0 +1,1068 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefix=RV32I %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a,+no-trailing-seq-cst-fence \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a,+ztso,+no-trailing-seq-cst-fence \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s +; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefix=RV64I %s +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a,+no-trailing-seq-cst-fence \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a,+ztso,+no-trailing-seq-cst-fence \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s + + +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO-TRAILING-FENCE %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO-TRAILING-FENCE %s + +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO-TRAILING-FENCE %s +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO-TRAILING-FENCE %s + +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a,+experimental-zalasr -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZALASR,RV32IA-ZALASR-WMO %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d,+a,+experimental-zalasr,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZALASR,RV32IA-ZALASR-TSO %s + +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a,+experimental-zalasr -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZALASR,RV64IA-ZALASR-WMO %s +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d,+a,+experimental-zalasr,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZALASR,RV64IA-ZALASR-TSO %s + + +define float @atomic_load_f32_unordered(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f32_unordered: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 0 +; RV32I-NEXT: call __atomic_load_4 +; RV32I-NEXT: fmv.w.x fa0, a0 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f32_unordered: +; RV32IA: # %bb.0: +; RV32IA-NEXT: lw a0, 0(a0) +; RV32IA-NEXT: fmv.w.x fa0, a0 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f32_unordered: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 0 +; RV64I-NEXT: call __atomic_load_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_load_f32_unordered: +; RV64IA: # %bb.0: +; RV64IA-NEXT: lw a0, 0(a0) +; RV64IA-NEXT: fmv.w.x fa0, a0 +; RV64IA-NEXT: ret + %1 = load atomic float, ptr %a unordered, align 4 + ret float %1 +} + +define float @atomic_load_f32_monotonic(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f32_monotonic: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 0 +; RV32I-NEXT: call __atomic_load_4 +; RV32I-NEXT: fmv.w.x fa0, a0 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f32_monotonic: +; RV32IA: # %bb.0: +; RV32IA-NEXT: lw a0, 0(a0) +; RV32IA-NEXT: fmv.w.x fa0, a0 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f32_monotonic: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 0 +; RV64I-NEXT: call __atomic_load_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_load_f32_monotonic: +; RV64IA: # %bb.0: +; RV64IA-NEXT: lw a0, 0(a0) +; RV64IA-NEXT: fmv.w.x fa0, a0 +; RV64IA-NEXT: ret + %1 = load atomic float, ptr %a monotonic, align 4 + ret float %1 +} + +define float @atomic_load_f32_acquire(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f32_acquire: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 2 +; RV32I-NEXT: call __atomic_load_4 +; RV32I-NEXT: fmv.w.x fa0, a0 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-WMO-LABEL: atomic_load_f32_acquire: +; RV32IA-WMO: # %bb.0: +; RV32IA-WMO-NEXT: lw a0, 0(a0) +; RV32IA-WMO-NEXT: fence r, rw +; RV32IA-WMO-NEXT: fmv.w.x fa0, a0 +; RV32IA-WMO-NEXT: ret +; +; RV32IA-TSO-LABEL: atomic_load_f32_acquire: +; RV32IA-TSO: # %bb.0: +; RV32IA-TSO-NEXT: lw a0, 0(a0) +; RV32IA-TSO-NEXT: fmv.w.x fa0, a0 +; RV32IA-TSO-NEXT: ret +; +; RV64I-LABEL: atomic_load_f32_acquire: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 2 +; RV64I-NEXT: call __atomic_load_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_load_f32_acquire: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: lw a0, 0(a0) +; RV64IA-WMO-NEXT: fence r, rw +; RV64IA-WMO-NEXT: fmv.w.x fa0, a0 +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_load_f32_acquire: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: lw a0, 0(a0) +; RV64IA-TSO-NEXT: fmv.w.x fa0, a0 +; RV64IA-TSO-NEXT: ret +; +; RV32IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f32_acquire: +; RV32IA-WMO-TRAILING-FENCE: # %bb.0: +; RV32IA-WMO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV32IA-WMO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV32IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f32_acquire: +; RV32IA-TSO-TRAILING-FENCE: # %bb.0: +; RV32IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV32IA-TSO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV32IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f32_acquire: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f32_acquire: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_load_f32_acquire: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: lw.aq a0, (a0) +; RV32IA-ZALASR-WMO-NEXT: fmv.w.x fa0, a0 +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_load_f32_acquire: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: lw a0, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: fmv.w.x fa0, a0 +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_f32_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: lw.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: fmv.w.x fa0, a0 +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_f32_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: lw a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: fmv.w.x fa0, a0 +; RV64IA-ZALASR-TSO-NEXT: ret + %1 = load atomic float, ptr %a acquire, align 4 + ret float %1 +} + +define float @atomic_load_f32_seq_cst(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f32_seq_cst: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 5 +; RV32I-NEXT: call __atomic_load_4 +; RV32I-NEXT: fmv.w.x fa0, a0 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-WMO-LABEL: atomic_load_f32_seq_cst: +; RV32IA-WMO: # %bb.0: +; RV32IA-WMO-NEXT: fence rw, rw +; RV32IA-WMO-NEXT: lw a0, 0(a0) +; RV32IA-WMO-NEXT: fence r, rw +; RV32IA-WMO-NEXT: fmv.w.x fa0, a0 +; RV32IA-WMO-NEXT: ret +; +; RV32IA-TSO-LABEL: atomic_load_f32_seq_cst: +; RV32IA-TSO: # %bb.0: +; RV32IA-TSO-NEXT: fence rw, rw +; RV32IA-TSO-NEXT: lw a0, 0(a0) +; RV32IA-TSO-NEXT: fmv.w.x fa0, a0 +; RV32IA-TSO-NEXT: ret +; +; RV64I-LABEL: atomic_load_f32_seq_cst: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 5 +; RV64I-NEXT: call __atomic_load_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_load_f32_seq_cst: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, rw +; RV64IA-WMO-NEXT: lw a0, 0(a0) +; RV64IA-WMO-NEXT: fence r, rw +; RV64IA-WMO-NEXT: fmv.w.x fa0, a0 +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_load_f32_seq_cst: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fence rw, rw +; RV64IA-TSO-NEXT: lw a0, 0(a0) +; RV64IA-TSO-NEXT: fmv.w.x fa0, a0 +; RV64IA-TSO-NEXT: ret +; +; RV32IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f32_seq_cst: +; RV32IA-WMO-TRAILING-FENCE: # %bb.0: +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV32IA-WMO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV32IA-WMO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV32IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f32_seq_cst: +; RV32IA-TSO-TRAILING-FENCE: # %bb.0: +; RV32IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV32IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV32IA-TSO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV32IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f32_seq_cst: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f32_seq_cst: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.w.x fa0, a0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_load_f32_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: lw.aq a0, (a0) +; RV32IA-ZALASR-NEXT: fmv.w.x fa0, a0 +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_f32_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: lw.aq a0, (a0) +; RV64IA-ZALASR-NEXT: fmv.w.x fa0, a0 +; RV64IA-ZALASR-NEXT: ret + %1 = load atomic float, ptr %a seq_cst, align 4 + ret float %1 +} + +define double @atomic_load_f64_unordered(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f64_unordered: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 0 +; RV32I-NEXT: call __atomic_load_8 +; RV32I-NEXT: sw a0, 0(sp) +; RV32I-NEXT: sw a1, 4(sp) +; RV32I-NEXT: fld fa0, 0(sp) +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f64_unordered: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: li a1, 0 +; RV32IA-NEXT: call __atomic_load_8 +; RV32IA-NEXT: sw a0, 0(sp) +; RV32IA-NEXT: sw a1, 4(sp) +; RV32IA-NEXT: fld fa0, 0(sp) +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f64_unordered: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 0 +; RV64I-NEXT: call __atomic_load_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_load_f64_unordered: +; RV64IA: # %bb.0: +; RV64IA-NEXT: ld a0, 0(a0) +; RV64IA-NEXT: fmv.d.x fa0, a0 +; RV64IA-NEXT: ret + %1 = load atomic double, ptr %a unordered, align 8 + ret double %1 +} + +define double @atomic_load_f64_monotonic(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f64_monotonic: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 0 +; RV32I-NEXT: call __atomic_load_8 +; RV32I-NEXT: sw a0, 0(sp) +; RV32I-NEXT: sw a1, 4(sp) +; RV32I-NEXT: fld fa0, 0(sp) +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f64_monotonic: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: li a1, 0 +; RV32IA-NEXT: call __atomic_load_8 +; RV32IA-NEXT: sw a0, 0(sp) +; RV32IA-NEXT: sw a1, 4(sp) +; RV32IA-NEXT: fld fa0, 0(sp) +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f64_monotonic: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 0 +; RV64I-NEXT: call __atomic_load_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_load_f64_monotonic: +; RV64IA: # %bb.0: +; RV64IA-NEXT: ld a0, 0(a0) +; RV64IA-NEXT: fmv.d.x fa0, a0 +; RV64IA-NEXT: ret + %1 = load atomic double, ptr %a monotonic, align 8 + ret double %1 +} + +define double @atomic_load_f64_acquire(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f64_acquire: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 2 +; RV32I-NEXT: call __atomic_load_8 +; RV32I-NEXT: sw a0, 0(sp) +; RV32I-NEXT: sw a1, 4(sp) +; RV32I-NEXT: fld fa0, 0(sp) +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f64_acquire: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: li a1, 2 +; RV32IA-NEXT: call __atomic_load_8 +; RV32IA-NEXT: sw a0, 0(sp) +; RV32IA-NEXT: sw a1, 4(sp) +; RV32IA-NEXT: fld fa0, 0(sp) +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f64_acquire: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 2 +; RV64I-NEXT: call __atomic_load_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_load_f64_acquire: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: ld a0, 0(a0) +; RV64IA-WMO-NEXT: fence r, rw +; RV64IA-WMO-NEXT: fmv.d.x fa0, a0 +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_load_f64_acquire: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: ld a0, 0(a0) +; RV64IA-TSO-NEXT: fmv.d.x fa0, a0 +; RV64IA-TSO-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f64_acquire: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: ld a0, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.d.x fa0, a0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f64_acquire: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: ld a0, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.d.x fa0, a0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_f64_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: ld.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: fmv.d.x fa0, a0 +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_f64_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: ld a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: fmv.d.x fa0, a0 +; RV64IA-ZALASR-TSO-NEXT: ret + %1 = load atomic double, ptr %a acquire, align 8 + ret double %1 +} + +define double @atomic_load_f64_seq_cst(ptr %a) nounwind { +; RV32I-LABEL: atomic_load_f64_seq_cst: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a1, 5 +; RV32I-NEXT: call __atomic_load_8 +; RV32I-NEXT: sw a0, 0(sp) +; RV32I-NEXT: sw a1, 4(sp) +; RV32I-NEXT: fld fa0, 0(sp) +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_load_f64_seq_cst: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: li a1, 5 +; RV32IA-NEXT: call __atomic_load_8 +; RV32IA-NEXT: sw a0, 0(sp) +; RV32IA-NEXT: sw a1, 4(sp) +; RV32IA-NEXT: fld fa0, 0(sp) +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_load_f64_seq_cst: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a1, 5 +; RV64I-NEXT: call __atomic_load_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_load_f64_seq_cst: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, rw +; RV64IA-WMO-NEXT: ld a0, 0(a0) +; RV64IA-WMO-NEXT: fence r, rw +; RV64IA-WMO-NEXT: fmv.d.x fa0, a0 +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_load_f64_seq_cst: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fence rw, rw +; RV64IA-TSO-NEXT: ld a0, 0(a0) +; RV64IA-TSO-NEXT: fmv.d.x fa0, a0 +; RV64IA-TSO-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_load_f64_seq_cst: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: ld a0, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence r, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.d.x fa0, a0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_load_f64_seq_cst: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-TSO-TRAILING-FENCE-NEXT: ld a0, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.d.x fa0, a0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_f64_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: ld.aq a0, (a0) +; RV64IA-ZALASR-NEXT: fmv.d.x fa0, a0 +; RV64IA-ZALASR-NEXT: ret + %1 = load atomic double, ptr %a seq_cst, align 8 + ret double %1 +} + +define void @atomic_store_f32_unordered(ptr %a, float %b) nounwind { +; RV32I-LABEL: atomic_store_f32_unordered: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fmv.x.w a1, fa0 +; RV32I-NEXT: li a2, 0 +; RV32I-NEXT: call __atomic_store_4 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f32_unordered: +; RV32IA: # %bb.0: +; RV32IA-NEXT: fmv.x.w a1, fa0 +; RV32IA-NEXT: sw a1, 0(a0) +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f32_unordered: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 0 +; RV64I-NEXT: call __atomic_store_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_store_f32_unordered: +; RV64IA: # %bb.0: +; RV64IA-NEXT: fmv.x.w a1, fa0 +; RV64IA-NEXT: sw a1, 0(a0) +; RV64IA-NEXT: ret + store atomic float %b, ptr %a unordered, align 4 + ret void +} + +define void @atomic_store_f32_monotonic(ptr %a, float %b) nounwind { +; RV32I-LABEL: atomic_store_f32_monotonic: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fmv.x.w a1, fa0 +; RV32I-NEXT: li a2, 0 +; RV32I-NEXT: call __atomic_store_4 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f32_monotonic: +; RV32IA: # %bb.0: +; RV32IA-NEXT: fmv.x.w a1, fa0 +; RV32IA-NEXT: sw a1, 0(a0) +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f32_monotonic: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 0 +; RV64I-NEXT: call __atomic_store_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_store_f32_monotonic: +; RV64IA: # %bb.0: +; RV64IA-NEXT: fmv.x.w a1, fa0 +; RV64IA-NEXT: sw a1, 0(a0) +; RV64IA-NEXT: ret + store atomic float %b, ptr %a monotonic, align 4 + ret void +} + +define void @atomic_store_f32_release(ptr %a, float %b) nounwind { +; RV32I-LABEL: atomic_store_f32_release: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a2, 3 +; RV32I-NEXT: fmv.x.w a1, fa0 +; RV32I-NEXT: call __atomic_store_4 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-WMO-LABEL: atomic_store_f32_release: +; RV32IA-WMO: # %bb.0: +; RV32IA-WMO-NEXT: fence rw, w +; RV32IA-WMO-NEXT: fmv.x.w a1, fa0 +; RV32IA-WMO-NEXT: sw a1, 0(a0) +; RV32IA-WMO-NEXT: ret +; +; RV32IA-TSO-LABEL: atomic_store_f32_release: +; RV32IA-TSO: # %bb.0: +; RV32IA-TSO-NEXT: fmv.x.w a1, fa0 +; RV32IA-TSO-NEXT: sw a1, 0(a0) +; RV32IA-TSO-NEXT: ret +; +; RV64I-LABEL: atomic_store_f32_release: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 3 +; RV64I-NEXT: call __atomic_store_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_store_f32_release: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, w +; RV64IA-WMO-NEXT: fmv.x.w a1, fa0 +; RV64IA-WMO-NEXT: sw a1, 0(a0) +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_store_f32_release: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fmv.x.w a1, fa0 +; RV64IA-TSO-NEXT: sw a1, 0(a0) +; RV64IA-TSO-NEXT: ret +; +; RV32IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f32_release: +; RV32IA-WMO-TRAILING-FENCE: # %bb.0: +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV32IA-WMO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV32IA-WMO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV32IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f32_release: +; RV32IA-TSO-TRAILING-FENCE: # %bb.0: +; RV32IA-TSO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV32IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV32IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f32_release: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f32_release: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_store_f32_release: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: fmv.x.w a1, fa0 +; RV32IA-ZALASR-WMO-NEXT: sw.rl a1, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_store_f32_release: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: fmv.x.w a1, fa0 +; RV32IA-ZALASR-TSO-NEXT: sw a1, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_f32_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: fmv.x.w a1, fa0 +; RV64IA-ZALASR-WMO-NEXT: sw.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_f32_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: fmv.x.w a1, fa0 +; RV64IA-ZALASR-TSO-NEXT: sw a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret + store atomic float %b, ptr %a release, align 4 + ret void +} + +define void @atomic_store_f32_seq_cst(ptr %a, float %b) nounwind { +; RV32I-LABEL: atomic_store_f32_seq_cst: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: li a2, 5 +; RV32I-NEXT: fmv.x.w a1, fa0 +; RV32I-NEXT: call __atomic_store_4 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-WMO-LABEL: atomic_store_f32_seq_cst: +; RV32IA-WMO: # %bb.0: +; RV32IA-WMO-NEXT: fence rw, w +; RV32IA-WMO-NEXT: fmv.x.w a1, fa0 +; RV32IA-WMO-NEXT: sw a1, 0(a0) +; RV32IA-WMO-NEXT: ret +; +; RV32IA-TSO-LABEL: atomic_store_f32_seq_cst: +; RV32IA-TSO: # %bb.0: +; RV32IA-TSO-NEXT: fmv.x.w a1, fa0 +; RV32IA-TSO-NEXT: sw a1, 0(a0) +; RV32IA-TSO-NEXT: fence rw, rw +; RV32IA-TSO-NEXT: ret +; +; RV64I-LABEL: atomic_store_f32_seq_cst: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 5 +; RV64I-NEXT: call __atomic_store_4 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_store_f32_seq_cst: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, w +; RV64IA-WMO-NEXT: fmv.x.w a1, fa0 +; RV64IA-WMO-NEXT: sw a1, 0(a0) +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_store_f32_seq_cst: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fmv.x.w a1, fa0 +; RV64IA-TSO-NEXT: sw a1, 0(a0) +; RV64IA-TSO-NEXT: fence rw, rw +; RV64IA-TSO-NEXT: ret +; +; RV32IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f32_seq_cst: +; RV32IA-WMO-TRAILING-FENCE: # %bb.0: +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV32IA-WMO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV32IA-WMO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV32IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV32IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f32_seq_cst: +; RV32IA-TSO-TRAILING-FENCE: # %bb.0: +; RV32IA-TSO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV32IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV32IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV32IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f32_seq_cst: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f32_seq_cst: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.x.w a1, fa0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_store_f32_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: fmv.x.w a1, fa0 +; RV32IA-ZALASR-NEXT: sw.rl a1, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_f32_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: fmv.x.w a1, fa0 +; RV64IA-ZALASR-NEXT: sw.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret + store atomic float %b, ptr %a seq_cst, align 4 + ret void +} + +define void @atomic_store_f64_unordered(ptr %a, double %b) nounwind { +; RV32I-LABEL: atomic_store_f64_unordered: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fsd fa0, 0(sp) +; RV32I-NEXT: lw a1, 0(sp) +; RV32I-NEXT: lw a2, 4(sp) +; RV32I-NEXT: li a3, 0 +; RV32I-NEXT: call __atomic_store_8 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f64_unordered: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: fsd fa0, 0(sp) +; RV32IA-NEXT: lw a1, 0(sp) +; RV32IA-NEXT: lw a2, 4(sp) +; RV32IA-NEXT: li a3, 0 +; RV32IA-NEXT: call __atomic_store_8 +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f64_unordered: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 0 +; RV64I-NEXT: call __atomic_store_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_store_f64_unordered: +; RV64IA: # %bb.0: +; RV64IA-NEXT: fmv.x.d a1, fa0 +; RV64IA-NEXT: sd a1, 0(a0) +; RV64IA-NEXT: ret + store atomic double %b, ptr %a unordered, align 8 + ret void +} + +define void @atomic_store_f64_monotonic(ptr %a, double %b) nounwind { +; RV32I-LABEL: atomic_store_f64_monotonic: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fsd fa0, 0(sp) +; RV32I-NEXT: lw a1, 0(sp) +; RV32I-NEXT: lw a2, 4(sp) +; RV32I-NEXT: li a3, 0 +; RV32I-NEXT: call __atomic_store_8 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f64_monotonic: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: fsd fa0, 0(sp) +; RV32IA-NEXT: lw a1, 0(sp) +; RV32IA-NEXT: lw a2, 4(sp) +; RV32IA-NEXT: li a3, 0 +; RV32IA-NEXT: call __atomic_store_8 +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f64_monotonic: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 0 +; RV64I-NEXT: call __atomic_store_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-LABEL: atomic_store_f64_monotonic: +; RV64IA: # %bb.0: +; RV64IA-NEXT: fmv.x.d a1, fa0 +; RV64IA-NEXT: sd a1, 0(a0) +; RV64IA-NEXT: ret + store atomic double %b, ptr %a monotonic, align 8 + ret void +} + +define void @atomic_store_f64_release(ptr %a, double %b) nounwind { +; RV32I-LABEL: atomic_store_f64_release: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fsd fa0, 0(sp) +; RV32I-NEXT: lw a1, 0(sp) +; RV32I-NEXT: lw a2, 4(sp) +; RV32I-NEXT: li a3, 3 +; RV32I-NEXT: call __atomic_store_8 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f64_release: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: fsd fa0, 0(sp) +; RV32IA-NEXT: lw a1, 0(sp) +; RV32IA-NEXT: lw a2, 4(sp) +; RV32IA-NEXT: li a3, 3 +; RV32IA-NEXT: call __atomic_store_8 +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f64_release: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 3 +; RV64I-NEXT: call __atomic_store_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_store_f64_release: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, w +; RV64IA-WMO-NEXT: fmv.x.d a1, fa0 +; RV64IA-WMO-NEXT: sd a1, 0(a0) +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_store_f64_release: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fmv.x.d a1, fa0 +; RV64IA-TSO-NEXT: sd a1, 0(a0) +; RV64IA-TSO-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f64_release: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.x.d a1, fa0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: sd a1, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f64_release: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.x.d a1, fa0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: sd a1, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_f64_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: fmv.x.d a1, fa0 +; RV64IA-ZALASR-WMO-NEXT: sd.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_f64_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: fmv.x.d a1, fa0 +; RV64IA-ZALASR-TSO-NEXT: sd a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret + store atomic double %b, ptr %a release, align 8 + ret void +} + +define void @atomic_store_f64_seq_cst(ptr %a, double %b) nounwind { +; RV32I-LABEL: atomic_store_f64_seq_cst: +; RV32I: # %bb.0: +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: fsd fa0, 0(sp) +; RV32I-NEXT: lw a1, 0(sp) +; RV32I-NEXT: lw a2, 4(sp) +; RV32I-NEXT: li a3, 5 +; RV32I-NEXT: call __atomic_store_8 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 +; RV32I-NEXT: ret +; +; RV32IA-LABEL: atomic_store_f64_seq_cst: +; RV32IA: # %bb.0: +; RV32IA-NEXT: addi sp, sp, -16 +; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32IA-NEXT: fsd fa0, 0(sp) +; RV32IA-NEXT: lw a1, 0(sp) +; RV32IA-NEXT: lw a2, 4(sp) +; RV32IA-NEXT: li a3, 5 +; RV32IA-NEXT: call __atomic_store_8 +; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32IA-NEXT: addi sp, sp, 16 +; RV32IA-NEXT: ret +; +; RV64I-LABEL: atomic_store_f64_seq_cst: +; RV64I: # %bb.0: +; RV64I-NEXT: addi sp, sp, -16 +; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: li a2, 5 +; RV64I-NEXT: call __atomic_store_8 +; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 16 +; RV64I-NEXT: ret +; +; RV64IA-WMO-LABEL: atomic_store_f64_seq_cst: +; RV64IA-WMO: # %bb.0: +; RV64IA-WMO-NEXT: fence rw, w +; RV64IA-WMO-NEXT: fmv.x.d a1, fa0 +; RV64IA-WMO-NEXT: sd a1, 0(a0) +; RV64IA-WMO-NEXT: ret +; +; RV64IA-TSO-LABEL: atomic_store_f64_seq_cst: +; RV64IA-TSO: # %bb.0: +; RV64IA-TSO-NEXT: fmv.x.d a1, fa0 +; RV64IA-TSO-NEXT: sd a1, 0(a0) +; RV64IA-TSO-NEXT: fence rw, rw +; RV64IA-TSO-NEXT: ret +; +; RV64IA-WMO-TRAILING-FENCE-LABEL: atomic_store_f64_seq_cst: +; RV64IA-WMO-TRAILING-FENCE: # %bb.0: +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, w +; RV64IA-WMO-TRAILING-FENCE-NEXT: fmv.x.d a1, fa0 +; RV64IA-WMO-TRAILING-FENCE-NEXT: sd a1, 0(a0) +; RV64IA-WMO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-WMO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-TSO-TRAILING-FENCE-LABEL: atomic_store_f64_seq_cst: +; RV64IA-TSO-TRAILING-FENCE: # %bb.0: +; RV64IA-TSO-TRAILING-FENCE-NEXT: fmv.x.d a1, fa0 +; RV64IA-TSO-TRAILING-FENCE-NEXT: sd a1, 0(a0) +; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw +; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_f64_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: fmv.x.d a1, fa0 +; RV64IA-ZALASR-NEXT: sd.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret + store atomic double %b, ptr %a seq_cst, align 8 + ret void +} diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll b/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll index 1d5d918..5d3fed4 100644 --- a/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll +++ b/llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll @@ -23,6 +23,15 @@ ; RUN: llc -mtriple=riscv64 -global-isel -mattr=+a,+ztso -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO-TRAILING-FENCE %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+a,+experimental-zalasr -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZALASR,RV32IA-ZALASR-WMO %s +; RUN: llc -mtriple=riscv32 -global-isel -mattr=+a,+experimental-zalasr,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZALASR,RV32IA-ZALASR-TSO %s + +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+a,+experimental-zalasr -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZALASR,RV64IA-ZALASR-WMO %s +; RUN: llc -mtriple=riscv64 -global-isel -mattr=+a,+experimental-zalasr,+ztso -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZALASR,RV64IA-ZALASR-TSO %s define i8 @atomic_load_i8_unordered(ptr %a) nounwind { ; RV32I-LABEL: atomic_load_i8_unordered: @@ -156,6 +165,26 @@ define i8 @atomic_load_i8_acquire(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: lbu a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_load_i8_acquire: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: lb.aq a0, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_load_i8_acquire: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: lbu a0, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_i8_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: lb.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_i8_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: lbu a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret %1 = load atomic i8, ptr %a acquire, align 1 ret i8 %1 } @@ -232,6 +261,16 @@ define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: lbu a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_load_i8_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: lb.aq a0, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_i8_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: lb.aq a0, (a0) +; RV64IA-ZALASR-NEXT: ret %1 = load atomic i8, ptr %a seq_cst, align 1 ret i8 %1 } @@ -368,6 +407,26 @@ define i16 @atomic_load_i16_acquire(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: lh a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_load_i16_acquire: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: lh.aq a0, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_load_i16_acquire: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: lh a0, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_i16_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: lh.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_i16_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: lh a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret %1 = load atomic i16, ptr %a acquire, align 2 ret i16 %1 } @@ -444,6 +503,16 @@ define i16 @atomic_load_i16_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: lh a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_load_i16_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: lh.aq a0, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_i16_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: lh.aq a0, (a0) +; RV64IA-ZALASR-NEXT: ret %1 = load atomic i16, ptr %a seq_cst, align 2 ret i16 %1 } @@ -580,6 +649,26 @@ define i32 @atomic_load_i32_acquire(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_load_i32_acquire: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: lw.aq a0, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_load_i32_acquire: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: lw a0, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_i32_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: lw.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_i32_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: lw a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret %1 = load atomic i32, ptr %a acquire, align 4 ret i32 %1 } @@ -656,6 +745,16 @@ define i32 @atomic_load_i32_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: lw a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_load_i32_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: lw.aq a0, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_i32_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: lw.aq a0, (a0) +; RV64IA-ZALASR-NEXT: ret %1 = load atomic i32, ptr %a seq_cst, align 4 ret i32 %1 } @@ -790,6 +889,16 @@ define i64 @atomic_load_i64_acquire(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: ld a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_load_i64_acquire: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: ld.aq a0, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_load_i64_acquire: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: ld a0, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret %1 = load atomic i64, ptr %a acquire, align 8 ret i64 %1 } @@ -850,6 +959,11 @@ define i64 @atomic_load_i64_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: ld a0, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_load_i64_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: ld.aq a0, (a0) +; RV64IA-ZALASR-NEXT: ret %1 = load atomic i64, ptr %a seq_cst, align 8 ret i64 %1 } @@ -986,6 +1100,26 @@ define void @atomic_store_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: sb a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_store_i8_release: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: sb.rl a1, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_store_i8_release: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: sb a1, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_i8_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: sb.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_i8_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: sb a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret store atomic i8 %b, ptr %a release, align 1 ret void } @@ -1060,6 +1194,16 @@ define void @atomic_store_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: sb a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_store_i8_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: sb.rl a1, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_i8_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: sb.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret store atomic i8 %b, ptr %a seq_cst, align 1 ret void } @@ -1196,6 +1340,26 @@ define void @atomic_store_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: sh a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_store_i16_release: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: sh.rl a1, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_store_i16_release: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: sh a1, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_i16_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: sh.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_i16_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: sh a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret store atomic i16 %b, ptr %a release, align 2 ret void } @@ -1270,6 +1434,16 @@ define void @atomic_store_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: sh a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_store_i16_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: sh.rl a1, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_i16_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: sh.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret store atomic i16 %b, ptr %a seq_cst, align 2 ret void } @@ -1406,6 +1580,26 @@ define void @atomic_store_i32_release(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-WMO-LABEL: atomic_store_i32_release: +; RV32IA-ZALASR-WMO: # %bb.0: +; RV32IA-ZALASR-WMO-NEXT: sw.rl a1, (a0) +; RV32IA-ZALASR-WMO-NEXT: ret +; +; RV32IA-ZALASR-TSO-LABEL: atomic_store_i32_release: +; RV32IA-ZALASR-TSO: # %bb.0: +; RV32IA-ZALASR-TSO-NEXT: sw a1, 0(a0) +; RV32IA-ZALASR-TSO-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_i32_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: sw.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_i32_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: sw a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret store atomic i32 %b, ptr %a release, align 4 ret void } @@ -1480,6 +1674,16 @@ define void @atomic_store_i32_seq_cst(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: sw a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV32IA-ZALASR-LABEL: atomic_store_i32_seq_cst: +; RV32IA-ZALASR: # %bb.0: +; RV32IA-ZALASR-NEXT: sw.rl a1, (a0) +; RV32IA-ZALASR-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_i32_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: sw.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret store atomic i32 %b, ptr %a seq_cst, align 4 ret void } @@ -1614,6 +1818,16 @@ define void @atomic_store_i64_release(ptr %a, i64 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE: # %bb.0: ; RV64IA-TSO-TRAILING-FENCE-NEXT: sd a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-WMO-LABEL: atomic_store_i64_release: +; RV64IA-ZALASR-WMO: # %bb.0: +; RV64IA-ZALASR-WMO-NEXT: sd.rl a1, (a0) +; RV64IA-ZALASR-WMO-NEXT: ret +; +; RV64IA-ZALASR-TSO-LABEL: atomic_store_i64_release: +; RV64IA-ZALASR-TSO: # %bb.0: +; RV64IA-ZALASR-TSO-NEXT: sd a1, 0(a0) +; RV64IA-ZALASR-TSO-NEXT: ret store atomic i64 %b, ptr %a release, align 8 ret void } @@ -1673,6 +1887,11 @@ define void @atomic_store_i64_seq_cst(ptr %a, i64 %b) nounwind { ; RV64IA-TSO-TRAILING-FENCE-NEXT: sd a1, 0(a0) ; RV64IA-TSO-TRAILING-FENCE-NEXT: fence rw, rw ; RV64IA-TSO-TRAILING-FENCE-NEXT: ret +; +; RV64IA-ZALASR-LABEL: atomic_store_i64_seq_cst: +; RV64IA-ZALASR: # %bb.0: +; RV64IA-ZALASR-NEXT: sd.rl a1, (a0) +; RV64IA-ZALASR-NEXT: ret store atomic i64 %b, ptr %a seq_cst, align 8 ret void } diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv32.ll b/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv32.ll new file mode 100644 index 0000000..85a5d9a --- /dev/null +++ b/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv32.ll @@ -0,0 +1,22 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -global-isel -global-isel-abort=2 \ +; RUN: -pass-remarks-missed='gisel*' -mattr=+zve64d,+f,+d,+zvfh,+zvfbfmin \ +; RUN: %s -o %t.out 2> %t.err +; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out +; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err + +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: call +; FALLBACK-WITH-REPORT-OUT-LABEL: test_vlseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t +define target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vlseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t(ptr %base, i32 %vl) { +entry: + %0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, i32 %vl, i32 3) + ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %0 +} + +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower arguments +; FALLBACK-WITH-REPORT-OUT-LABEL: test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t +define void @test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i32 %vl) { +entry: + tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i32 %vl, i32 3) + ret void +} diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv64.ll b/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv64.ll new file mode 100644 index 0000000..b5405d3 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/GlobalISel/rvv/fallback-rv64.ll @@ -0,0 +1,22 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv64 -global-isel -global-isel-abort=2 \ +; RUN: -pass-remarks-missed='gisel*' -mattr=+zve64d,+f,+d,+zvfh,+zvfbfmin \ +; RUN: %s -o %t.out 2> %t.err +; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out +; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err + +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: call +; FALLBACK-WITH-REPORT-OUT-LABEL: test_vlseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t +define target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vlseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t(ptr %base, i64 %vl) { +entry: + %0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison, ptr %base, i64 %vl, i64 3) + ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %0 +} + +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower arguments +; FALLBACK-WITH-REPORT-OUT-LABEL: test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t +define void @test_vsseg2_nxv1i8_triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl) { +entry: + tail call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %val, ptr %base, i64 %vl, i64 3) + ret void +} diff --git a/llvm/test/CodeGen/RISCV/atomic-rmw.ll b/llvm/test/CodeGen/RISCV/atomic-rmw.ll index b0510f8..1213256 100644 --- a/llvm/test/CodeGen/RISCV/atomic-rmw.ll +++ b/llvm/test/CodeGen/RISCV/atomic-rmw.ll @@ -21,10 +21,19 @@ ; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO,RV64IA-TSO-ZACAS %s +; RUN: llc -mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO,RV32IA-WMO-ZABHA,RV32IA-WMO-ZABHA-NOZACAS %s +; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO,RV32IA-TSO-ZABHA,RV32IA-TSO-ZABHA-NOZACAS %s ; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-NOZACAS %s ; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-NOZACAS %s + +; RUN: llc -mtriple=riscv32 -mattr=+a,+zabha,+zacas -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO,RV32IA-WMO-ZABHA,RV32IA-WMO-ZABHA-ZACAS %s +; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zabha,+zacas -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO,RV32IA-TSO-ZABHA,RV32IA-TSO-ZABHA-ZACAS %s ; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha,+zacas -verify-machineinstrs < %s \ ; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-ZACAS %s ; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha,+zacas -verify-machineinstrs < %s \ @@ -41,25 +50,25 @@ define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: mv a5, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB0_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: mv a5, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB0_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i8_monotonic: ; RV64I: # %bb.0: @@ -91,6 +100,26 @@ define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: mv a5, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB0_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -111,6 +140,16 @@ define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b a0, a1, (a0) @@ -135,45 +174,45 @@ define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB1_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB1_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB1_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB1_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i8_acquire: ; RV64I: # %bb.0: @@ -225,6 +264,46 @@ define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB1_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB1_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -265,6 +344,16 @@ define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aq a0, a1, (a0) @@ -289,45 +378,45 @@ define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB2_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB2_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB2_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB2_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i8_release: ; RV64I: # %bb.0: @@ -379,6 +468,46 @@ define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB2_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB2_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -419,6 +548,16 @@ define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.rl a0, a1, (a0) @@ -443,45 +582,45 @@ define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB3_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB3_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB3_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB3_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i8_acq_rel: ; RV64I: # %bb.0: @@ -533,6 +672,46 @@ define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB3_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB3_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -573,6 +752,16 @@ define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) @@ -597,25 +786,25 @@ define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: mv a5, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB4_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: mv a5, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB4_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i8_seq_cst: ; RV64I: # %bb.0: @@ -647,6 +836,26 @@ define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: mv a5, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB4_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -667,6 +876,16 @@ define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) @@ -695,16 +914,16 @@ define i8 @atomicrmw_xchg_0_i8_monotonic(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_0_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a1, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a2, 255 -; RV32IA-NEXT: sll a2, a2, a0 -; RV32IA-NEXT: not a2, a2 -; RV32IA-NEXT: amoand.w a1, a2, (a1) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_0_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a2, 255 +; RV32IA-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-NOZACAS-NEXT: not a2, a2 +; RV32IA-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i8_monotonic: ; RV64I: # %bb.0: @@ -728,6 +947,17 @@ define i8 @atomicrmw_xchg_0_i8_monotonic(ptr %a) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_0_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a2, 255 +; RV32IA-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-ZACAS-NEXT: not a2, a2 +; RV32IA-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_0_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a1, a0, -4 @@ -739,6 +969,16 @@ define i8 @atomicrmw_xchg_0_i8_monotonic(ptr %a) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b a0, zero, (a0) @@ -764,27 +1004,27 @@ define i8 @atomicrmw_xchg_0_i8_acquire(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aq a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aq a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i8_acquire: ; RV64I: # %bb.0: @@ -819,6 +1059,28 @@ define i8 @atomicrmw_xchg_0_i8_acquire(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aq a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -841,6 +1103,16 @@ define i8 @atomicrmw_xchg_0_i8_acquire(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aq a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aq a0, zero, (a0) @@ -866,27 +1138,27 @@ define i8 @atomicrmw_xchg_0_i8_release(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.rl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.rl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i8_release: ; RV64I: # %bb.0: @@ -921,6 +1193,28 @@ define i8 @atomicrmw_xchg_0_i8_release(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.rl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -943,6 +1237,16 @@ define i8 @atomicrmw_xchg_0_i8_release(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.rl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.rl a0, zero, (a0) @@ -968,27 +1272,27 @@ define i8 @atomicrmw_xchg_0_i8_acq_rel(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i8_acq_rel: ; RV64I: # %bb.0: @@ -1023,6 +1327,28 @@ define i8 @atomicrmw_xchg_0_i8_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1045,6 +1371,16 @@ define i8 @atomicrmw_xchg_0_i8_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, zero, (a0) @@ -1070,27 +1406,27 @@ define i8 @atomicrmw_xchg_0_i8_seq_cst(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i8_seq_cst: ; RV64I: # %bb.0: @@ -1125,6 +1461,28 @@ define i8 @atomicrmw_xchg_0_i8_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1147,6 +1505,16 @@ define i8 @atomicrmw_xchg_0_i8_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, zero, (a0) @@ -1172,15 +1540,15 @@ define i8 @atomicrmw_xchg_minus_1_i8_monotonic(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a1, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a2, 255 -; RV32IA-NEXT: sll a2, a2, a0 -; RV32IA-NEXT: amoor.w a1, a2, (a1) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a2, 255 +; RV32IA-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: ; RV64I: # %bb.0: @@ -1203,6 +1571,16 @@ define i8 @atomicrmw_xchg_minus_1_i8_monotonic(ptr %a) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a2, 255 +; RV32IA-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a1, a0, -4 @@ -1213,6 +1591,18 @@ define i8 @atomicrmw_xchg_minus_1_i8_monotonic(ptr %a) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -1240,25 +1630,25 @@ define i8 @atomicrmw_xchg_minus_1_i8_acquire(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aq a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aq a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_acquire: ; RV64I: # %bb.0: @@ -1291,6 +1681,26 @@ define i8 @atomicrmw_xchg_minus_1_i8_acquire(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aq a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1311,6 +1721,18 @@ define i8 @atomicrmw_xchg_minus_1_i8_acquire(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -1338,25 +1760,25 @@ define i8 @atomicrmw_xchg_minus_1_i8_release(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.rl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.rl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_release: ; RV64I: # %bb.0: @@ -1389,6 +1811,26 @@ define i8 @atomicrmw_xchg_minus_1_i8_release(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.rl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1409,6 +1851,18 @@ define i8 @atomicrmw_xchg_minus_1_i8_release(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -1436,25 +1890,25 @@ define i8 @atomicrmw_xchg_minus_1_i8_acq_rel(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: ; RV64I: # %bb.0: @@ -1487,6 +1941,26 @@ define i8 @atomicrmw_xchg_minus_1_i8_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1507,6 +1981,18 @@ define i8 @atomicrmw_xchg_minus_1_i8_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -1534,25 +2020,25 @@ define i8 @atomicrmw_xchg_minus_1_i8_seq_cst(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a2, 255 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a2, 255 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a2, 255 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a2, 255 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: ; RV64I: # %bb.0: @@ -1585,6 +2071,26 @@ define i8 @atomicrmw_xchg_minus_1_i8_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a2, 255 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a2, 255 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -1605,6 +2111,18 @@ define i8 @atomicrmw_xchg_minus_1_i8_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -1631,25 +2149,25 @@ define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_add_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: add a5, a4, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB15_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_add_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB15_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i8_monotonic: ; RV64I: # %bb.0: @@ -1681,6 +2199,26 @@ define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_add_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB15_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_add_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -1701,6 +2239,16 @@ define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.b a0, a1, (a0) @@ -1725,45 +2273,45 @@ define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: add a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB16_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB16_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: add a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB16_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB16_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i8_acquire: ; RV64I: # %bb.0: @@ -1815,6 +2363,46 @@ define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB16_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB16_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -1855,6 +2443,16 @@ define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.b.aq a0, a1, (a0) @@ -1879,45 +2477,45 @@ define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: add a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB17_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB17_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: add a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB17_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB17_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i8_release: ; RV64I: # %bb.0: @@ -1969,6 +2567,46 @@ define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB17_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB17_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -2009,6 +2647,16 @@ define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.b.rl a0, a1, (a0) @@ -2033,45 +2681,45 @@ define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: add a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB18_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB18_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: add a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB18_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB18_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i8_acq_rel: ; RV64I: # %bb.0: @@ -2123,6 +2771,46 @@ define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB18_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB18_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -2163,6 +2851,16 @@ define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) @@ -2187,25 +2885,25 @@ define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_add_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: add a5, a4, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB19_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_add_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: add a5, a4, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB19_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i8_seq_cst: ; RV64I: # %bb.0: @@ -2237,6 +2935,26 @@ define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_add_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: add a5, a4, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB19_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_add_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -2257,6 +2975,16 @@ define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) @@ -2281,25 +3009,25 @@ define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_sub_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: sub a5, a4, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB20_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_sub_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB20_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i8_monotonic: ; RV64I: # %bb.0: @@ -2331,6 +3059,26 @@ define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_sub_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB20_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_sub_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -2351,6 +3099,18 @@ define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -2377,45 +3137,45 @@ define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: sub a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB21_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB21_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: sub a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB21_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB21_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i8_acquire: ; RV64I: # %bb.0: @@ -2467,6 +3227,46 @@ define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB21_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB21_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -2507,6 +3307,18 @@ define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -2533,45 +3345,45 @@ define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: sub a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB22_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB22_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: sub a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB22_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB22_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i8_release: ; RV64I: # %bb.0: @@ -2623,6 +3435,46 @@ define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB22_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB22_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -2663,6 +3515,18 @@ define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -2689,45 +3553,45 @@ define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: sub a5, a4, a1 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB23_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB23_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: sub a5, a4, a1 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB23_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB23_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i8_acq_rel: ; RV64I: # %bb.0: @@ -2779,6 +3643,46 @@ define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB23_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB23_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -2819,6 +3723,18 @@ define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -2845,25 +3761,25 @@ define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_sub_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: sub a5, a4, a1 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB24_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_sub_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: sub a5, a4, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB24_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i8_seq_cst: ; RV64I: # %bb.0: @@ -2895,6 +3811,26 @@ define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_sub_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: sub a5, a4, a1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB24_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_sub_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -2915,6 +3851,18 @@ define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -2941,19 +3889,19 @@ define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_and_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: not a3, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: or a1, a1, a3 -; RV32IA-NEXT: amoand.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_and_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: not a3, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i8_monotonic: ; RV64I: # %bb.0: @@ -2979,6 +3927,20 @@ define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_and_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: not a3, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_and_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -2993,6 +3955,16 @@ define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.b a0, a1, (a0) @@ -3017,33 +3989,33 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: not a3, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: not a3, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i8_acquire: ; RV64I: # %bb.0: @@ -3083,6 +4055,34 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -3111,6 +4111,16 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.b.aq a0, a1, (a0) @@ -3135,33 +4145,33 @@ define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: not a3, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: not a3, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i8_release: ; RV64I: # %bb.0: @@ -3201,6 +4211,34 @@ define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -3229,6 +4267,16 @@ define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.b.rl a0, a1, (a0) @@ -3253,33 +4301,33 @@ define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: not a3, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: not a3, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i8_acq_rel: ; RV64I: # %bb.0: @@ -3319,6 +4367,34 @@ define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -3347,6 +4423,16 @@ define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.b.aqrl a0, a1, (a0) @@ -3371,33 +4457,33 @@ define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i8_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: not a3, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i8_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: not a3, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i8_seq_cst: ; RV64I: # %bb.0: @@ -3437,6 +4523,34 @@ define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -3465,6 +4579,16 @@ define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.b.aqrl a0, a1, (a0) @@ -3489,26 +4613,26 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_nand_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: and a5, a4, a1 -; RV32IA-NEXT: not a5, a5 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB30_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-NOZACAS-NEXT: not a5, a5 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB30_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i8_monotonic: ; RV64I: # %bb.0: @@ -3541,6 +4665,27 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-ZACAS-NEXT: not a5, a5 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB30_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -3562,6 +4707,48 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB30_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB30_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -3604,6 +4791,36 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB30_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB30_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB30_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB30_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -3648,47 +4865,47 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a5, a4, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB31_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a5, a4, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB31_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i8_acquire: ; RV64I: # %bb.0: @@ -3742,6 +4959,48 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -3784,6 +5043,48 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB31_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -3826,6 +5127,36 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB31_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.b.aq a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB31_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB31_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB31_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -3870,47 +5201,47 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: and a5, a4, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB32_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a5, a4, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB32_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i8_release: ; RV64I: # %bb.0: @@ -3964,6 +5295,48 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4006,6 +5379,48 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB32_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -4048,6 +5463,36 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB32_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.b.rl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB32_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB32_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB32_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -4092,47 +5537,47 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a5, a4, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB33_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a5, a4, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB33_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i8_acq_rel: ; RV64I: # %bb.0: @@ -4186,6 +5631,48 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4228,6 +5715,48 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB33_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -4270,6 +5799,36 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB33_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.b.aqrl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB33_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB33_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB33_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -4314,26 +5873,26 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_nand_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: and a5, a4, a1 -; RV32IA-NEXT: not a5, a5 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB34_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-NOZACAS-NEXT: not a5, a5 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB34_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i8_seq_cst: ; RV64I: # %bb.0: @@ -4366,6 +5925,27 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: and a5, a4, a1 +; RV32IA-ZACAS-NEXT: not a5, a5 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB34_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -4387,6 +5967,48 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB34_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a4, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB34_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -4429,6 +6051,38 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB34_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.b.aqrl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB34_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lbu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB34_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.b a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 24 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB34_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -4475,15 +6129,15 @@ define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_or_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: amoor.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_or_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i8_monotonic: ; RV64I: # %bb.0: @@ -4505,6 +6159,16 @@ define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_or_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_or_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -4515,6 +6179,16 @@ define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.b a0, a1, (a0) @@ -4539,25 +6213,25 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i8_acquire: ; RV64I: # %bb.0: @@ -4589,6 +6263,26 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4609,6 +6303,16 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.b.aq a0, a1, (a0) @@ -4633,25 +6337,25 @@ define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i8_release: ; RV64I: # %bb.0: @@ -4683,6 +6387,26 @@ define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4703,6 +6427,16 @@ define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.b.rl a0, a1, (a0) @@ -4727,25 +6461,25 @@ define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i8_acq_rel: ; RV64I: # %bb.0: @@ -4777,6 +6511,26 @@ define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4797,6 +6551,16 @@ define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.b.aqrl a0, a1, (a0) @@ -4821,25 +6585,25 @@ define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i8_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i8_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i8_seq_cst: ; RV64I: # %bb.0: @@ -4871,6 +6635,26 @@ define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -4891,6 +6675,16 @@ define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.b.aqrl a0, a1, (a0) @@ -4915,15 +6709,15 @@ define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xor_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xor_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i8_monotonic: ; RV64I: # %bb.0: @@ -4945,6 +6739,16 @@ define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xor_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xor_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -4955,6 +6759,16 @@ define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.b a0, a1, (a0) @@ -4979,25 +6793,25 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i8_acquire: ; RV64I: # %bb.0: @@ -5029,6 +6843,26 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -5049,6 +6883,16 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.b.aq a0, a1, (a0) @@ -5073,25 +6917,25 @@ define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i8_release: ; RV64I: # %bb.0: @@ -5123,6 +6967,26 @@ define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -5143,6 +7007,16 @@ define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.b.rl a0, a1, (a0) @@ -5167,25 +7041,25 @@ define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i8_acq_rel: ; RV64I: # %bb.0: @@ -5217,6 +7091,26 @@ define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -5237,6 +7131,16 @@ define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.b.aqrl a0, a1, (a0) @@ -5261,25 +7165,25 @@ define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i8_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i8_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i8_seq_cst: ; RV64I: # %bb.0: @@ -5311,6 +7215,26 @@ define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -5331,6 +7255,16 @@ define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.b.aqrl a0, a1, (a0) @@ -5387,34 +7321,34 @@ define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_max_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: slli a1, a1, 24 -; RV32IA-NEXT: andi a4, a0, 24 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: srai a1, a1, 24 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: xori a4, a4, 24 -; RV32IA-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a7, a1, .LBB45_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1 -; RV32IA-NEXT: sc.w a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB45_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_max_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-NOZACAS-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a7, a1, .LBB45_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB45_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i8_monotonic: ; RV64I: # %bb.0: @@ -5487,6 +7421,35 @@ define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_max_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-ZACAS-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a7, a1, .LBB45_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB45_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_max_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -5516,6 +7479,16 @@ define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.b a0, a1, (a0) @@ -5572,63 +7545,63 @@ define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB46_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB46_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB46_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB46_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB46_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB46_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB46_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB46_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i8_acquire: ; RV64I: # %bb.0: @@ -5730,6 +7703,64 @@ define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB46_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB46_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB46_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB46_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -5788,6 +7819,16 @@ define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.b.aq a0, a1, (a0) @@ -5844,63 +7885,63 @@ define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB47_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB47_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB47_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB47_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB47_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB47_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB47_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB47_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i8_release: ; RV64I: # %bb.0: @@ -6002,6 +8043,64 @@ define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB47_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB47_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB47_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB47_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -6060,6 +8159,16 @@ define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.b.rl a0, a1, (a0) @@ -6116,63 +8225,63 @@ define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB48_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB48_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB48_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB48_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB48_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB48_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB48_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB48_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i8_acq_rel: ; RV64I: # %bb.0: @@ -6274,6 +8383,64 @@ define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB48_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB48_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB48_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB48_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -6332,6 +8499,16 @@ define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0) @@ -6388,34 +8565,34 @@ define i8 @atomicrmw_max_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_max_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: slli a1, a1, 24 -; RV32IA-NEXT: andi a4, a0, 24 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: srai a1, a1, 24 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: xori a4, a4, 24 -; RV32IA-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a7, a1, .LBB49_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB49_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_max_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-NOZACAS-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a7, a1, .LBB49_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB49_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i8_seq_cst: ; RV64I: # %bb.0: @@ -6488,6 +8665,35 @@ define i8 @atomicrmw_max_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_max_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-ZACAS-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a7, a1, .LBB49_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB49_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_max_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -6517,6 +8723,16 @@ define i8 @atomicrmw_max_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0) @@ -6573,34 +8789,34 @@ define i8 @atomicrmw_min_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_min_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: slli a1, a1, 24 -; RV32IA-NEXT: andi a4, a0, 24 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: srai a1, a1, 24 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: xori a4, a4, 24 -; RV32IA-NEXT: .LBB50_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a1, a7, .LBB50_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB50_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB50_3: # in Loop: Header=BB50_1 Depth=1 -; RV32IA-NEXT: sc.w a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB50_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_min_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-NOZACAS-NEXT: .LBB50_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a1, a7, .LBB50_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB50_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB50_3: # in Loop: Header=BB50_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB50_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i8_monotonic: ; RV64I: # %bb.0: @@ -6673,6 +8889,35 @@ define i8 @atomicrmw_min_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_min_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-ZACAS-NEXT: .LBB50_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a1, a7, .LBB50_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB50_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB50_3: # in Loop: Header=BB50_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB50_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_min_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -6702,6 +8947,16 @@ define i8 @atomicrmw_min_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.b a0, a1, (a0) @@ -6758,63 +9013,63 @@ define i8 @atomicrmw_min_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB51_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB51_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB51_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB51_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB51_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB51_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB51_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB51_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i8_acquire: ; RV64I: # %bb.0: @@ -6916,6 +9171,64 @@ define i8 @atomicrmw_min_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB51_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB51_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB51_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB51_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -6974,6 +9287,16 @@ define i8 @atomicrmw_min_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.b.aq a0, a1, (a0) @@ -7030,63 +9353,63 @@ define i8 @atomicrmw_min_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB52_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB52_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB52_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB52_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB52_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB52_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB52_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB52_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i8_release: ; RV64I: # %bb.0: @@ -7188,6 +9511,64 @@ define i8 @atomicrmw_min_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB52_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB52_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB52_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB52_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -7246,6 +9627,16 @@ define i8 @atomicrmw_min_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.b.rl a0, a1, (a0) @@ -7302,63 +9693,63 @@ define i8 @atomicrmw_min_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: slli a1, a1, 24 -; RV32IA-WMO-NEXT: andi a4, a0, 24 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: srai a1, a1, 24 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: xori a4, a4, 24 -; RV32IA-WMO-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB53_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB53_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-NOZACAS-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB53_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB53_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: slli a1, a1, 24 -; RV32IA-TSO-NEXT: andi a4, a0, 24 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: srai a1, a1, 24 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: xori a4, a4, 24 -; RV32IA-TSO-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB53_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB53_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-NOZACAS-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB53_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB53_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i8_acq_rel: ; RV64I: # %bb.0: @@ -7460,6 +9851,64 @@ define i8 @atomicrmw_min_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-WMO-ZACAS-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB53_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB53_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-TSO-ZACAS-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB53_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB53_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -7518,6 +9967,16 @@ define i8 @atomicrmw_min_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0) @@ -7574,34 +10033,34 @@ define i8 @atomicrmw_min_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_min_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: slli a1, a1, 24 -; RV32IA-NEXT: andi a4, a0, 24 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: srai a1, a1, 24 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: xori a4, a4, 24 -; RV32IA-NEXT: .LBB54_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a1, a7, .LBB54_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB54_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB54_3: # in Loop: Header=BB54_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB54_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_min_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 24 +; RV32IA-NOZACAS-NEXT: andi a4, a0, 24 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 24 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: xori a4, a4, 24 +; RV32IA-NOZACAS-NEXT: .LBB54_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a1, a7, .LBB54_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB54_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB54_3: # in Loop: Header=BB54_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB54_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i8_seq_cst: ; RV64I: # %bb.0: @@ -7674,6 +10133,35 @@ define i8 @atomicrmw_min_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_min_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: slli a1, a1, 24 +; RV32IA-ZACAS-NEXT: andi a4, a0, 24 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: srai a1, a1, 24 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: xori a4, a4, 24 +; RV32IA-ZACAS-NEXT: .LBB54_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a1, a7, .LBB54_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB54_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB54_3: # in Loop: Header=BB54_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB54_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_min_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -7703,6 +10191,16 @@ define i8 @atomicrmw_min_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0) @@ -7757,29 +10255,29 @@ define i8 @atomicrmw_umax_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umax_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB55_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: and a6, a4, a3 -; RV32IA-NEXT: mv a5, a4 -; RV32IA-NEXT: bgeu a6, a1, .LBB55_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB55_1 Depth=1 -; RV32IA-NEXT: xor a5, a4, a1 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: .LBB55_3: # in Loop: Header=BB55_1 Depth=1 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB55_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umax_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB55_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-NOZACAS-NEXT: mv a5, a4 +; RV32IA-NOZACAS-NEXT: bgeu a6, a1, .LBB55_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB55_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB55_3: # in Loop: Header=BB55_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB55_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i8_monotonic: ; RV64I: # %bb.0: @@ -7845,6 +10343,30 @@ define i8 @atomicrmw_umax_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umax_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB55_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-ZACAS-NEXT: mv a5, a4 +; RV32IA-ZACAS-NEXT: bgeu a6, a1, .LBB55_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB55_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB55_3: # in Loop: Header=BB55_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB55_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umax_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -7869,6 +10391,16 @@ define i8 @atomicrmw_umax_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) @@ -7923,53 +10455,53 @@ define i8 @atomicrmw_umax_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB56_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB56_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB56_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB56_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB56_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB56_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB56_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB56_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i8_acquire: ; RV64I: # %bb.0: @@ -8059,6 +10591,54 @@ define i8 @atomicrmw_umax_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB56_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB56_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB56_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB56_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -8107,6 +10687,16 @@ define i8 @atomicrmw_umax_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.b.aq a0, a1, (a0) @@ -8161,53 +10751,53 @@ define i8 @atomicrmw_umax_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB57_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB57_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB57_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB57_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB57_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB57_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB57_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB57_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i8_release: ; RV64I: # %bb.0: @@ -8297,6 +10887,54 @@ define i8 @atomicrmw_umax_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB57_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB57_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB57_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB57_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -8345,6 +10983,16 @@ define i8 @atomicrmw_umax_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.b.rl a0, a1, (a0) @@ -8399,53 +11047,53 @@ define i8 @atomicrmw_umax_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB58_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB58_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB58_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB58_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB58_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB58_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB58_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB58_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i8_acq_rel: ; RV64I: # %bb.0: @@ -8535,6 +11183,54 @@ define i8 @atomicrmw_umax_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB58_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB58_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB58_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB58_3: # in Loop: Header=BB58_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB58_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -8583,6 +11279,16 @@ define i8 @atomicrmw_umax_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0) @@ -8637,29 +11343,29 @@ define i8 @atomicrmw_umax_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB59_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: and a6, a4, a3 -; RV32IA-NEXT: mv a5, a4 -; RV32IA-NEXT: bgeu a6, a1, .LBB59_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB59_1 Depth=1 -; RV32IA-NEXT: xor a5, a4, a1 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: .LBB59_3: # in Loop: Header=BB59_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB59_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umax_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB59_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-NOZACAS-NEXT: mv a5, a4 +; RV32IA-NOZACAS-NEXT: bgeu a6, a1, .LBB59_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB59_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB59_3: # in Loop: Header=BB59_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB59_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i8_seq_cst: ; RV64I: # %bb.0: @@ -8725,6 +11431,30 @@ define i8 @atomicrmw_umax_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umax_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB59_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-ZACAS-NEXT: mv a5, a4 +; RV32IA-ZACAS-NEXT: bgeu a6, a1, .LBB59_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB59_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB59_3: # in Loop: Header=BB59_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB59_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umax_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -8749,6 +11479,16 @@ define i8 @atomicrmw_umax_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0) @@ -8803,29 +11543,29 @@ define i8 @atomicrmw_umin_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umin_i8_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a4, (a2) -; RV32IA-NEXT: and a6, a4, a3 -; RV32IA-NEXT: mv a5, a4 -; RV32IA-NEXT: bgeu a1, a6, .LBB60_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB60_1 Depth=1 -; RV32IA-NEXT: xor a5, a4, a1 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: .LBB60_3: # in Loop: Header=BB60_1 Depth=1 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB60_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umin_i8_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-NOZACAS-NEXT: mv a5, a4 +; RV32IA-NOZACAS-NEXT: bgeu a1, a6, .LBB60_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB60_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB60_3: # in Loop: Header=BB60_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB60_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i8_monotonic: ; RV64I: # %bb.0: @@ -8891,6 +11631,30 @@ define i8 @atomicrmw_umin_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umin_i8_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-ZACAS-NEXT: mv a5, a4 +; RV32IA-ZACAS-NEXT: bgeu a1, a6, .LBB60_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB60_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB60_3: # in Loop: Header=BB60_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB60_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umin_i8_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -8915,6 +11679,16 @@ define i8 @atomicrmw_umin_i8_monotonic(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.b a0, a1, (a0) @@ -8969,53 +11743,53 @@ define i8 @atomicrmw_umin_i8_acquire(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i8_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB61_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB61_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB61_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB61_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i8_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB61_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB61_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB61_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB61_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i8_acquire: ; RV64I: # %bb.0: @@ -9105,6 +11879,54 @@ define i8 @atomicrmw_umin_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB61_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB61_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB61_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB61_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -9153,6 +11975,16 @@ define i8 @atomicrmw_umin_i8_acquire(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.b.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.b.aq a0, a1, (a0) @@ -9207,53 +12039,53 @@ define i8 @atomicrmw_umin_i8_release(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i8_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB62_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB62_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB62_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB62_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i8_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB62_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB62_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB62_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB62_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i8_release: ; RV64I: # %bb.0: @@ -9343,6 +12175,54 @@ define i8 @atomicrmw_umin_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB62_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB62_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB62_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB62_3: # in Loop: Header=BB62_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB62_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -9391,6 +12271,16 @@ define i8 @atomicrmw_umin_i8_release(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.b.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.b.rl a0, a1, (a0) @@ -9445,53 +12335,53 @@ define i8 @atomicrmw_umin_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i8_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: li a3, 255 -; RV32IA-WMO-NEXT: zext.b a1, a1 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a4, (a2) -; RV32IA-WMO-NEXT: and a6, a4, a3 -; RV32IA-WMO-NEXT: mv a5, a4 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB63_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a4, a1 -; RV32IA-WMO-NEXT: and a5, a5, a3 -; RV32IA-WMO-NEXT: xor a5, a4, a5 -; RV32IA-WMO-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB63_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a4, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: li a3, 255 +; RV32IA-WMO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB63_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB63_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i8_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: li a3, 255 -; RV32IA-TSO-NEXT: zext.b a1, a1 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a4, (a2) -; RV32IA-TSO-NEXT: and a6, a4, a3 -; RV32IA-TSO-NEXT: mv a5, a4 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB63_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a4, a1 -; RV32IA-TSO-NEXT: and a5, a5, a3 -; RV32IA-TSO-NEXT: xor a5, a4, a5 -; RV32IA-TSO-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB63_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a4, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: li a3, 255 +; RV32IA-TSO-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB63_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB63_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i8_acq_rel: ; RV64I: # %bb.0: @@ -9581,6 +12471,54 @@ define i8 @atomicrmw_umin_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: li a3, 255 +; RV32IA-WMO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a4, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a4 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB63_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB63_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: li a3, 255 +; RV32IA-TSO-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a4, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a4 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB63_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB63_3: # in Loop: Header=BB63_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB63_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -9629,6 +12567,16 @@ define i8 @atomicrmw_umin_i8_acq_rel(ptr %a, i8 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0) @@ -9683,29 +12631,29 @@ define i8 @atomicrmw_umin_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: li a3, 255 -; RV32IA-NEXT: zext.b a1, a1 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a4, (a2) -; RV32IA-NEXT: and a6, a4, a3 -; RV32IA-NEXT: mv a5, a4 -; RV32IA-NEXT: bgeu a1, a6, .LBB64_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB64_1 Depth=1 -; RV32IA-NEXT: xor a5, a4, a1 -; RV32IA-NEXT: and a5, a5, a3 -; RV32IA-NEXT: xor a5, a4, a5 -; RV32IA-NEXT: .LBB64_3: # in Loop: Header=BB64_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB64_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a4, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umin_i8_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: li a3, 255 +; RV32IA-NOZACAS-NEXT: zext.b a1, a1 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a4, a3 +; RV32IA-NOZACAS-NEXT: mv a5, a4 +; RV32IA-NOZACAS-NEXT: bgeu a1, a6, .LBB64_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB64_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a3 +; RV32IA-NOZACAS-NEXT: xor a5, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB64_3: # in Loop: Header=BB64_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB64_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a4, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i8_seq_cst: ; RV64I: # %bb.0: @@ -9771,6 +12719,30 @@ define i8 @atomicrmw_umin_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umin_i8_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: li a3, 255 +; RV32IA-ZACAS-NEXT: zext.b a1, a1 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a4, (a2) +; RV32IA-ZACAS-NEXT: and a6, a4, a3 +; RV32IA-ZACAS-NEXT: mv a5, a4 +; RV32IA-ZACAS-NEXT: bgeu a1, a6, .LBB64_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB64_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a4, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a3 +; RV32IA-ZACAS-NEXT: xor a5, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB64_3: # in Loop: Header=BB64_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB64_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a4, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umin_i8_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -9795,6 +12767,16 @@ define i8 @atomicrmw_umin_i8_seq_cst(ptr %a, i8 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a4, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.b a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0) @@ -9819,26 +12801,26 @@ define i16 @atomicrmw_xchg_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: mv a5, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB65_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: mv a5, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB65_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i16_monotonic: ; RV64I: # %bb.0: @@ -9871,6 +12853,27 @@ define i16 @atomicrmw_xchg_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: mv a5, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB65_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -9892,6 +12895,16 @@ define i16 @atomicrmw_xchg_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h a0, a1, (a0) @@ -9916,47 +12929,47 @@ define i16 @atomicrmw_xchg_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB66_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB66_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB66_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB66_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i16_acquire: ; RV64I: # %bb.0: @@ -10010,6 +13023,48 @@ define i16 @atomicrmw_xchg_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB66_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB66_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -10052,6 +13107,16 @@ define i16 @atomicrmw_xchg_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aq a0, a1, (a0) @@ -10076,47 +13141,47 @@ define i16 @atomicrmw_xchg_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB67_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB67_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB67_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB67_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i16_release: ; RV64I: # %bb.0: @@ -10170,6 +13235,48 @@ define i16 @atomicrmw_xchg_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB67_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB67_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -10212,6 +13319,16 @@ define i16 @atomicrmw_xchg_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.rl a0, a1, (a0) @@ -10236,47 +13353,47 @@ define i16 @atomicrmw_xchg_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: mv a5, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB68_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB68_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: mv a5, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB68_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB68_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i16_acq_rel: ; RV64I: # %bb.0: @@ -10330,6 +13447,48 @@ define i16 @atomicrmw_xchg_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: mv a5, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB68_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: mv a5, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB68_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -10372,6 +13531,16 @@ define i16 @atomicrmw_xchg_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) @@ -10396,26 +13565,26 @@ define i16 @atomicrmw_xchg_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: mv a5, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB69_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: mv a5, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB69_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_i16_seq_cst: ; RV64I: # %bb.0: @@ -10448,6 +13617,27 @@ define i16 @atomicrmw_xchg_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: mv a5, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB69_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -10469,6 +13659,16 @@ define i16 @atomicrmw_xchg_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) @@ -10497,17 +13697,17 @@ define i16 @atomicrmw_xchg_0_i16_monotonic(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_0_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a1, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a2, 16 -; RV32IA-NEXT: addi a2, a2, -1 -; RV32IA-NEXT: sll a2, a2, a0 -; RV32IA-NEXT: not a2, a2 -; RV32IA-NEXT: amoand.w a1, a2, (a1) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_0_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a2, 16 +; RV32IA-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-NOZACAS-NEXT: not a2, a2 +; RV32IA-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i16_monotonic: ; RV64I: # %bb.0: @@ -10532,6 +13732,18 @@ define i16 @atomicrmw_xchg_0_i16_monotonic(ptr %a) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_0_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a2, 16 +; RV32IA-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-ZACAS-NEXT: not a2, a2 +; RV32IA-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_0_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a1, a0, -4 @@ -10544,6 +13756,16 @@ define i16 @atomicrmw_xchg_0_i16_monotonic(ptr %a) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h a0, zero, (a0) @@ -10569,29 +13791,29 @@ define i16 @atomicrmw_xchg_0_i16_acquire(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aq a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aq a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i16_acquire: ; RV64I: # %bb.0: @@ -10628,6 +13850,30 @@ define i16 @atomicrmw_xchg_0_i16_acquire(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aq a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -10652,6 +13898,16 @@ define i16 @atomicrmw_xchg_0_i16_acquire(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aq a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aq a0, zero, (a0) @@ -10677,29 +13933,29 @@ define i16 @atomicrmw_xchg_0_i16_release(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.rl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.rl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i16_release: ; RV64I: # %bb.0: @@ -10736,6 +13992,30 @@ define i16 @atomicrmw_xchg_0_i16_release(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.rl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -10760,6 +14040,16 @@ define i16 @atomicrmw_xchg_0_i16_release(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.rl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.rl a0, zero, (a0) @@ -10785,29 +14075,29 @@ define i16 @atomicrmw_xchg_0_i16_acq_rel(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i16_acq_rel: ; RV64I: # %bb.0: @@ -10844,6 +14134,30 @@ define i16 @atomicrmw_xchg_0_i16_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -10868,6 +14182,16 @@ define i16 @atomicrmw_xchg_0_i16_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, zero, (a0) @@ -10893,29 +14217,29 @@ define i16 @atomicrmw_xchg_0_i16_seq_cst(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i16_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: not a2, a2 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: not a2, a2 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i16_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: not a2, a2 -; RV32IA-TSO-NEXT: amoand.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: not a2, a2 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_0_i16_seq_cst: ; RV64I: # %bb.0: @@ -10952,6 +14276,30 @@ define i16 @atomicrmw_xchg_0_i16_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: not a2, a2 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: not a2, a2 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -10976,6 +14324,16 @@ define i16 @atomicrmw_xchg_0_i16_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, zero, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, zero, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, zero, (a0) @@ -11002,16 +14360,16 @@ define i16 @atomicrmw_xchg_minus_1_i16_monotonic(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a1, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a2, 16 -; RV32IA-NEXT: addi a2, a2, -1 -; RV32IA-NEXT: sll a2, a2, a0 -; RV32IA-NEXT: amoor.w a1, a2, (a1) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a2, 16 +; RV32IA-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: ; RV64I: # %bb.0: @@ -11036,6 +14394,17 @@ define i16 @atomicrmw_xchg_minus_1_i16_monotonic(ptr %a) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a2, 16 +; RV32IA-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a1, a0, -4 @@ -11047,6 +14416,18 @@ define i16 @atomicrmw_xchg_minus_1_i16_monotonic(ptr %a) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -11075,27 +14456,27 @@ define i16 @atomicrmw_xchg_minus_1_i16_acquire(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aq a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aq a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i16_acquire: ; RV64I: # %bb.0: @@ -11131,6 +14512,28 @@ define i16 @atomicrmw_xchg_minus_1_i16_acquire(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aq a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -11153,6 +14556,18 @@ define i16 @atomicrmw_xchg_minus_1_i16_acquire(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -11181,27 +14596,27 @@ define i16 @atomicrmw_xchg_minus_1_i16_release(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.rl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.rl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i16_release: ; RV64I: # %bb.0: @@ -11237,6 +14652,28 @@ define i16 @atomicrmw_xchg_minus_1_i16_release(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.rl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -11259,6 +14696,18 @@ define i16 @atomicrmw_xchg_minus_1_i16_release(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -11287,27 +14736,27 @@ define i16 @atomicrmw_xchg_minus_1_i16_acq_rel(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: ; RV64I: # %bb.0: @@ -11343,6 +14792,28 @@ define i16 @atomicrmw_xchg_minus_1_i16_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -11365,6 +14836,18 @@ define i16 @atomicrmw_xchg_minus_1_i16_acq_rel(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -11393,27 +14876,27 @@ define i16 @atomicrmw_xchg_minus_1_i16_seq_cst(ptr %a) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a1, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a2, 16 -; RV32IA-WMO-NEXT: addi a2, a2, -1 -; RV32IA-WMO-NEXT: sll a2, a2, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a2, (a1) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a1, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a2, 16 -; RV32IA-TSO-NEXT: addi a2, a2, -1 -; RV32IA-TSO-NEXT: sll a2, a2, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a2, (a1) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: ; RV64I: # %bb.0: @@ -11449,6 +14932,28 @@ define i16 @atomicrmw_xchg_minus_1_i16_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a2, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a2, (a1) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a1, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a2, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a2, a2, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a2, a2, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a2, (a1) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a1, a0, -4 @@ -11471,6 +14976,18 @@ define i16 @atomicrmw_xchg_minus_1_i16_seq_cst(ptr %a) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: li a1, -1 +; RV32IA-WMO-ZABHA-NEXT: amoswap.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: li a1, -1 +; RV32IA-TSO-ZABHA-NEXT: amoswap.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: li a1, -1 @@ -11497,26 +15014,26 @@ define i16 @atomicrmw_add_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_add_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB80_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: add a5, a3, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB80_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_add_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB80_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB80_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i16_monotonic: ; RV64I: # %bb.0: @@ -11549,6 +15066,27 @@ define i16 @atomicrmw_add_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_add_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB80_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB80_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_add_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -11570,6 +15108,16 @@ define i16 @atomicrmw_add_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.h a0, a1, (a0) @@ -11594,47 +15142,47 @@ define i16 @atomicrmw_add_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: add a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB81_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB81_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: add a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB81_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB81_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i16_acquire: ; RV64I: # %bb.0: @@ -11688,6 +15236,48 @@ define i16 @atomicrmw_add_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB81_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB81_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB81_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -11730,6 +15320,16 @@ define i16 @atomicrmw_add_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.h.aq a0, a1, (a0) @@ -11754,47 +15354,47 @@ define i16 @atomicrmw_add_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: add a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB82_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB82_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: add a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB82_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB82_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i16_release: ; RV64I: # %bb.0: @@ -11848,6 +15448,48 @@ define i16 @atomicrmw_add_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB82_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB82_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB82_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -11890,6 +15532,16 @@ define i16 @atomicrmw_add_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.h.rl a0, a1, (a0) @@ -11914,47 +15566,47 @@ define i16 @atomicrmw_add_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_add_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: add a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB83_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB83_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_add_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: add a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB83_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB83_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i16_acq_rel: ; RV64I: # %bb.0: @@ -12008,6 +15660,48 @@ define i16 @atomicrmw_add_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB83_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB83_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB83_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -12050,6 +15744,16 @@ define i16 @atomicrmw_add_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) @@ -12074,26 +15778,26 @@ define i16 @atomicrmw_add_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_add_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB84_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: add a5, a3, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB84_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_add_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB84_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: add a5, a3, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB84_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_add_i16_seq_cst: ; RV64I: # %bb.0: @@ -12126,6 +15830,27 @@ define i16 @atomicrmw_add_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_add_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB84_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: add a5, a3, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB84_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_add_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -12147,6 +15872,16 @@ define i16 @atomicrmw_add_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) @@ -12171,26 +15906,26 @@ define i16 @atomicrmw_sub_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_sub_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB85_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: sub a5, a3, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB85_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_sub_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB85_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB85_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i16_monotonic: ; RV64I: # %bb.0: @@ -12223,6 +15958,27 @@ define i16 @atomicrmw_sub_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_sub_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB85_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB85_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_sub_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -12244,6 +16000,18 @@ define i16 @atomicrmw_sub_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -12270,47 +16038,47 @@ define i16 @atomicrmw_sub_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: sub a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB86_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB86_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: sub a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB86_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB86_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i16_acquire: ; RV64I: # %bb.0: @@ -12364,6 +16132,48 @@ define i16 @atomicrmw_sub_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB86_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB86_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB86_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -12406,6 +16216,18 @@ define i16 @atomicrmw_sub_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -12432,47 +16254,47 @@ define i16 @atomicrmw_sub_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: sub a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB87_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB87_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: sub a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB87_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB87_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i16_release: ; RV64I: # %bb.0: @@ -12526,6 +16348,48 @@ define i16 @atomicrmw_sub_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB87_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB87_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB87_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -12568,6 +16432,18 @@ define i16 @atomicrmw_sub_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -12594,47 +16470,47 @@ define i16 @atomicrmw_sub_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_sub_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: sub a5, a3, a1 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB88_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB88_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_sub_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: sub a5, a3, a1 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB88_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB88_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i16_acq_rel: ; RV64I: # %bb.0: @@ -12688,6 +16564,48 @@ define i16 @atomicrmw_sub_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB88_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB88_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB88_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -12730,6 +16648,18 @@ define i16 @atomicrmw_sub_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -12756,26 +16686,26 @@ define i16 @atomicrmw_sub_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_sub_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB89_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: sub a5, a3, a1 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB89_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_sub_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB89_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: sub a5, a3, a1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB89_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_sub_i16_seq_cst: ; RV64I: # %bb.0: @@ -12808,6 +16738,27 @@ define i16 @atomicrmw_sub_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_sub_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB89_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: sub a5, a3, a1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB89_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_sub_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -12829,6 +16780,18 @@ define i16 @atomicrmw_sub_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: neg a1, a1 +; RV32IA-WMO-ZABHA-NEXT: amoadd.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: neg a1, a1 +; RV32IA-TSO-ZABHA-NEXT: amoadd.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: neg a1, a1 @@ -12855,20 +16818,20 @@ define i16 @atomicrmw_and_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_and_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: not a3, a4 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: or a1, a1, a3 -; RV32IA-NEXT: amoand.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_and_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: not a3, a4 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i16_monotonic: ; RV64I: # %bb.0: @@ -12895,6 +16858,21 @@ define i16 @atomicrmw_and_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_and_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: not a3, a4 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_and_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -12910,6 +16888,16 @@ define i16 @atomicrmw_and_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.h a0, a1, (a0) @@ -12934,35 +16922,35 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: not a3, a4 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: not a3, a4 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i16_acquire: ; RV64I: # %bb.0: @@ -13004,6 +16992,36 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: not a3, a4 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: not a3, a4 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13034,6 +17052,16 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.h.aq a0, a1, (a0) @@ -13058,35 +17086,35 @@ define i16 @atomicrmw_and_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: not a3, a4 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: not a3, a4 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i16_release: ; RV64I: # %bb.0: @@ -13128,6 +17156,36 @@ define i16 @atomicrmw_and_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: not a3, a4 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: not a3, a4 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13158,6 +17216,16 @@ define i16 @atomicrmw_and_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.h.rl a0, a1, (a0) @@ -13182,35 +17250,35 @@ define i16 @atomicrmw_and_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: not a3, a4 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: not a3, a4 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i16_acq_rel: ; RV64I: # %bb.0: @@ -13252,6 +17320,36 @@ define i16 @atomicrmw_and_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: not a3, a4 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: not a3, a4 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13282,6 +17380,16 @@ define i16 @atomicrmw_and_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.h.aqrl a0, a1, (a0) @@ -13306,35 +17414,35 @@ define i16 @atomicrmw_and_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_and_i16_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: not a3, a4 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: or a1, a1, a3 -; RV32IA-WMO-NEXT: amoand.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: not a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_and_i16_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: not a3, a4 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: or a1, a1, a3 -; RV32IA-TSO-NEXT: amoand.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: not a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_and_i16_seq_cst: ; RV64I: # %bb.0: @@ -13376,6 +17484,36 @@ define i16 @atomicrmw_and_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: not a3, a4 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: amoand.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: not a3, a4 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: or a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: amoand.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13406,6 +17544,16 @@ define i16 @atomicrmw_and_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoand.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoand.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoand.h.aqrl a0, a1, (a0) @@ -13430,27 +17578,27 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_nand_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: and a5, a3, a1 -; RV32IA-NEXT: not a5, a5 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB95_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-NOZACAS-NEXT: not a5, a5 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB95_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i16_monotonic: ; RV64I: # %bb.0: @@ -13484,6 +17632,28 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-ZACAS-NEXT: not a5, a5 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB95_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -13506,6 +17676,50 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB95_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB95_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -13550,6 +17764,36 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB95_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB95_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB95_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB95_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -13594,49 +17838,49 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a5, a3, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB96_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a5, a3, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB96_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i16_acquire: ; RV64I: # %bb.0: @@ -13692,6 +17936,50 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13736,6 +18024,50 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB96_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -13780,6 +18112,36 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB96_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.h.aq a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB96_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB96_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB96_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -13824,49 +18186,49 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: and a5, a3, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB97_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a5, a3, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB97_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i16_release: ; RV64I: # %bb.0: @@ -13922,6 +18284,50 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -13966,6 +18372,50 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB97_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -14010,6 +18460,36 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB97_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.h.rl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB97_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB97_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB97_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -14054,49 +18534,49 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_nand_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a5, a3, a1 -; RV32IA-WMO-NEXT: not a5, a5 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB98_1 -; RV32IA-WMO-NEXT: # %bb.2: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_nand_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a5, a3, a1 -; RV32IA-TSO-NEXT: not a5, a5 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB98_1 -; RV32IA-TSO-NEXT: # %bb.2: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i16_acq_rel: ; RV64I: # %bb.0: @@ -14152,6 +18632,50 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -14196,6 +18720,50 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB98_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -14240,6 +18808,36 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB98_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.h.aqrl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB98_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB98_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB98_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -14284,27 +18882,27 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_nand_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: and a5, a3, a1 -; RV32IA-NEXT: not a5, a5 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB99_1 -; RV32IA-NEXT: # %bb.2: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-NOZACAS-NEXT: not a5, a5 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB99_1 +; RV32IA-NOZACAS-NEXT: # %bb.2: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_nand_i16_seq_cst: ; RV64I: # %bb.0: @@ -14338,6 +18936,28 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: and a5, a3, a1 +; RV32IA-ZACAS-NEXT: not a5, a5 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB99_1 +; RV32IA-ZACAS-NEXT: # %bb.2: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -14360,6 +18980,50 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB99_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a3, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a5, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a5, .LBB99_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: andi a2, a0, -4 @@ -14404,6 +19068,38 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB99_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.h.aqrl a0, a3, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB99_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lhu a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB99_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a3, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: slli a4, a0, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.h a0, a3, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: srai a4, a4, 16 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a4, .LBB99_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -14450,16 +19146,16 @@ define i16 @atomicrmw_or_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_or_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: srli a1, a1, 16 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: amoor.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_or_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i16_monotonic: ; RV64I: # %bb.0: @@ -14482,6 +19178,17 @@ define i16 @atomicrmw_or_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_or_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_or_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -14493,6 +19200,16 @@ define i16 @atomicrmw_or_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.h a0, a1, (a0) @@ -14517,27 +19234,27 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i16_acquire: ; RV64I: # %bb.0: @@ -14571,6 +19288,28 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -14593,6 +19332,16 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.h.aq a0, a1, (a0) @@ -14617,27 +19366,27 @@ define i16 @atomicrmw_or_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i16_release: ; RV64I: # %bb.0: @@ -14671,6 +19420,28 @@ define i16 @atomicrmw_or_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -14693,6 +19464,16 @@ define i16 @atomicrmw_or_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.h.rl a0, a1, (a0) @@ -14717,27 +19498,27 @@ define i16 @atomicrmw_or_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i16_acq_rel: ; RV64I: # %bb.0: @@ -14771,6 +19552,28 @@ define i16 @atomicrmw_or_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -14793,6 +19596,16 @@ define i16 @atomicrmw_or_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.h.aqrl a0, a1, (a0) @@ -14817,27 +19630,27 @@ define i16 @atomicrmw_or_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_or_i16_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_or_i16_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_or_i16_seq_cst: ; RV64I: # %bb.0: @@ -14871,6 +19684,28 @@ define i16 @atomicrmw_or_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -14893,6 +19728,16 @@ define i16 @atomicrmw_or_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoor.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoor.h.aqrl a0, a1, (a0) @@ -14917,16 +19762,16 @@ define i16 @atomicrmw_xor_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_xor_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: srli a1, a1, 16 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-NEXT: srl a0, a1, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_xor_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i16_monotonic: ; RV64I: # %bb.0: @@ -14949,6 +19794,17 @@ define i16 @atomicrmw_xor_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_xor_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_xor_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -14960,6 +19816,16 @@ define i16 @atomicrmw_xor_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.h a0, a1, (a0) @@ -14984,27 +19850,27 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aq a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aq a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i16_acquire: ; RV64I: # %bb.0: @@ -15038,6 +19904,28 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aq a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -15060,6 +19948,16 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.h.aq a0, a1, (a0) @@ -15084,27 +19982,27 @@ define i16 @atomicrmw_xor_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.rl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.rl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i16_release: ; RV64I: # %bb.0: @@ -15138,6 +20036,28 @@ define i16 @atomicrmw_xor_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.rl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -15160,6 +20080,16 @@ define i16 @atomicrmw_xor_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.h.rl a0, a1, (a0) @@ -15184,27 +20114,27 @@ define i16 @atomicrmw_xor_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i16_acq_rel: ; RV64I: # %bb.0: @@ -15238,6 +20168,28 @@ define i16 @atomicrmw_xor_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -15260,6 +20212,16 @@ define i16 @atomicrmw_xor_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.h.aqrl a0, a1, (a0) @@ -15284,27 +20246,27 @@ define i16 @atomicrmw_xor_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_xor_i16_seq_cst: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: srli a1, a1, 16 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: amoxor.w.aqrl a1, a1, (a2) -; RV32IA-WMO-NEXT: srl a0, a1, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_xor_i16_seq_cst: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: srli a1, a1, 16 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: amoxor.w a1, a1, (a2) -; RV32IA-TSO-NEXT: srl a0, a1, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_xor_i16_seq_cst: ; RV64I: # %bb.0: @@ -15338,6 +20300,28 @@ define i16 @atomicrmw_xor_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: amoxor.w.aqrl a1, a1, (a2) +; RV32IA-WMO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: srli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: amoxor.w a1, a1, (a2) +; RV32IA-TSO-ZACAS-NEXT: srl a0, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_seq_cst: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -15360,6 +20344,16 @@ define i16 @atomicrmw_xor_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a1, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amoxor.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amoxor.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amoxor.h.aqrl a0, a1, (a0) @@ -15416,36 +20410,36 @@ define i16 @atomicrmw_max_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_max_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: li a4, 16 -; RV32IA-NEXT: andi a5, a0, 24 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: srai a1, a1, 16 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: sub a4, a4, a5 -; RV32IA-NEXT: .LBB110_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a7, a1, .LBB110_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB110_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB110_3: # in Loop: Header=BB110_1 Depth=1 -; RV32IA-NEXT: sc.w a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB110_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_max_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: li a4, 16 +; RV32IA-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB110_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a7, a1, .LBB110_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB110_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB110_3: # in Loop: Header=BB110_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB110_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i16_monotonic: ; RV64I: # %bb.0: @@ -15520,6 +20514,37 @@ define i16 @atomicrmw_max_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_max_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: li a4, 16 +; RV32IA-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB110_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a7, a1, .LBB110_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB110_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB110_3: # in Loop: Header=BB110_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB110_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_max_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -15551,6 +20576,16 @@ define i16 @atomicrmw_max_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.h a0, a1, (a0) @@ -15607,67 +20642,67 @@ define i16 @atomicrmw_max_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB111_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB111_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB111_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB111_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB111_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB111_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB111_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB111_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i16_acquire: ; RV64I: # %bb.0: @@ -15773,6 +20808,68 @@ define i16 @atomicrmw_max_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB111_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB111_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB111_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB111_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB111_3: # in Loop: Header=BB111_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB111_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -15835,6 +20932,16 @@ define i16 @atomicrmw_max_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.h.aq a0, a1, (a0) @@ -15891,67 +20998,67 @@ define i16 @atomicrmw_max_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB112_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB112_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB112_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB112_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB112_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB112_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB112_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB112_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i16_release: ; RV64I: # %bb.0: @@ -16057,6 +21164,68 @@ define i16 @atomicrmw_max_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB112_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB112_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB112_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB112_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB112_3: # in Loop: Header=BB112_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB112_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -16119,6 +21288,16 @@ define i16 @atomicrmw_max_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.h.rl a0, a1, (a0) @@ -16175,67 +21354,67 @@ define i16 @atomicrmw_max_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_max_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a7, a1, .LBB113_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB113_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a7, a1, .LBB113_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB113_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_max_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a7, a1, .LBB113_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB113_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a7, a1, .LBB113_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB113_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i16_acq_rel: ; RV64I: # %bb.0: @@ -16341,6 +21520,68 @@ define i16 @atomicrmw_max_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a7, a1, .LBB113_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB113_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB113_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a7, a1, .LBB113_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB113_3: # in Loop: Header=BB113_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB113_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -16403,6 +21644,16 @@ define i16 @atomicrmw_max_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0) @@ -16459,36 +21710,36 @@ define i16 @atomicrmw_max_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_max_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: li a4, 16 -; RV32IA-NEXT: andi a5, a0, 24 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: srai a1, a1, 16 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: sub a4, a4, a5 -; RV32IA-NEXT: .LBB114_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a7, a1, .LBB114_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB114_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB114_3: # in Loop: Header=BB114_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB114_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_max_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: li a4, 16 +; RV32IA-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB114_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a7, a1, .LBB114_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB114_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB114_3: # in Loop: Header=BB114_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB114_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_max_i16_seq_cst: ; RV64I: # %bb.0: @@ -16563,6 +21814,37 @@ define i16 @atomicrmw_max_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_max_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: li a4, 16 +; RV32IA-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB114_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a7, a1, .LBB114_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB114_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB114_3: # in Loop: Header=BB114_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB114_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_max_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -16594,6 +21876,16 @@ define i16 @atomicrmw_max_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomax.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0) @@ -16650,36 +21942,36 @@ define i16 @atomicrmw_min_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_min_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: li a4, 16 -; RV32IA-NEXT: andi a5, a0, 24 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: srai a1, a1, 16 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: sub a4, a4, a5 -; RV32IA-NEXT: .LBB115_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a1, a7, .LBB115_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB115_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB115_3: # in Loop: Header=BB115_1 Depth=1 -; RV32IA-NEXT: sc.w a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB115_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_min_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: li a4, 16 +; RV32IA-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB115_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a1, a7, .LBB115_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB115_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB115_3: # in Loop: Header=BB115_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB115_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i16_monotonic: ; RV64I: # %bb.0: @@ -16754,6 +22046,37 @@ define i16 @atomicrmw_min_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_min_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: li a4, 16 +; RV32IA-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB115_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a1, a7, .LBB115_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB115_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB115_3: # in Loop: Header=BB115_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB115_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_min_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -16785,6 +22108,16 @@ define i16 @atomicrmw_min_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.h a0, a1, (a0) @@ -16841,67 +22174,67 @@ define i16 @atomicrmw_min_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB116_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB116_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB116_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB116_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB116_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB116_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB116_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB116_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i16_acquire: ; RV64I: # %bb.0: @@ -17007,6 +22340,68 @@ define i16 @atomicrmw_min_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB116_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB116_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB116_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB116_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB116_3: # in Loop: Header=BB116_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB116_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -17069,6 +22464,16 @@ define i16 @atomicrmw_min_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.h.aq a0, a1, (a0) @@ -17125,67 +22530,67 @@ define i16 @atomicrmw_min_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB117_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB117_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB117_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB117_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB117_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB117_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB117_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB117_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i16_release: ; RV64I: # %bb.0: @@ -17291,6 +22696,68 @@ define i16 @atomicrmw_min_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB117_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB117_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB117_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB117_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB117_3: # in Loop: Header=BB117_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB117_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -17353,6 +22820,16 @@ define i16 @atomicrmw_min_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.h.rl a0, a1, (a0) @@ -17409,67 +22886,67 @@ define i16 @atomicrmw_min_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_min_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: slli a1, a1, 16 -; RV32IA-WMO-NEXT: li a4, 16 -; RV32IA-WMO-NEXT: andi a5, a0, 24 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: srai a1, a1, 16 -; RV32IA-WMO-NEXT: sll a3, a3, a0 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: sub a4, a4, a5 -; RV32IA-WMO-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a5, (a2) -; RV32IA-WMO-NEXT: and a7, a5, a3 -; RV32IA-WMO-NEXT: mv a6, a5 -; RV32IA-WMO-NEXT: sll a7, a7, a4 -; RV32IA-WMO-NEXT: sra a7, a7, a4 -; RV32IA-WMO-NEXT: bge a1, a7, .LBB118_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 -; RV32IA-WMO-NEXT: xor a6, a5, a1 -; RV32IA-WMO-NEXT: and a6, a6, a3 -; RV32IA-WMO-NEXT: xor a6, a5, a6 -; RV32IA-WMO-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-WMO-NEXT: bnez a6, .LBB118_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a5, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: li a4, 16 +; RV32IA-WMO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-NOZACAS-NEXT: bge a1, a7, .LBB118_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-NOZACAS-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a6, .LBB118_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_min_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: slli a1, a1, 16 -; RV32IA-TSO-NEXT: li a4, 16 -; RV32IA-TSO-NEXT: andi a5, a0, 24 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: srai a1, a1, 16 -; RV32IA-TSO-NEXT: sll a3, a3, a0 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: sub a4, a4, a5 -; RV32IA-TSO-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a5, (a2) -; RV32IA-TSO-NEXT: and a7, a5, a3 -; RV32IA-TSO-NEXT: mv a6, a5 -; RV32IA-TSO-NEXT: sll a7, a7, a4 -; RV32IA-TSO-NEXT: sra a7, a7, a4 -; RV32IA-TSO-NEXT: bge a1, a7, .LBB118_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 -; RV32IA-TSO-NEXT: xor a6, a5, a1 -; RV32IA-TSO-NEXT: and a6, a6, a3 -; RV32IA-TSO-NEXT: xor a6, a5, a6 -; RV32IA-TSO-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a6, a6, (a2) -; RV32IA-TSO-NEXT: bnez a6, .LBB118_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a5, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: li a4, 16 +; RV32IA-TSO-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-NOZACAS-NEXT: bge a1, a7, .LBB118_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-NOZACAS-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a6, .LBB118_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i16_acq_rel: ; RV64I: # %bb.0: @@ -17575,6 +23052,68 @@ define i16 @atomicrmw_min_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: li a4, 16 +; RV32IA-WMO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-WMO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-WMO-ZACAS-NEXT: mv a6, a5 +; RV32IA-WMO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-WMO-ZACAS-NEXT: bge a1, a7, .LBB118_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-WMO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-WMO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-WMO-ZACAS-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a6, .LBB118_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: li a4, 16 +; RV32IA-TSO-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-TSO-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB118_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-TSO-ZACAS-NEXT: mv a6, a5 +; RV32IA-TSO-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-TSO-ZACAS-NEXT: bge a1, a7, .LBB118_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-TSO-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-TSO-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-TSO-ZACAS-NEXT: .LBB118_3: # in Loop: Header=BB118_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a6, a6, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a6, .LBB118_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -17637,6 +23176,16 @@ define i16 @atomicrmw_min_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0) @@ -17693,36 +23242,36 @@ define i16 @atomicrmw_min_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_min_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: slli a1, a1, 16 -; RV32IA-NEXT: li a4, 16 -; RV32IA-NEXT: andi a5, a0, 24 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: srai a1, a1, 16 -; RV32IA-NEXT: sll a3, a3, a0 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: sub a4, a4, a5 -; RV32IA-NEXT: .LBB119_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a5, (a2) -; RV32IA-NEXT: and a7, a5, a3 -; RV32IA-NEXT: mv a6, a5 -; RV32IA-NEXT: sll a7, a7, a4 -; RV32IA-NEXT: sra a7, a7, a4 -; RV32IA-NEXT: bge a1, a7, .LBB119_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB119_1 Depth=1 -; RV32IA-NEXT: xor a6, a5, a1 -; RV32IA-NEXT: and a6, a6, a3 -; RV32IA-NEXT: xor a6, a5, a6 -; RV32IA-NEXT: .LBB119_3: # in Loop: Header=BB119_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a6, a6, (a2) -; RV32IA-NEXT: bnez a6, .LBB119_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a5, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_min_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: slli a1, a1, 16 +; RV32IA-NOZACAS-NEXT: li a4, 16 +; RV32IA-NOZACAS-NEXT: andi a5, a0, 24 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: srai a1, a1, 16 +; RV32IA-NOZACAS-NEXT: sll a3, a3, a0 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: sub a4, a4, a5 +; RV32IA-NOZACAS-NEXT: .LBB119_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-NOZACAS-NEXT: and a7, a5, a3 +; RV32IA-NOZACAS-NEXT: mv a6, a5 +; RV32IA-NOZACAS-NEXT: sll a7, a7, a4 +; RV32IA-NOZACAS-NEXT: sra a7, a7, a4 +; RV32IA-NOZACAS-NEXT: bge a1, a7, .LBB119_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB119_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a1 +; RV32IA-NOZACAS-NEXT: and a6, a6, a3 +; RV32IA-NOZACAS-NEXT: xor a6, a5, a6 +; RV32IA-NOZACAS-NEXT: .LBB119_3: # in Loop: Header=BB119_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-NOZACAS-NEXT: bnez a6, .LBB119_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a5, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_min_i16_seq_cst: ; RV64I: # %bb.0: @@ -17797,6 +23346,37 @@ define i16 @atomicrmw_min_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_min_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: slli a1, a1, 16 +; RV32IA-ZACAS-NEXT: li a4, 16 +; RV32IA-ZACAS-NEXT: andi a5, a0, 24 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: srai a1, a1, 16 +; RV32IA-ZACAS-NEXT: sll a3, a3, a0 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: sub a4, a4, a5 +; RV32IA-ZACAS-NEXT: .LBB119_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a5, (a2) +; RV32IA-ZACAS-NEXT: and a7, a5, a3 +; RV32IA-ZACAS-NEXT: mv a6, a5 +; RV32IA-ZACAS-NEXT: sll a7, a7, a4 +; RV32IA-ZACAS-NEXT: sra a7, a7, a4 +; RV32IA-ZACAS-NEXT: bge a1, a7, .LBB119_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB119_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a6, a5, a1 +; RV32IA-ZACAS-NEXT: and a6, a6, a3 +; RV32IA-ZACAS-NEXT: xor a6, a5, a6 +; RV32IA-ZACAS-NEXT: .LBB119_3: # in Loop: Header=BB119_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a6, a6, (a2) +; RV32IA-ZACAS-NEXT: bnez a6, .LBB119_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a5, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_min_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -17828,6 +23408,16 @@ define i16 @atomicrmw_min_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a5, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomin.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0) @@ -17886,30 +23476,30 @@ define i16 @atomicrmw_umax_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umax_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB120_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: and a6, a3, a4 -; RV32IA-NEXT: mv a5, a3 -; RV32IA-NEXT: bgeu a6, a1, .LBB120_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB120_1 Depth=1 -; RV32IA-NEXT: xor a5, a3, a1 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: .LBB120_3: # in Loop: Header=BB120_1 Depth=1 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB120_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umax_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB120_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-NOZACAS-NEXT: mv a5, a3 +; RV32IA-NOZACAS-NEXT: bgeu a6, a1, .LBB120_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB120_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: .LBB120_3: # in Loop: Header=BB120_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB120_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i16_monotonic: ; RV64I: # %bb.0: @@ -17980,6 +23570,31 @@ define i16 @atomicrmw_umax_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umax_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB120_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-ZACAS-NEXT: mv a5, a3 +; RV32IA-ZACAS-NEXT: bgeu a6, a1, .LBB120_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB120_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: .LBB120_3: # in Loop: Header=BB120_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB120_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umax_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -18005,6 +23620,16 @@ define i16 @atomicrmw_umax_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) @@ -18063,55 +23688,55 @@ define i16 @atomicrmw_umax_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB121_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB121_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB121_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB121_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB121_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB121_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB121_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB121_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i16_acquire: ; RV64I: # %bb.0: @@ -18207,6 +23832,56 @@ define i16 @atomicrmw_umax_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB121_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB121_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB121_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB121_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB121_3: # in Loop: Header=BB121_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB121_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -18257,6 +23932,16 @@ define i16 @atomicrmw_umax_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.h.aq a0, a1, (a0) @@ -18315,55 +24000,55 @@ define i16 @atomicrmw_umax_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB122_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB122_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB122_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB122_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB122_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB122_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB122_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB122_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i16_release: ; RV64I: # %bb.0: @@ -18459,6 +24144,56 @@ define i16 @atomicrmw_umax_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB122_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB122_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB122_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB122_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB122_3: # in Loop: Header=BB122_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB122_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -18509,6 +24244,16 @@ define i16 @atomicrmw_umax_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.h.rl a0, a1, (a0) @@ -18567,55 +24312,55 @@ define i16 @atomicrmw_umax_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umax_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a6, a1, .LBB123_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB123_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a6, a1, .LBB123_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB123_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umax_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a6, a1, .LBB123_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB123_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a6, a1, .LBB123_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB123_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i16_acq_rel: ; RV64I: # %bb.0: @@ -18711,6 +24456,56 @@ define i16 @atomicrmw_umax_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a6, a1, .LBB123_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB123_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB123_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a6, a1, .LBB123_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB123_3: # in Loop: Header=BB123_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB123_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -18761,6 +24556,16 @@ define i16 @atomicrmw_umax_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0) @@ -18819,30 +24624,30 @@ define i16 @atomicrmw_umax_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB124_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: and a6, a3, a4 -; RV32IA-NEXT: mv a5, a3 -; RV32IA-NEXT: bgeu a6, a1, .LBB124_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB124_1 Depth=1 -; RV32IA-NEXT: xor a5, a3, a1 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: .LBB124_3: # in Loop: Header=BB124_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB124_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umax_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB124_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-NOZACAS-NEXT: mv a5, a3 +; RV32IA-NOZACAS-NEXT: bgeu a6, a1, .LBB124_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB124_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: .LBB124_3: # in Loop: Header=BB124_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB124_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umax_i16_seq_cst: ; RV64I: # %bb.0: @@ -18913,6 +24718,31 @@ define i16 @atomicrmw_umax_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umax_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB124_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-ZACAS-NEXT: mv a5, a3 +; RV32IA-ZACAS-NEXT: bgeu a6, a1, .LBB124_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB124_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: .LBB124_3: # in Loop: Header=BB124_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB124_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umax_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -18938,6 +24768,16 @@ define i16 @atomicrmw_umax_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amomaxu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0) @@ -18996,30 +24836,30 @@ define i16 @atomicrmw_umin_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umin_i16_monotonic: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB125_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w a3, (a2) -; RV32IA-NEXT: and a6, a3, a4 -; RV32IA-NEXT: mv a5, a3 -; RV32IA-NEXT: bgeu a1, a6, .LBB125_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB125_1 Depth=1 -; RV32IA-NEXT: xor a5, a3, a1 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: .LBB125_3: # in Loop: Header=BB125_1 Depth=1 -; RV32IA-NEXT: sc.w a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB125_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umin_i16_monotonic: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB125_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-NOZACAS-NEXT: mv a5, a3 +; RV32IA-NOZACAS-NEXT: bgeu a1, a6, .LBB125_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB125_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: .LBB125_3: # in Loop: Header=BB125_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB125_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i16_monotonic: ; RV64I: # %bb.0: @@ -19090,6 +24930,31 @@ define i16 @atomicrmw_umin_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umin_i16_monotonic: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB125_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-ZACAS-NEXT: mv a5, a3 +; RV32IA-ZACAS-NEXT: bgeu a1, a6, .LBB125_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB125_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: .LBB125_3: # in Loop: Header=BB125_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB125_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umin_i16_monotonic: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -19115,6 +24980,16 @@ define i16 @atomicrmw_umin_i16_monotonic(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_monotonic: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_monotonic: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_monotonic: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.h a0, a1, (a0) @@ -19173,55 +25048,55 @@ define i16 @atomicrmw_umin_i16_acquire(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i16_acquire: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB126_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB126_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB126_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB126_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i16_acquire: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB126_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB126_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB126_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB126_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i16_acquire: ; RV64I: # %bb.0: @@ -19317,6 +25192,56 @@ define i16 @atomicrmw_umin_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB126_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB126_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB126_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB126_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB126_3: # in Loop: Header=BB126_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB126_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acquire: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -19367,6 +25292,16 @@ define i16 @atomicrmw_umin_i16_acquire(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.h.aq a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_acquire: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acquire: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.h.aq a0, a1, (a0) @@ -19425,55 +25360,55 @@ define i16 @atomicrmw_umin_i16_release(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i16_release: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB127_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB127_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_release: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB127_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB127_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i16_release: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB127_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB127_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_release: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB127_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB127_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i16_release: ; RV64I: # %bb.0: @@ -19569,6 +25504,56 @@ define i16 @atomicrmw_umin_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_release: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB127_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB127_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_release: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB127_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB127_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB127_3: # in Loop: Header=BB127_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB127_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_release: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -19619,6 +25604,16 @@ define i16 @atomicrmw_umin_i16_release(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_release: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.h.rl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_release: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_release: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.h.rl a0, a1, (a0) @@ -19677,55 +25672,55 @@ define i16 @atomicrmw_umin_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-WMO-LABEL: atomicrmw_umin_i16_acq_rel: -; RV32IA-WMO: # %bb.0: -; RV32IA-WMO-NEXT: andi a2, a0, -4 -; RV32IA-WMO-NEXT: slli a0, a0, 3 -; RV32IA-WMO-NEXT: lui a3, 16 -; RV32IA-WMO-NEXT: addi a3, a3, -1 -; RV32IA-WMO-NEXT: sll a4, a3, a0 -; RV32IA-WMO-NEXT: and a1, a1, a3 -; RV32IA-WMO-NEXT: sll a1, a1, a0 -; RV32IA-WMO-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-WMO-NEXT: lr.w.aq a3, (a2) -; RV32IA-WMO-NEXT: and a6, a3, a4 -; RV32IA-WMO-NEXT: mv a5, a3 -; RV32IA-WMO-NEXT: bgeu a1, a6, .LBB128_3 -; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 -; RV32IA-WMO-NEXT: xor a5, a3, a1 -; RV32IA-WMO-NEXT: and a5, a5, a4 -; RV32IA-WMO-NEXT: xor a5, a3, a5 -; RV32IA-WMO-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 -; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-WMO-NEXT: bnez a5, .LBB128_1 -; RV32IA-WMO-NEXT: # %bb.4: -; RV32IA-WMO-NEXT: srl a0, a3, a0 -; RV32IA-WMO-NEXT: ret +; RV32IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-WMO-NOZACAS: # %bb.0: +; RV32IA-WMO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-NOZACAS-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-NOZACAS-NEXT: bgeu a1, a6, .LBB128_3 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-NOZACAS-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-WMO-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-NOZACAS-NEXT: bnez a5, .LBB128_1 +; RV32IA-WMO-NOZACAS-NEXT: # %bb.4: +; RV32IA-WMO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-NOZACAS-NEXT: ret ; -; RV32IA-TSO-LABEL: atomicrmw_umin_i16_acq_rel: -; RV32IA-TSO: # %bb.0: -; RV32IA-TSO-NEXT: andi a2, a0, -4 -; RV32IA-TSO-NEXT: slli a0, a0, 3 -; RV32IA-TSO-NEXT: lui a3, 16 -; RV32IA-TSO-NEXT: addi a3, a3, -1 -; RV32IA-TSO-NEXT: sll a4, a3, a0 -; RV32IA-TSO-NEXT: and a1, a1, a3 -; RV32IA-TSO-NEXT: sll a1, a1, a0 -; RV32IA-TSO-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-TSO-NEXT: lr.w a3, (a2) -; RV32IA-TSO-NEXT: and a6, a3, a4 -; RV32IA-TSO-NEXT: mv a5, a3 -; RV32IA-TSO-NEXT: bgeu a1, a6, .LBB128_3 -; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 -; RV32IA-TSO-NEXT: xor a5, a3, a1 -; RV32IA-TSO-NEXT: and a5, a5, a4 -; RV32IA-TSO-NEXT: xor a5, a3, a5 -; RV32IA-TSO-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 -; RV32IA-TSO-NEXT: sc.w a5, a5, (a2) -; RV32IA-TSO-NEXT: bnez a5, .LBB128_1 -; RV32IA-TSO-NEXT: # %bb.4: -; RV32IA-TSO-NEXT: srl a0, a3, a0 -; RV32IA-TSO-NEXT: ret +; RV32IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-TSO-NOZACAS: # %bb.0: +; RV32IA-TSO-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-NOZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-NOZACAS-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-NOZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-NOZACAS-NEXT: bgeu a1, a6, .LBB128_3 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-NOZACAS-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-TSO-NOZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-NOZACAS-NEXT: bnez a5, .LBB128_1 +; RV32IA-TSO-NOZACAS-NEXT: # %bb.4: +; RV32IA-TSO-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i16_acq_rel: ; RV64I: # %bb.0: @@ -19821,6 +25816,56 @@ define i16 @atomicrmw_umin_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-WMO-ZACAS: # %bb.0: +; RV32IA-WMO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-WMO-ZACAS-NEXT: lui a3, 16 +; RV32IA-WMO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-WMO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-WMO-ZACAS-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a3, (a2) +; RV32IA-WMO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-WMO-ZACAS-NEXT: mv a5, a3 +; RV32IA-WMO-ZACAS-NEXT: bgeu a1, a6, .LBB128_3 +; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-WMO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-WMO-ZACAS-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB128_1 +; RV32IA-WMO-ZACAS-NEXT: # %bb.4: +; RV32IA-WMO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-WMO-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-TSO-ZACAS: # %bb.0: +; RV32IA-TSO-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-TSO-ZACAS-NEXT: lui a3, 16 +; RV32IA-TSO-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-TSO-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-TSO-ZACAS-NEXT: .LBB128_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZACAS-NEXT: lr.w a3, (a2) +; RV32IA-TSO-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-TSO-ZACAS-NEXT: mv a5, a3 +; RV32IA-TSO-ZACAS-NEXT: bgeu a1, a6, .LBB128_3 +; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-TSO-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-TSO-ZACAS-NEXT: .LBB128_3: # in Loop: Header=BB128_1 Depth=1 +; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a2) +; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB128_1 +; RV32IA-TSO-ZACAS-NEXT: # %bb.4: +; RV32IA-TSO-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-TSO-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acq_rel: ; RV64IA-WMO-ZACAS: # %bb.0: ; RV64IA-WMO-ZACAS-NEXT: andi a2, a0, -4 @@ -19871,6 +25916,16 @@ define i16 @atomicrmw_umin_i16_acq_rel(ptr %a, i16 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0) @@ -19929,30 +25984,30 @@ define i16 @atomicrmw_umin_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; -; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst: -; RV32IA: # %bb.0: -; RV32IA-NEXT: andi a2, a0, -4 -; RV32IA-NEXT: slli a0, a0, 3 -; RV32IA-NEXT: lui a3, 16 -; RV32IA-NEXT: addi a3, a3, -1 -; RV32IA-NEXT: sll a4, a3, a0 -; RV32IA-NEXT: and a1, a1, a3 -; RV32IA-NEXT: sll a1, a1, a0 -; RV32IA-NEXT: .LBB129_1: # =>This Inner Loop Header: Depth=1 -; RV32IA-NEXT: lr.w.aqrl a3, (a2) -; RV32IA-NEXT: and a6, a3, a4 -; RV32IA-NEXT: mv a5, a3 -; RV32IA-NEXT: bgeu a1, a6, .LBB129_3 -; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB129_1 Depth=1 -; RV32IA-NEXT: xor a5, a3, a1 -; RV32IA-NEXT: and a5, a5, a4 -; RV32IA-NEXT: xor a5, a3, a5 -; RV32IA-NEXT: .LBB129_3: # in Loop: Header=BB129_1 Depth=1 -; RV32IA-NEXT: sc.w.rl a5, a5, (a2) -; RV32IA-NEXT: bnez a5, .LBB129_1 -; RV32IA-NEXT: # %bb.4: -; RV32IA-NEXT: srl a0, a3, a0 -; RV32IA-NEXT: ret +; RV32IA-NOZACAS-LABEL: atomicrmw_umin_i16_seq_cst: +; RV32IA-NOZACAS: # %bb.0: +; RV32IA-NOZACAS-NEXT: andi a2, a0, -4 +; RV32IA-NOZACAS-NEXT: slli a0, a0, 3 +; RV32IA-NOZACAS-NEXT: lui a3, 16 +; RV32IA-NOZACAS-NEXT: addi a3, a3, -1 +; RV32IA-NOZACAS-NEXT: sll a4, a3, a0 +; RV32IA-NOZACAS-NEXT: and a1, a1, a3 +; RV32IA-NOZACAS-NEXT: sll a1, a1, a0 +; RV32IA-NOZACAS-NEXT: .LBB129_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-NOZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-NOZACAS-NEXT: and a6, a3, a4 +; RV32IA-NOZACAS-NEXT: mv a5, a3 +; RV32IA-NOZACAS-NEXT: bgeu a1, a6, .LBB129_3 +; RV32IA-NOZACAS-NEXT: # %bb.2: # in Loop: Header=BB129_1 Depth=1 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a1 +; RV32IA-NOZACAS-NEXT: and a5, a5, a4 +; RV32IA-NOZACAS-NEXT: xor a5, a3, a5 +; RV32IA-NOZACAS-NEXT: .LBB129_3: # in Loop: Header=BB129_1 Depth=1 +; RV32IA-NOZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-NOZACAS-NEXT: bnez a5, .LBB129_1 +; RV32IA-NOZACAS-NEXT: # %bb.4: +; RV32IA-NOZACAS-NEXT: srl a0, a3, a0 +; RV32IA-NOZACAS-NEXT: ret ; ; RV64I-LABEL: atomicrmw_umin_i16_seq_cst: ; RV64I: # %bb.0: @@ -20023,6 +26078,31 @@ define i16 @atomicrmw_umin_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-NOZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-NOZACAS-NEXT: ret ; +; RV32IA-ZACAS-LABEL: atomicrmw_umin_i16_seq_cst: +; RV32IA-ZACAS: # %bb.0: +; RV32IA-ZACAS-NEXT: andi a2, a0, -4 +; RV32IA-ZACAS-NEXT: slli a0, a0, 3 +; RV32IA-ZACAS-NEXT: lui a3, 16 +; RV32IA-ZACAS-NEXT: addi a3, a3, -1 +; RV32IA-ZACAS-NEXT: sll a4, a3, a0 +; RV32IA-ZACAS-NEXT: and a1, a1, a3 +; RV32IA-ZACAS-NEXT: sll a1, a1, a0 +; RV32IA-ZACAS-NEXT: .LBB129_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-ZACAS-NEXT: lr.w.aqrl a3, (a2) +; RV32IA-ZACAS-NEXT: and a6, a3, a4 +; RV32IA-ZACAS-NEXT: mv a5, a3 +; RV32IA-ZACAS-NEXT: bgeu a1, a6, .LBB129_3 +; RV32IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB129_1 Depth=1 +; RV32IA-ZACAS-NEXT: xor a5, a3, a1 +; RV32IA-ZACAS-NEXT: and a5, a5, a4 +; RV32IA-ZACAS-NEXT: xor a5, a3, a5 +; RV32IA-ZACAS-NEXT: .LBB129_3: # in Loop: Header=BB129_1 Depth=1 +; RV32IA-ZACAS-NEXT: sc.w.rl a5, a5, (a2) +; RV32IA-ZACAS-NEXT: bnez a5, .LBB129_1 +; RV32IA-ZACAS-NEXT: # %bb.4: +; RV32IA-ZACAS-NEXT: srl a0, a3, a0 +; RV32IA-ZACAS-NEXT: ret +; ; RV64IA-ZACAS-LABEL: atomicrmw_umin_i16_seq_cst: ; RV64IA-ZACAS: # %bb.0: ; RV64IA-ZACAS-NEXT: andi a2, a0, -4 @@ -20048,6 +26128,16 @@ define i16 @atomicrmw_umin_i16_seq_cst(ptr %a, i16 %b) nounwind { ; RV64IA-ZACAS-NEXT: srlw a0, a3, a0 ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst: +; RV32IA-WMO-ZABHA: # %bb.0: +; RV32IA-WMO-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0) +; RV32IA-WMO-ZABHA-NEXT: ret +; +; RV32IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst: +; RV32IA-TSO-ZABHA: # %bb.0: +; RV32IA-TSO-ZABHA-NEXT: amominu.h a0, a1, (a0) +; RV32IA-TSO-ZABHA-NEXT: ret +; ; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst: ; RV64IA-WMO-ZABHA: # %bb.0: ; RV64IA-WMO-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0) @@ -20992,6 +27082,30 @@ define i32 @atomicrmw_nand_i32_monotonic(ptr %a, i32 %b) nounwind { ; RV64IA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end ; RV64IA-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_monotonic: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB150_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB150_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_monotonic: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB150_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB150_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_monotonic: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: .LBB150_1: # =>This Inner Loop Header: Depth=1 @@ -21016,6 +27130,34 @@ define i32 @atomicrmw_nand_i32_monotonic(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_monotonic: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB150_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB150_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_monotonic: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB150_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB150_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_monotonic: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -21172,6 +27314,30 @@ define i32 @atomicrmw_nand_i32_acquire(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # %atomicrmw.end ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acquire: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB151_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a2, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB151_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acquire: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB151_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB151_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acquire: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: .LBB151_1: # =>This Inner Loop Header: Depth=1 @@ -21196,6 +27362,34 @@ define i32 @atomicrmw_nand_i32_acquire(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acquire: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB151_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.w.aq a0, a4, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB151_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acquire: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB151_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB151_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acquire: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -21352,6 +27546,30 @@ define i32 @atomicrmw_nand_i32_release(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # %atomicrmw.end ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_release: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB152_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a3, a3, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB152_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_release: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB152_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB152_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_release: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: .LBB152_1: # =>This Inner Loop Header: Depth=1 @@ -21376,6 +27594,34 @@ define i32 @atomicrmw_nand_i32_release(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_release: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB152_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.w.rl a0, a4, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB152_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_release: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB152_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB152_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_release: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -21532,6 +27778,30 @@ define i32 @atomicrmw_nand_i32_acq_rel(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # %atomicrmw.end ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acq_rel: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB153_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aq a2, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a3, a3, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB153_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acq_rel: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB153_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w a2, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w a3, a3, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB153_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acq_rel: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: .LBB153_1: # =>This Inner Loop Header: Depth=1 @@ -21556,6 +27826,34 @@ define i32 @atomicrmw_nand_i32_acq_rel(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acq_rel: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB153_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.w.aqrl a0, a4, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB153_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acq_rel: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB153_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB153_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acq_rel: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 @@ -21692,6 +27990,30 @@ define i32 @atomicrmw_nand_i32_seq_cst(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # %atomicrmw.end ; RV64IA-TSO-ZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_seq_cst: +; RV32IA-WMO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: .LBB154_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a2, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: sc.w.rl a3, a3, (a0) +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB154_1 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-WMO-ZABHA-NOZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_seq_cst: +; RV32IA-TSO-ZABHA-NOZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: .LBB154_1: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: lr.w.aqrl a2, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: and a3, a2, a1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: not a3, a3 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: sc.w.rl a3, a3, (a0) +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: bnez a3, .LBB154_1 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: # %bb.2: +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 +; RV32IA-TSO-ZABHA-NOZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_seq_cst: ; RV64IA-WMO-ZABHA-NOZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-NOZACAS-NEXT: .LBB154_1: # =>This Inner Loop Header: Depth=1 @@ -21716,6 +28038,36 @@ define i32 @atomicrmw_nand_i32_seq_cst(ptr %a, i32 %b) nounwind { ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: mv a0, a2 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT: ret ; +; RV32IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_seq_cst: +; RV32IA-WMO-ZABHA-ZACAS: # %bb.0: +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: .LBB154_1: # %atomicrmw.start +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-WMO-ZABHA-ZACAS-NEXT: amocas.w.aqrl a0, a4, (a2) +; RV32IA-WMO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB154_1 +; RV32IA-WMO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-WMO-ZABHA-ZACAS-NEXT: ret +; +; RV32IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_seq_cst: +; RV32IA-TSO-ZABHA-ZACAS: # %bb.0: +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a2, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: lw a0, 0(a0) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: .LBB154_1: # %atomicrmw.start +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: mv a3, a0 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: and a4, a0, a1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: not a4, a4 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: fence rw, rw +; RV32IA-TSO-ZABHA-ZACAS-NEXT: amocas.w a0, a4, (a2) +; RV32IA-TSO-ZABHA-ZACAS-NEXT: bne a0, a3, .LBB154_1 +; RV32IA-TSO-ZABHA-ZACAS-NEXT: # %bb.2: # %atomicrmw.end +; RV32IA-TSO-ZABHA-ZACAS-NEXT: ret +; ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_seq_cst: ; RV64IA-WMO-ZABHA-ZACAS: # %bb.0: ; RV64IA-WMO-ZABHA-ZACAS-NEXT: mv a2, a0 diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll index ead255b..f3529b1 100644 --- a/llvm/test/CodeGen/RISCV/attributes.ll +++ b/llvm/test/CodeGen/RISCV/attributes.ll @@ -443,7 +443,7 @@ ; RV32ZVFBFWMA: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin1p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvfbfwma1p0_zvl32b1p0" ; RV32ZVFOFP8MIN: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfofp8min0p2_zvl32b1p0" ; RV32ZACAS: .attribute 5, "rv32i2p1_zaamo1p0_zacas1p0" -; RV32ZALASR: .attribute 5, "rv32i2p1_zalasr0p1" +; RV32ZALASR: .attribute 5, "rv32i2p1_zalasr0p9" ; RV32ZAMA16B: .attribute 5, "rv32i2p1_zama16b1p0" ; RV32ZICFILP: .attribute 5, "rv32i2p1_zicfilp1p0_zicsr2p0" ; RV32ZABHA: .attribute 5, "rv32i2p1_zaamo1p0_zabha1p0" @@ -590,8 +590,8 @@ ; RV64ZVFBFWMA: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zfbfmin1p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvfbfwma1p0_zvl32b1p0" ; RV64ZVFOFP8MIN: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfofp8min0p2_zvl32b1p0" ; RV64ZACAS: .attribute 5, "rv64i2p1_zaamo1p0_zacas1p0" -; RV64ZALASR: .attribute 5, "rv64i2p1_zalasr0p1" -; RV64ZALASRA: .attribute 5, "rv64i2p1_a2p1_zaamo1p0_zalasr0p1_zalrsc1p0" +; RV64ZALASR: .attribute 5, "rv64i2p1_zalasr0p9" +; RV64ZALASRA: .attribute 5, "rv64i2p1_a2p1_zaamo1p0_zalasr0p9_zalrsc1p0" ; RV64ZICFILP: .attribute 5, "rv64i2p1_zicfilp1p0_zicsr2p0" ; RV64ZABHA: .attribute 5, "rv64i2p1_zaamo1p0_zabha1p0" ; RV64ZVBC32E: .attribute 5, "rv64i2p1_zicsr2p0_zvbc32e0p7_zve32x1p0_zvl32b1p0" diff --git a/llvm/test/CodeGen/RISCV/float-imm.ll b/llvm/test/CodeGen/RISCV/float-imm.ll index e4e3454..610c72b 100644 --- a/llvm/test/CodeGen/RISCV/float-imm.ll +++ b/llvm/test/CodeGen/RISCV/float-imm.ll @@ -4,11 +4,10 @@ ; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \ ; RUN: -target-abi=lp64f | FileCheck %s ; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \ -; RUN: -target-abi=ilp32 | FileCheck --check-prefixes=CHECKZFINX,RV32ZFINX %s +; RUN: -target-abi=ilp32 | FileCheck --check-prefixes=CHECKZFINX %s ; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \ -; RUN: -target-abi=lp64 | FileCheck --check-prefixes=CHECKZFINX,RV64ZFINX %s +; RUN: -target-abi=lp64 | FileCheck --check-prefixes=CHECKZFINX %s -; TODO: constant pool shouldn't be necessary for RV64IF. define float @float_imm() nounwind { ; CHECK-LABEL: float_imm: ; CHECK: # %bb.0: @@ -69,6 +68,3 @@ define float @float_negative_zero(ptr %pf) nounwind { ; CHECKZFINX-NEXT: ret ret float -0.0 } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; RV32ZFINX: {{.*}} -; RV64ZFINX: {{.*}} diff --git a/llvm/test/CodeGen/RISCV/half-imm.ll b/llvm/test/CodeGen/RISCV/half-imm.ll index 1dc0da8c..ec1a7a4 100644 --- a/llvm/test/CodeGen/RISCV/half-imm.ll +++ b/llvm/test/CodeGen/RISCV/half-imm.ll @@ -5,22 +5,21 @@ ; RUN: -target-abi lp64f < %s | FileCheck %s ; RUN: llc -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs \ ; RUN: -target-abi ilp32 < %s \ -; RUN: | FileCheck -check-prefix=RV32IZHINX %s +; RUN: | FileCheck -check-prefixes=CHECKIZHINX %s ; RUN: llc -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs \ ; RUN: -target-abi lp64 < %s \ -; RUN: | FileCheck -check-prefix=RV64IZHINX %s +; RUN: | FileCheck -check-prefixes=CHECKIZHINX %s ; RUN: llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs \ ; RUN: -target-abi ilp32f < %s | FileCheck -check-prefixes=CHECKIZFHMIN %s ; RUN: llc -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs \ ; RUN: -target-abi lp64f < %s | FileCheck -check-prefixes=CHECKIZFHMIN %s ; RUN: llc -mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs \ ; RUN: -target-abi ilp32 < %s \ -; RUN: | FileCheck -check-prefixes=CHECKIZHINXMIN,RV32IZHINXMIN %s +; RUN: | FileCheck -check-prefixes=CHECKIZHINXMIN %s ; RUN: llc -mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs \ ; RUN: -target-abi lp64 < %s \ -; RUN: | FileCheck -check-prefixes=CHECKIZHINXMIN,RV64IZHINXMIN %s +; RUN: | FileCheck -check-prefixes=CHECKIZHINXMIN %s -; TODO: constant pool shouldn't be necessary for RV32IZfh and RV64IZfh define half @half_imm() nounwind { ; CHECK-LABEL: half_imm: ; CHECK: # %bb.0: @@ -29,19 +28,12 @@ define half @half_imm() nounwind { ; CHECK-NEXT: fmv.h.x fa0, a0 ; CHECK-NEXT: ret ; -; RV32IZHINX-LABEL: half_imm: -; RV32IZHINX: # %bb.0: -; RV32IZHINX-NEXT: lui a0, 4 -; RV32IZHINX-NEXT: addi a0, a0, 512 -; RV32IZHINX-NEXT: # kill: def $x10_h killed $x10_h killed $x10 -; RV32IZHINX-NEXT: ret -; -; RV64IZHINX-LABEL: half_imm: -; RV64IZHINX: # %bb.0: -; RV64IZHINX-NEXT: lui a0, 4 -; RV64IZHINX-NEXT: addi a0, a0, 512 -; RV64IZHINX-NEXT: # kill: def $x10_h killed $x10_h killed $x10 -; RV64IZHINX-NEXT: ret +; CHECKIZHINX-LABEL: half_imm: +; CHECKIZHINX: # %bb.0: +; CHECKIZHINX-NEXT: lui a0, 4 +; CHECKIZHINX-NEXT: addi a0, a0, 512 +; CHECKIZHINX-NEXT: # kill: def $x10_h killed $x10_h killed $x10 +; CHECKIZHINX-NEXT: ret ; ; CHECKIZFHMIN-LABEL: half_imm: ; CHECKIZFHMIN: # %bb.0: @@ -68,19 +60,12 @@ define half @half_imm_op(half %a) nounwind { ; CHECK-NEXT: fadd.h fa0, fa0, fa5 ; CHECK-NEXT: ret ; -; RV32IZHINX-LABEL: half_imm_op: -; RV32IZHINX: # %bb.0: -; RV32IZHINX-NEXT: li a1, 15 -; RV32IZHINX-NEXT: slli a1, a1, 10 -; RV32IZHINX-NEXT: fadd.h a0, a0, a1 -; RV32IZHINX-NEXT: ret -; -; RV64IZHINX-LABEL: half_imm_op: -; RV64IZHINX: # %bb.0: -; RV64IZHINX-NEXT: li a1, 15 -; RV64IZHINX-NEXT: slli a1, a1, 10 -; RV64IZHINX-NEXT: fadd.h a0, a0, a1 -; RV64IZHINX-NEXT: ret +; CHECKIZHINX-LABEL: half_imm_op: +; CHECKIZHINX: # %bb.0: +; CHECKIZHINX-NEXT: li a1, 15 +; CHECKIZHINX-NEXT: slli a1, a1, 10 +; CHECKIZHINX-NEXT: fadd.h a0, a0, a1 +; CHECKIZHINX-NEXT: ret ; ; CHECKIZFHMIN-LABEL: half_imm_op: ; CHECKIZFHMIN: # %bb.0: @@ -108,15 +93,10 @@ define half @half_positive_zero(ptr %pf) nounwind { ; CHECK-NEXT: fmv.h.x fa0, zero ; CHECK-NEXT: ret ; -; RV32IZHINX-LABEL: half_positive_zero: -; RV32IZHINX: # %bb.0: -; RV32IZHINX-NEXT: li a0, 0 -; RV32IZHINX-NEXT: ret -; -; RV64IZHINX-LABEL: half_positive_zero: -; RV64IZHINX: # %bb.0: -; RV64IZHINX-NEXT: li a0, 0 -; RV64IZHINX-NEXT: ret +; CHECKIZHINX-LABEL: half_positive_zero: +; CHECKIZHINX: # %bb.0: +; CHECKIZHINX-NEXT: li a0, 0 +; CHECKIZHINX-NEXT: ret ; ; CHECKIZFHMIN-LABEL: half_positive_zero: ; CHECKIZFHMIN: # %bb.0: @@ -137,15 +117,10 @@ define half @half_negative_zero(ptr %pf) nounwind { ; CHECK-NEXT: fmv.h.x fa0, a0 ; CHECK-NEXT: ret ; -; RV32IZHINX-LABEL: half_negative_zero: -; RV32IZHINX: # %bb.0: -; RV32IZHINX-NEXT: lui a0, 1048568 -; RV32IZHINX-NEXT: ret -; -; RV64IZHINX-LABEL: half_negative_zero: -; RV64IZHINX: # %bb.0: -; RV64IZHINX-NEXT: lui a0, 1048568 -; RV64IZHINX-NEXT: ret +; CHECKIZHINX-LABEL: half_negative_zero: +; CHECKIZHINX: # %bb.0: +; CHECKIZHINX-NEXT: lui a0, 1048568 +; CHECKIZHINX-NEXT: ret ; ; CHECKIZFHMIN-LABEL: half_negative_zero: ; CHECKIZFHMIN: # %bb.0: @@ -159,6 +134,3 @@ define half @half_negative_zero(ptr %pf) nounwind { ; CHECKIZHINXMIN-NEXT: ret ret half -0.0 } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; RV32IZHINXMIN: {{.*}} -; RV64IZHINXMIN: {{.*}} diff --git a/llvm/test/CodeGen/RISCV/rv64zba.ll b/llvm/test/CodeGen/RISCV/rv64zba.ll index c028d25..7fd7626 100644 --- a/llvm/test/CodeGen/RISCV/rv64zba.ll +++ b/llvm/test/CodeGen/RISCV/rv64zba.ll @@ -409,15 +409,11 @@ define i64 @sh3adduw_2(i64 %0, i64 %1) { ; ; RV64ZBA-LABEL: sh3adduw_2: ; RV64ZBA: # %bb.0: -; RV64ZBA-NEXT: slli a0, a0, 3 -; RV64ZBA-NEXT: srli a0, a0, 3 ; RV64ZBA-NEXT: sh3add.uw a0, a0, a1 ; RV64ZBA-NEXT: ret ; ; RV64XANDESPERF-LABEL: sh3adduw_2: ; RV64XANDESPERF: # %bb.0: -; RV64XANDESPERF-NEXT: slli a0, a0, 3 -; RV64XANDESPERF-NEXT: srli a0, a0, 3 ; RV64XANDESPERF-NEXT: nds.lea.d.ze a0, a1, a0 ; RV64XANDESPERF-NEXT: ret %3 = shl i64 %0, 3 @@ -436,15 +432,11 @@ define i64 @sh3adduw_3(i64 %0, i64 %1) { ; ; RV64ZBA-LABEL: sh3adduw_3: ; RV64ZBA: # %bb.0: -; RV64ZBA-NEXT: slli a0, a0, 3 -; RV64ZBA-NEXT: srli a0, a0, 3 ; RV64ZBA-NEXT: sh3add.uw a0, a0, a1 ; RV64ZBA-NEXT: ret ; ; RV64XANDESPERF-LABEL: sh3adduw_3: ; RV64XANDESPERF: # %bb.0: -; RV64XANDESPERF-NEXT: slli a0, a0, 3 -; RV64XANDESPERF-NEXT: srli a0, a0, 3 ; RV64XANDESPERF-NEXT: nds.lea.d.ze a0, a1, a0 ; RV64XANDESPERF-NEXT: ret %3 = shl i64 %0, 3 @@ -2681,7 +2673,7 @@ define i64 @srliw_3_sh3add(ptr %0, i32 signext %1) { ; RV64ZBA-LABEL: srliw_3_sh3add: ; RV64ZBA: # %bb.0: ; RV64ZBA-NEXT: srliw a1, a1, 3 -; RV64ZBA-NEXT: sh3add.uw a0, a1, a0 +; RV64ZBA-NEXT: sh3add a0, a1, a0 ; RV64ZBA-NEXT: ld a0, 0(a0) ; RV64ZBA-NEXT: ret ; |