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-rw-r--r--llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp8
-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineScheduler.h4
2 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index 434336e..46f5097 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -92,12 +92,12 @@ public:
SetVector<MachineInstr *> SChain;
// Number of SGPR to VGPR copies that are used to put the SALU computation
// results back to VALU.
- unsigned NumSVCopies;
+ unsigned NumSVCopies = 0;
- unsigned Score;
+ unsigned Score = 0;
// Actual count of v_readfirstlane_b32
// which need to be inserted to keep SChain SALU
- unsigned NumReadfirstlanes;
+ unsigned NumReadfirstlanes = 0;
// Current score state. To speedup selection V2SCopyInfos for processing
bool NeedToBeConvertedToVALU = false;
// Unique ID. Used as a key for mapping to keep permanent order.
@@ -109,7 +109,7 @@ public:
SetVector<unsigned> Siblings;
V2SCopyInfo() : Copy(nullptr), ID(0){};
V2SCopyInfo(unsigned Id, MachineInstr *C, unsigned Width)
- : Copy(C), NumSVCopies(0), NumReadfirstlanes(Width / 32), ID(Id){};
+ : Copy(C), NumReadfirstlanes(Width / 32), ID(Id){};
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() {
dbgs() << ID << " : " << *Copy << "\n\tS:" << SChain.size()
diff --git a/llvm/lib/Target/AMDGPU/SIMachineScheduler.h b/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
index ac34a74..f8f4b5a 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
@@ -120,8 +120,8 @@ public:
ArrayRef<std::pair<SIScheduleBlock*, SIScheduleBlockLinkKind>>
getSuccs() const { return Succs; }
- unsigned Height; // Maximum topdown path length to block without outputs
- unsigned Depth; // Maximum bottomup path length to block without inputs
+ unsigned Height = 0; // Maximum topdown path length to block without outputs
+ unsigned Depth = 0; // Maximum bottomup path length to block without inputs
unsigned getNumHighLatencySuccessors() const {
return NumHighLatencySuccessors;