diff options
Diffstat (limited to 'llvm/lib')
17 files changed, 52 insertions, 37 deletions
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index 5b49d23..14fc8e8 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -809,9 +809,10 @@ InstructionCost TargetTransformInfo::getCmpSelInstrCost( return Cost; } -int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) const { - int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); +InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, + Type *Val, + unsigned Index) const { + InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); assert(Cost >= 0 && "TTI should not produce negative costs!"); return Cost; } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index dfcbfb1..f99a30b 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -665,8 +665,8 @@ InstructionCost AArch64TTIImpl::getCFInstrCost(unsigned Opcode, return 0; } -int AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { +InstructionCost AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { assert(Val->isVectorTy() && "This must be a vector type"); if (Index != -1U) { diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h index 65f3ee8..27e5c70 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -144,7 +144,8 @@ public: InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getMinMaxReductionCost(VectorType *Ty, VectorType *CondTy, bool IsPairwise, bool IsUnsigned, diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index 2b2596e..df8c786 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -881,8 +881,8 @@ GCNTTIImpl::getMinMaxReductionCost(VectorType *Ty, VectorType *CondTy, return LT.first * getHalfRateInstrCost(CostKind); } -int GCNTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost GCNTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { switch (Opcode) { case Instruction::ExtractElement: case Instruction::InsertElement: { @@ -1332,8 +1332,8 @@ InstructionCost R600TTIImpl::getCFInstrCost(unsigned Opcode, } } -int R600TTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost R600TTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { switch (Opcode) { case Instruction::ExtractElement: case Instruction::InsertElement: { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h index 89b61e0..5bdca9f 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -169,7 +169,8 @@ public: bool isInlineAsmSourceOfDivergence(const CallInst *CI, ArrayRef<unsigned> Indices = {}) const; - int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index); bool isSourceOfDivergence(const Value *V) const; bool isAlwaysUniform(const Value *V) const; @@ -255,7 +256,8 @@ public: unsigned getMaxInterleaveFactor(unsigned VF); InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index); }; } // end namespace llvm diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp index b78d9a3..4f1e6e1 100644 --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -797,8 +797,8 @@ InstructionCost ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, BaseCost * BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I)); } -int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { // Penalize inserting into an D-subregister. We end up with a three times // lower estimated throughput on swift. if (ST->hasSlowLoadDSubregister() && Opcode == Instruction::InsertElement && @@ -816,7 +816,8 @@ int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, // of NEON and VFP code and should be therefore penalized. if (ValTy->isVectorTy() && ValTy->getScalarSizeInBits() <= 32) - return std::max(BaseT::getVectorInstrCost(Opcode, ValTy, Index), 2U); + return std::max<InstructionCost>( + BaseT::getVectorInstrCost(Opcode, ValTy, Index), 2U); } if (ST->hasMVEIntegerOps() && (Opcode == Instruction::InsertElement || diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h index 37f214a..ffdb677d 100644 --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h @@ -212,7 +212,8 @@ public: TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); int getAddressComputationCost(Type *Val, ScalarEvolution *SE, const SCEV *Ptr); diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp index 993c8f1..076f51e 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp @@ -299,8 +299,8 @@ InstructionCost HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy, return 1; } -unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { +InstructionCost HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { Type *ElemTy = Val->isVectorTy() ? cast<VectorType>(Val)->getElementType() : Val; if (Opcode == Instruction::InsertElement) { diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h index 6b03da0..57b48b62 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -152,7 +152,8 @@ public: TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr) { diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp index bda84da..658eba2 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -1040,14 +1040,15 @@ InstructionCost PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, return vectorCostAdjustment(Cost, Opcode, ValTy, nullptr); } -int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { assert(Val->isVectorTy() && "This must be a vector type"); int ISD = TLI->InstructionOpcodeToISD(Opcode); assert(ISD && "Invalid opcode"); - int Cost = BaseT::getVectorInstrCost(Opcode, Val, Index); - Cost = *vectorCostAdjustment(Cost, Opcode, Val, nullptr).getValue(); + InstructionCost Cost = BaseT::getVectorInstrCost(Opcode, Val, Index); + Cost = vectorCostAdjustment(Cost, Opcode, Val, nullptr); if (ST->hasVSX() && Val->getScalarType()->isDoubleTy()) { // Double-precision scalars are already located in index #0 (or #1 if LE). @@ -1062,7 +1063,7 @@ int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { if (ISD == ISD::INSERT_VECTOR_ELT) // A move-to VSR and a permute/insert. Assume vector operation cost // for both (cost will be 2x on P9). - return *vectorCostAdjustment(2, Opcode, Val, nullptr).getValue(); + return vectorCostAdjustment(2, Opcode, Val, nullptr); // It's an extract. Maybe we can do a cheap move-from VSR. unsigned EltSize = Val->getScalarSizeInBits(); @@ -1079,7 +1080,7 @@ int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { // We need a vector extract (or mfvsrld). Assume vector operation cost. // The cost of the load constant for a vector extract is disregarded // (invariant, easily schedulable). - return *vectorCostAdjustment(1, Opcode, Val, nullptr).getValue(); + return vectorCostAdjustment(1, Opcode, Val, nullptr); } else if (ST->hasDirectMove()) // Assume permute has standard cost. @@ -1125,7 +1126,7 @@ InstructionCost PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, if (CostKind != TTI::TCK_RecipThroughput) return Cost; - Cost = *vectorCostAdjustment(Cost, Opcode, Src, nullptr).getValue(); + Cost = vectorCostAdjustment(Cost, Opcode, Src, nullptr); bool IsAltivecType = ST->hasAltivec() && (LT.second == MVT::v16i8 || LT.second == MVT::v8i16 || diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h index 0f45af0..e34fdef1 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -120,7 +120,8 @@ public: CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp index 043da68..56cbda2 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp @@ -952,8 +952,8 @@ InstructionCost SystemZTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind); } -int SystemZTTIImpl:: -getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost SystemZTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { // vlvgp will insert two grs into a vector register, so only count half the // number of instructions. if (Opcode == Instruction::InsertElement && Val->isIntOrIntVectorTy(64)) diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h index 8b12d4b..90d015b 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h @@ -102,7 +102,8 @@ public: CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp index 1357860..d8ccf44 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp @@ -81,9 +81,11 @@ unsigned WebAssemblyTTIImpl::getArithmeticInstrCost( return Cost; } -unsigned WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { - unsigned Cost = BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index); +InstructionCost WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, + Type *Val, + unsigned Index) { + InstructionCost Cost = + BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index); // SIMD128's insert/extract currently only take constant indices. if (Index == -1u) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h index 8b9719f..e17dcfa 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h @@ -67,7 +67,8 @@ public: TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, ArrayRef<const Value *> Args = ArrayRef<const Value *>(), const Instruction *CxtI = nullptr); - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); /// @} diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 5c03572..05e5424 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -3016,7 +3016,8 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, return BaseT::getIntrinsicInstrCost(ICA, CostKind); } -int X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { static const CostTblEntry SLMCostTbl[] = { { ISD::EXTRACT_VECTOR_ELT, MVT::i8, 4 }, { ISD::EXTRACT_VECTOR_ELT, MVT::i16, 4 }, @@ -3099,7 +3100,7 @@ int X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { getShuffleCost(TTI::SK_PermuteTwoSrc, SubTy, None, 0, SubTy); } int IntOrFpCost = ScalarType->isFloatingPointTy() ? 0 : 1; - return *ShuffleCost.getValue() + IntOrFpCost + RegisterFileMoveCost; + return ShuffleCost + IntOrFpCost + RegisterFileMoveCost; } // Add to the base cost if we know that the extracted element of a vector is @@ -4217,7 +4218,7 @@ InstructionCost X86TTIImpl::getGSScalarCost(unsigned Opcode, Type *SrcVTy, VF * getMemoryOpCost(Opcode, SrcVTy->getScalarType(), MaybeAlign(Alignment), AddressSpace, CostKind); - int InsertExtractCost = 0; + InstructionCost InsertExtractCost = 0; if (Opcode == Instruction::Load) for (unsigned i = 0; i < VF; ++i) // Add the cost of inserting each scalar load into the vector diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h index f3a81cd7..705aae3 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -138,7 +138,8 @@ public: CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, |