diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp index 0a58b9f..3dca75d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp @@ -285,8 +285,13 @@ static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { static unsigned regInstructionToStackInstruction(unsigned OpCode) { // For most opcodes, this function could have been implemented as "return // OpCode + 1", but since table-gen alphabetically sorts them, this cannot be - // guaranteed (see e.g. BR and BR_IF), so we table-gen a giant switch - // statement instead. + // guaranteed (see e.g. BR and BR_IF). Instead we use a giant switch statement + // generated by a custom TableGen backend (WebAssemblyStackifierEmitter.cpp) + // that emits switch cases of the form + // + // case WebAssembly::RegisterInstr: return WebAssembly::StackInstr; + // + // for every pair of equivalent register and stack instructions. switch (OpCode) { default: llvm_unreachable( |