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Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
-rw-r--r--llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp18
1 files changed, 8 insertions, 10 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index f979af4..081101f 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -690,12 +690,10 @@ static constexpr DecoderListEntry DecoderList32[]{
{DecoderTableXCV32, XCVFeatureGroup, "CORE-V extensions"},
{DecoderTableXqci32, XqciFeatureGroup, "Qualcomm uC Extensions"},
{DecoderTableXRivos32, XRivosFeatureGroup, "Rivos"},
- {DecoderTable32, {}, "RISCV32"},
- {DecoderTableRV32GPRPair32, {}, "RV32GPRPair (rv32 and GPR pairs)"},
+ {DecoderTable32, {}, "standard 32-bit instructions"},
+ {DecoderTableRV32Only32, {}, "RV32-only standard 32-bit instructions"},
{DecoderTableZfinx32, {}, "Zfinx (Float in Integer)"},
- {DecoderTableZdinxRV32GPRPair32,
- {},
- "ZdinxRV32GPRPair (rv32 and Double in Integer)"},
+ {DecoderTableZdinxRV32Only32, {}, "RV32-only Zdinx (Double in Integer)"},
};
DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
@@ -714,7 +712,7 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
if (!Entry.haveContainedFeatures(STI.getFeatureBits()))
continue;
- LLVM_DEBUG(dbgs() << "Trying " << Entry.Desc << "table:\n");
+ LLVM_DEBUG(dbgs() << "Trying " << Entry.Desc << " table:\n");
DecodeStatus Result =
decodeInstruction(Entry.Table, MI, Insn, Address, this, STI);
if (Result == MCDisassembler::Fail)
@@ -728,16 +726,16 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
static constexpr DecoderListEntry DecoderList16[]{
// Vendor Extensions
- {DecoderTableXqci16, XqciFeatureGroup, "Qualcomm uC 16bit"},
+ {DecoderTableXqci16, XqciFeatureGroup, "Qualcomm uC 16-bit"},
{DecoderTableXqccmp16,
{RISCV::FeatureVendorXqccmp},
"Xqccmp (Qualcomm 16-bit Push/Pop & Double Move Instructions)"},
{DecoderTableXwchc16, {RISCV::FeatureVendorXwchc}, "WCH QingKe XW"},
// Standard Extensions
// DecoderTableZicfiss16 must be checked before DecoderTable16.
- {DecoderTableZicfiss16, {}, "RVZicfiss (Shadow Stack)"},
- {DecoderTable16, {}, "RISCV_C (16-bit Instruction)"},
- {DecoderTableRISCV32Only_16, {}, "RISCV32Only_16 (16-bit Instruction)"},
+ {DecoderTableZicfiss16, {}, "Zicfiss (Shadow Stack 16-bit)"},
+ {DecoderTable16, {}, "standard 16-bit instructions"},
+ {DecoderTableRV32Only16, {}, "RV32-only 16-bit instructions"},
// Zc* instructions incompatible with Zcf or Zcd
{DecoderTableZcOverlap16,
{},