diff options
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 27809d9..8f1b790 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -447,15 +447,15 @@ static DecodeStatus decodeSImmNonZeroOperand(MCInst &Inst, uint32_t Imm, return decodeSImmOperand<N>(Inst, Imm, Address, Decoder); } -template <unsigned N> -static DecodeStatus decodeSImmOperandAndLsl1(MCInst &Inst, uint32_t Imm, +template <unsigned T, unsigned N> +static DecodeStatus decodeSImmOperandAndLslN(MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder) { - assert(isUInt<N>(Imm) && "Invalid immediate"); - // Sign-extend the number in the bottom N bits of Imm after accounting for - // the fact that the N bit immediate is stored in N-1 bits (the LSB is + assert(isUInt<T - N + 1>(Imm) && "Invalid immediate"); + // Sign-extend the number in the bottom T bits of Imm after accounting for + // the fact that the T bit immediate is stored in T-N bits (the LSB is // always zero) - Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); + Inst.addOperand(MCOperand::createImm(SignExtend64<T>(Imm << N))); return MCDisassembler::Success; } @@ -727,6 +727,8 @@ static constexpr FeatureBitset XTHeadGroup = { RISCV::FeatureVendorXTHeadMemPair, RISCV::FeatureVendorXTHeadSync, RISCV::FeatureVendorXTHeadVdot}; +static constexpr FeatureBitset XAndesGroup = {RISCV::FeatureVendorXAndesPerf}; + static constexpr DecoderListEntry DecoderList32[]{ // Vendor Extensions {DecoderTableXVentana32, @@ -740,6 +742,7 @@ static constexpr DecoderListEntry DecoderList32[]{ {DecoderTableXmipscmov32, {RISCV::FeatureVendorXMIPSCMov}, "MIPS mips.ccmov"}, + {DecoderTableXAndes32, XAndesGroup, "Andes extensions"}, // Standard Extensions {DecoderTableXCV32, XCVFeatureGroup, "CORE-V extensions"}, {DecoderTableXqci32, XqciFeatureGroup, "Qualcomm uC Extensions"}, |