diff options
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index cb2a0c4..b4e6b32 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -629,6 +629,9 @@ static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder); +static DecodeStatus DecodeVpredNOperand(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder); @@ -6544,6 +6547,17 @@ static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } +[[maybe_unused]] static DecodeStatus +DecodeVpredNOperand(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { + // Similar to above, we want to ensure that no operands are added for the + // vpred operands. (This is marked "maybe_unused" for the moment; because + // DecoderEmitter currently (wrongly) omits operands with no instruction bits, + // the decoder doesn't actually call it yet. That will be addressed in a + // future change.) + return MCDisassembler::Success; +} + static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder) { |