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| author | Sanjay Patel <spatel@rotateright.com> | 2022-09-06 08:56:57 -0400 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2022-09-06 08:58:15 -0400 |
| commit | fe1f3cfc2669aca387a45c8ce615b45c1db50fc6 (patch) | |
| tree | 6934fe423fa7c1e1a0518e3aceb35212e28257c1 /llvm/unittests/CodeGen/MachineInstrTest.cpp | |
| parent | 59482586e5927b4e57e275b304e9e17e61af2b9d (diff) | |
| download | llvm-fe1f3cfc2669aca387a45c8ce615b45c1db50fc6.zip llvm-fe1f3cfc2669aca387a45c8ce615b45c1db50fc6.tar.gz llvm-fe1f3cfc2669aca387a45c8ce615b45c1db50fc6.tar.bz2 | |
[SCCP] convert signed div/rem to unsigned for non-negative operands
This extends the transform added with D81756 to handle div/rem opcodes.
For example:
https://alive2.llvm.org/ce/z/cX6za6
This replicates part of what CVP already does, but the motivating example
from issue #57472 demonstrates a phase ordering problem - we convert
branches to select before CVP runs and miss the transform.
Differential Revision: https://reviews.llvm.org/D133198
Diffstat (limited to 'llvm/unittests/CodeGen/MachineInstrTest.cpp')
0 files changed, 0 insertions, 0 deletions