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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-24 08:59:08 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-24 08:59:08 +0000 |
| commit | eb1053f9d3679111c3261fc33a82b6e0a7001c72 (patch) | |
| tree | 32d11fdb65a5c95f20e912b6928feb1eaacbf0b7 /llvm/unittests/CodeGen/MachineInstrTest.cpp | |
| parent | 6afcd64eb65fca233a7b173f88cffb2c2c9c114c (diff) | |
| download | llvm-eb1053f9d3679111c3261fc33a82b6e0a7001c72.zip llvm-eb1053f9d3679111c3261fc33a82b6e0a7001c72.tar.gz llvm-eb1053f9d3679111c3261fc33a82b6e0a7001c72.tar.bz2 | |
[AArch64][SVE] Asm: Support for contiguous, first-faulting LDFF1 (scalar+scalar) load instructions.
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar
Reviewed By: rengolin
Subscribers: tschuett, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D45946
llvm-svn: 330697
Diffstat (limited to 'llvm/unittests/CodeGen/MachineInstrTest.cpp')
0 files changed, 0 insertions, 0 deletions