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| author | Peter Smith <peter.smith@arm.com> | 2020-02-23 19:46:46 +0000 |
|---|---|---|
| committer | Peter Smith <peter.smith@arm.com> | 2020-02-28 11:29:29 +0000 |
| commit | 6b035b607f5f5e4db6f1ca51340d7a87b5807a0c (patch) | |
| tree | 0fbfa488986f5267a6a34aaabe28621b4c1bd081 /llvm/unittests/CodeGen/MachineInstrTest.cpp | |
| parent | 2a92fc9b8e6a079acd53ec3675cfd9bb153ab1ea (diff) | |
| download | llvm-6b035b607f5f5e4db6f1ca51340d7a87b5807a0c.zip llvm-6b035b607f5f5e4db6f1ca51340d7a87b5807a0c.tar.gz llvm-6b035b607f5f5e4db6f1ca51340d7a87b5807a0c.tar.bz2 | |
[LLD][ELF][ARM] Implement Thumb pc-relative relocations for adr and ldr
MC will now output the R_ARM_THM_PC8, R_ARM_THM_PC12 and
R_ARM_THM_PREL_11_0 relocations. These are short-ranged relocations that
are used to implement the adr rd, literal and ldr rd, literal pseudo
instructions.
The instructions use a new RelExpr called R_ARM_PCA in order to calculate
the required S + A - Pa expression, where Pa is AlignDown(P, 4) as the
instructions add their immediate to AlignDown(PC, 4). We also do not want
these relocations to generate or resolve against a PLT entry as the range
of these relocations is so short they would never reach.
The R_ARM_THM_PC8 has a special encoding convention for the relocation
addend, the immediate field is unsigned, yet the addend must be -4 to
account for the Thumb PC bias. The ABI (not the architecture) uses the
convention that the 8-byte immediate of 0xff represents -4.
Differential Revision: https://reviews.llvm.org/D75042
Diffstat (limited to 'llvm/unittests/CodeGen/MachineInstrTest.cpp')
0 files changed, 0 insertions, 0 deletions