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author | David Green <david.green@arm.com> | 2019-10-31 15:22:24 +0000 |
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committer | David Green <david.green@arm.com> | 2019-10-31 17:28:36 +0000 |
commit | 2179867ddc2990b141d53ade1d66fc1af66b412e (patch) | |
tree | 08bb10098d5bbd440e5ccd56a898698306afc1f8 /llvm/unittests/CodeGen/MachineInstrTest.cpp | |
parent | 62c0746896f9e4452a17cb847cd8c858e76c455e (diff) | |
download | llvm-2179867ddc2990b141d53ade1d66fc1af66b412e.zip llvm-2179867ddc2990b141d53ade1d66fc1af66b412e.tar.gz llvm-2179867ddc2990b141d53ade1d66fc1af66b412e.tar.bz2 |
[AArch64] Select saturating Neon instructions
This adds some extra patterns to select AArch64 Neon SQADD, UQADD, SQSUB
and UQSUB from the existing target independent sadd_sat, uadd_sat,
ssub_sat and usub_sat nodes.
It does not attempt to replace the existing int_aarch64_neon_uqadd
intrinsic nodes as they are apparently used for both scalar and vector,
and need to be legal on scalar types for some of the patterns to work.
The int_aarch64_neon_uqadd on scalar would move the two integers into
floating point registers, perform a Neon uqadd and move the value back.
I don't believe this is good idea for uadd_sat to do the same as the
scalar alternative is simpler (an adds with a csinv). For signed it may
be smaller, but I'm not sure about it being better.
So this just adds some extra patterns for the existing vector
instructions, matching on the _sat nodes.
Differential Revision: https://reviews.llvm.org/D69374
Diffstat (limited to 'llvm/unittests/CodeGen/MachineInstrTest.cpp')
0 files changed, 0 insertions, 0 deletions