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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-10-03 21:20:36 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-03 21:20:36 +0900 |
| commit | 80fd3eda25c63a7198137661ff7505d75de3e6f7 (patch) | |
| tree | 06040c313c6c0ae9a2cc0217b580a4c5b00722d4 /llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp | |
| parent | e3d23f85737863c1ffc7b757b729df1903ca30b7 (diff) | |
| download | llvm-80fd3eda25c63a7198137661ff7505d75de3e6f7.zip llvm-80fd3eda25c63a7198137661ff7505d75de3e6f7.tar.gz llvm-80fd3eda25c63a7198137661ff7505d75de3e6f7.tar.bz2 | |
AMDGPU: Fix constrain register logic for physregs (#161794)
We do not need to reconstrain physical registers. Enables an
additional fold for constant physregs.
Diffstat (limited to 'llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp')
0 files changed, 0 insertions, 0 deletions