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author | Eric Christopher <echristo@apple.com> | 2011-07-01 00:19:27 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2011-07-01 00:19:27 +0000 |
commit | f09b0f1043c96a124c5b292e426d79e77fd79752 (patch) | |
tree | f6e25b07807174954651454391afdd687a3f284e /llvm/lib | |
parent | 4b522de5c0872330558e450695a39b5be99e0712 (diff) | |
download | llvm-f09b0f1043c96a124c5b292e426d79e77fd79752.zip llvm-f09b0f1043c96a124c5b292e426d79e77fd79752.tar.gz llvm-f09b0f1043c96a124c5b292e426d79e77fd79752.tar.bz2 |
We'll return a null RC by default if we can't match.
Part of rdar://9119939
llvm-svn: 134217
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 22cd78f..1141f42 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -7544,8 +7544,7 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, case 'h': // High regs or no regs. if (Subtarget->isThumb()) return RCPair(0U, ARM::hGPRRegisterClass); - else - return RCPair(0U, static_cast<const TargetRegisterClass*>(0)); + break; case 'r': return RCPair(0U, ARM::GPRRegisterClass); case 'w': |