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authorDavid Green <david.green@arm.com>2023-04-28 14:57:51 +0100
committerDavid Green <david.green@arm.com>2023-04-28 14:57:51 +0100
commitd321f3aa64b4eaedd790dafe974cfdc0517cb22b (patch)
tree0eff7be5ad0a9f0055813150142834182b104457 /llvm/lib
parent56af0e913ce7ec29690cc7295d75fc5573153bbf (diff)
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[ARM] Enable shouldFoldSelectWithIdentityConstant for MVE
We already have tablegen patterns for a lot of these, but performing the combine earlier in DAG can help in a few extra cases. Differential Revision: https://reviews.llvm.org/D149269
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp5
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h3
2 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 2c35222..a0058e4 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13791,6 +13791,11 @@ bool ARMTargetLowering::shouldFoldConstantShiftPairToMask(
return false;
}
+bool ARMTargetLowering::shouldFoldSelectWithIdentityConstant(unsigned BinOpcode,
+ EVT VT) const {
+ return Subtarget->hasMVEIntegerOps() && isTypeLegal(VT);
+}
+
bool ARMTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const {
if (!Subtarget->hasNEON()) {
if (Subtarget->isThumb1Only())
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 2db55a5..3d2c09c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -738,6 +738,9 @@ class VectorType;
bool shouldFoldConstantShiftPairToMask(const SDNode *N,
CombineLevel Level) const override;
+ bool shouldFoldSelectWithIdentityConstant(unsigned BinOpcode,
+ EVT VT) const override;
+
bool preferIncOfAddToSubOfNot(EVT VT) const override;
bool shouldConvertFpToSat(unsigned Op, EVT FPVT, EVT VT) const override;