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author | Philip Reames <preames@rivosinc.com> | 2025-05-06 07:37:44 -0700 |
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committer | GitHub <noreply@github.com> | 2025-05-06 07:37:44 -0700 |
commit | d1b3eeb24460fb65773db712e4cc0e204ffcaa0d (patch) | |
tree | 08a5331bd88451dea55d130c6ef6384860f1f8bc /llvm/lib | |
parent | 2dd296aa47fff7f4e4c3cf75a5a1152817367371 (diff) | |
download | llvm-d1b3eeb24460fb65773db712e4cc0e204ffcaa0d.zip llvm-d1b3eeb24460fb65773db712e4cc0e204ffcaa0d.tar.gz llvm-d1b3eeb24460fb65773db712e4cc0e204ffcaa0d.tar.bz2 |
[SDAG] Merge memcpy and memcpy.inline lowering paths (#138619)
This is a follow up to c0a264e, but note that there is a functional
difference here: the root changes for the memcpy.inline case. This
difference appears to have been accidental, but I kept this back to
facility separate review in case there's something I'm missing here.
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 30 |
1 files changed, 6 insertions, 24 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 744a0fa..97ce20b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6461,33 +6461,14 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, RegName, getValue(RegValue))); return; } - case Intrinsic::memcpy: { - const auto &MCI = cast<MemCpyInst>(I); - SDValue Op1 = getValue(I.getArgOperand(0)); - SDValue Op2 = getValue(I.getArgOperand(1)); - SDValue Op3 = getValue(I.getArgOperand(2)); - // @llvm.memcpy defines 0 and 1 to both mean no alignment. - Align DstAlign = MCI.getDestAlign().valueOrOne(); - Align SrcAlign = MCI.getSourceAlign().valueOrOne(); - Align Alignment = std::min(DstAlign, SrcAlign); - bool isVol = MCI.isVolatile(); - // FIXME: Support passing different dest/src alignments to the memcpy DAG - // node. - SDValue Root = isVol ? getRoot() : getMemoryRoot(); - SDValue MC = DAG.getMemcpy(Root, sdl, Op1, Op2, Op3, Alignment, isVol, - /* AlwaysInline */ false, &I, std::nullopt, - MachinePointerInfo(I.getArgOperand(0)), - MachinePointerInfo(I.getArgOperand(1)), - I.getAAMetadata(), BatchAA); - updateDAGForMaybeTailCall(MC); - return; - } + case Intrinsic::memcpy: case Intrinsic::memcpy_inline: { const auto &MCI = cast<MemCpyInst>(I); SDValue Dst = getValue(I.getArgOperand(0)); SDValue Src = getValue(I.getArgOperand(1)); SDValue Size = getValue(I.getArgOperand(2)); - assert(isa<ConstantSDNode>(Size) && "memcpy_inline needs constant size"); + assert((!MCI.isForceInlined() || isa<ConstantSDNode>(Size)) && + "memcpy_inline needs constant size"); // @llvm.memcpy.inline defines 0 and 1 to both mean no alignment. Align DstAlign = MCI.getDestAlign().valueOrOne(); Align SrcAlign = MCI.getSourceAlign().valueOrOne(); @@ -6495,8 +6476,9 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, bool isVol = MCI.isVolatile(); // FIXME: Support passing different dest/src alignments to the memcpy DAG // node. - SDValue MC = DAG.getMemcpy(getRoot(), sdl, Dst, Src, Size, Alignment, isVol, - /* AlwaysInline */ true, &I, std::nullopt, + SDValue Root = isVol ? getRoot() : getMemoryRoot(); + SDValue MC = DAG.getMemcpy(Root, sdl, Dst, Src, Size, Alignment, isVol, + MCI.isForceInlined(), &I, std::nullopt, MachinePointerInfo(I.getArgOperand(0)), MachinePointerInfo(I.getArgOperand(1)), I.getAAMetadata(), BatchAA); |