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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-03-11 00:01:31 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-03-11 00:01:31 +0000 |
| commit | 9504d2f2699541bcfcb4a85d0f8dfa8c5e81302d (patch) | |
| tree | ff73ddedb79faad3443e275cdce7f96626c4fcf2 /llvm/lib | |
| parent | e1f1da30f4e18fbde4a3d98e0f60ddc665d127ce (diff) | |
| download | llvm-9504d2f2699541bcfcb4a85d0f8dfa8c5e81302d.zip llvm-9504d2f2699541bcfcb4a85d0f8dfa8c5e81302d.tar.gz llvm-9504d2f2699541bcfcb4a85d0f8dfa8c5e81302d.tar.bz2 | |
Use .data() instead of &x[0]
llvm-svn: 203516
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index e43f086..0fa8133 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -605,8 +605,8 @@ SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue &Op, MemEltVT, Load->isVolatile(), Load->isNonTemporal(), Load->getAlignment())); } - return DAG.getNode(ISD::BUILD_VECTOR, SL, Op.getValueType(), &Loads[0], - Loads.size()); + return DAG.getNode(ISD::BUILD_VECTOR, SL, Op.getValueType(), + Loads.data(), Loads.size()); } SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op, |