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| author | Craig Topper <craig.topper@gmail.com> | 2017-03-13 03:59:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-03-13 03:59:06 +0000 |
| commit | 5a63ca2ad2f456030bf6fd05ed2bcbfd41b546b5 (patch) | |
| tree | afe91f54c707d9438aa7534ae03d888e039b4ac4 /llvm/lib | |
| parent | 1f8753479e36d4fe30e9d252ec380bfaa670493f (diff) | |
| download | llvm-5a63ca2ad2f456030bf6fd05ed2bcbfd41b546b5.zip llvm-5a63ca2ad2f456030bf6fd05ed2bcbfd41b546b5.tar.gz llvm-5a63ca2ad2f456030bf6fd05ed2bcbfd41b546b5.tar.bz2 | |
[AVX-512] Use sse_load_f64/f32 in VCVTSS2SI/VCVTSD2SI patterns.
llvm-svn: 297599
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index e864af0..20970ae 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -5854,10 +5854,10 @@ multiclass avx512_cvt_s_int_round<bits<8> opc, X86VectorVTInfo SrcVT , !strconcat(asm,"\t{$rc, $src, $dst|$dst, $src, $rc}"), [(set DstVT.RC:$dst, (OpNode (SrcVT.VT SrcVT.RC:$src),(i32 imm:$rc)))]>, EVEX, VEX_LIG, EVEX_B, EVEX_RC; - def rm : SI<opc, MRMSrcMem, (outs DstVT.RC:$dst), (ins SrcVT.ScalarMemOp:$src), + def rm : SI<opc, MRMSrcMem, (outs DstVT.RC:$dst), (ins SrcVT.IntScalarMemOp:$src), !strconcat(asm,"\t{$src, $dst|$dst, $src}"), [(set DstVT.RC:$dst, (OpNode - (SrcVT.VT (scalar_to_vector (SrcVT.ScalarLdFrag addr:$src))), + (SrcVT.VT SrcVT.ScalarIntMemCPat:$src), (i32 FROUND_CURRENT)))]>, EVEX, VEX_LIG; } // Predicates = [HasAVX512] @@ -5894,20 +5894,20 @@ defm VCVTSD2USI64Z: avx512_cvt_s_int_round<0x79, f64x_info, i64x_info, let Predicates = [HasAVX512] in { def : Pat<(i32 (int_x86_sse_cvtss2si (v4f32 VR128X:$src))), (VCVTSS2SIZrr VR128X:$src)>; - def : Pat<(i32 (int_x86_sse_cvtss2si (sse_load_f32 addr:$src))), - (VCVTSS2SIZrm addr:$src)>; + def : Pat<(i32 (int_x86_sse_cvtss2si sse_load_f32:$src)), + (VCVTSS2SIZrm sse_load_f32:$src)>; def : Pat<(i64 (int_x86_sse_cvtss2si64 (v4f32 VR128X:$src))), (VCVTSS2SI64Zrr VR128X:$src)>; - def : Pat<(i64 (int_x86_sse_cvtss2si64 (sse_load_f32 addr:$src))), - (VCVTSS2SI64Zrm addr:$src)>; + def : Pat<(i64 (int_x86_sse_cvtss2si64 sse_load_f32:$src)), + (VCVTSS2SI64Zrm sse_load_f32:$src)>; def : Pat<(i32 (int_x86_sse2_cvtsd2si (v2f64 VR128X:$src))), (VCVTSD2SIZrr VR128X:$src)>; - def : Pat<(i32 (int_x86_sse2_cvtsd2si (sse_load_f64 addr:$src))), - (VCVTSD2SIZrm addr:$src)>; + def : Pat<(i32 (int_x86_sse2_cvtsd2si sse_load_f64:$src)), + (VCVTSD2SIZrm sse_load_f64:$src)>; def : Pat<(i64 (int_x86_sse2_cvtsd2si64 (v2f64 VR128X:$src))), (VCVTSD2SI64Zrr VR128X:$src)>; - def : Pat<(i64 (int_x86_sse2_cvtsd2si64 (sse_load_f64 addr:$src))), - (VCVTSD2SI64Zrm addr:$src)>; + def : Pat<(i64 (int_x86_sse2_cvtsd2si64 sse_load_f64:$src)), + (VCVTSD2SI64Zrm sse_load_f64:$src)>; } // HasAVX512 let Predicates = [HasAVX512] in { |