diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-15 20:51:32 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-15 20:51:32 +0000 |
| commit | 1d5d2cac8c65ef20f3e0e10731bc5a2f784d9dbc (patch) | |
| tree | 8bd3418ec036f5fbed8e08dce5f499df97a6c6dc /llvm/lib | |
| parent | 990dd3d0fbb341a3bcce3168e02a920536d87369 (diff) | |
| download | llvm-1d5d2cac8c65ef20f3e0e10731bc5a2f784d9dbc.zip llvm-1d5d2cac8c65ef20f3e0e10731bc5a2f784d9dbc.tar.gz llvm-1d5d2cac8c65ef20f3e0e10731bc5a2f784d9dbc.tar.bz2 | |
Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.
Patch by James Molloy.
llvm-svn: 137647
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index e7b555a..852c52a 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1094,6 +1094,21 @@ static bool DecodeAddrMode3Instruction(llvm::MCInst &Inst, unsigned Insn, unsigned P = fieldFromInstruction32(Insn, 24, 1); bool writeback = (W == 1) | (P == 0); + + // For {LD,ST}RD, Rt must be even, else undefined. + switch (Inst.getOpcode()) { + case ARM::STRD: + case ARM::STRD_PRE: + case ARM::STRD_POST: + case ARM::LDRD: + case ARM::LDRD_PRE: + case ARM::LDRD_POST: + if (Rt & 0x1) return false; + break; + default: + break; + } + if (writeback) { // Writeback if (P) U |= ARMII::IndexModePre << 9; |