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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-15 21:44:37 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-15 21:44:37 +0000 |
| commit | 0d89e849bdf96dc424505c1bc84e24d504aee60c (patch) | |
| tree | 0b7de18a8c4b73e546fbe658093283c68ce0add8 /llvm/lib | |
| parent | 2a89e8526a297a3ddb2a4e56045060f26cb0f71c (diff) | |
| download | llvm-0d89e849bdf96dc424505c1bc84e24d504aee60c.zip llvm-0d89e849bdf96dc424505c1bc84e24d504aee60c.tar.gz llvm-0d89e849bdf96dc424505c1bc84e24d504aee60c.tar.bz2 | |
R600/SI: Fix select on i1
llvm-svn: 213096
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 56e760c..b107ed4 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -182,6 +182,9 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32 }; + setOperationAction(ISD::SELECT_CC, MVT::i1, Expand); + setOperationAction(ISD::SELECT, MVT::i1, Promote); + for (MVT VT : VecTypes) { for (unsigned Op = 0; Op < ISD::BUILTIN_OP_END; ++Op) { switch(Op) { |