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| author | Carl Ritson <carl.ritson@amd.com> | 2020-05-30 11:15:39 +0900 |
|---|---|---|
| committer | Carl Ritson <carl.ritson@amd.com> | 2020-05-30 11:16:19 +0900 |
| commit | d04147789ff0b838f9dd6c592207d5f70bc0d025 (patch) | |
| tree | 60d412977ac46f63f95f19093d0c0ca094870155 /llvm/lib/TextAPI/MachO/ArchitectureSet.cpp | |
| parent | 0892a96a05a8943457a4a3e2547923087aa06226 (diff) | |
| download | llvm-d04147789ff0b838f9dd6c592207d5f70bc0d025.zip llvm-d04147789ff0b838f9dd6c592207d5f70bc0d025.tar.gz llvm-d04147789ff0b838f9dd6c592207d5f70bc0d025.tar.bz2 | |
[AMDGPU] Remove assertion on S1024 SGPR to VGPR spill
Summary:
Replace an assertion that blocks S1024 SGPR to VGPR spill.
The assertion pre-dates S1024 and is not wave size dependent.
Reviewers: arsenm, sameerds, rampitec
Reviewed By: arsenm
Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80783
Diffstat (limited to 'llvm/lib/TextAPI/MachO/ArchitectureSet.cpp')
0 files changed, 0 insertions, 0 deletions