diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-08-05 18:23:43 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-05 18:23:43 +0000 |
| commit | adb93e56a3937a289eab0da0111125a8fc3afb19 (patch) | |
| tree | 169cecb83744df9f738c8b6be2187352a9a88fa7 /llvm/lib/Target | |
| parent | 08aca902538a54614d7dd37a54f45e68171f1d74 (diff) | |
| download | llvm-adb93e56a3937a289eab0da0111125a8fc3afb19.zip llvm-adb93e56a3937a289eab0da0111125a8fc3afb19.tar.gz llvm-adb93e56a3937a289eab0da0111125a8fc3afb19.tar.bz2 | |
Add an ARM RSBrr instruction for disassembly only.
Partial fix for PR7792.
llvm-svn: 110358
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 2e78328..2ca2415 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1629,13 +1629,21 @@ defm ADCS : AI1_adde_sube_s_irs<0b0101, "adcs", defm SBCS : AI1_adde_sube_s_irs<0b0110, "sbcs", BinOpFrag<(sube_live_carry node:$LHS, node:$RHS) >>; -// These don't define reg/reg forms, because they are handled above. def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm, IIC_iALUi, "rsb", "\t$dst, $a, $b", [(set GPR:$dst, (sub so_imm:$b, GPR:$a))]> { let Inst{25} = 1; } +// The reg/reg form is only defined for the disassembler; for codegen it is +// equivalent to SUBrr. +def RSBrr : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, GPR:$b), DPFrm, + IIC_iALUr, "rsb", "\t$dst, $a, $b", + [/* For disassembly only; pattern left blank */]> { + let Inst{25} = 0; + let Inst{11-4} = 0b00000000; +} + def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm, IIC_iALUsr, "rsb", "\t$dst, $a, $b", [(set GPR:$dst, (sub so_reg:$b, GPR:$a))]> { |