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| author | Jim Lin <jim@andestech.com> | 2025-05-15 10:21:27 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-05-15 10:21:27 +0800 |
| commit | ee786975195c9cab264c88db8c43980b78780167 (patch) | |
| tree | aeb61ba147e44d6d555fbe409860333fddf027e4 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 2a8960e48b178fb2533e71bbe164e9f383046114 (diff) | |
| download | llvm-ee786975195c9cab264c88db8c43980b78780167.zip llvm-ee786975195c9cab264c88db8c43980b78780167.tar.gz llvm-ee786975195c9cab264c88db8c43980b78780167.tar.bz2 | |
[RISCV] Support LLVM IR intrinsics for XAndesVPackFPH (#139860)
This patch adds LLVM IR intrinsic support for XAndesVPackFPH.
The document for the intrinsics can be found at:
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
and with policy variants
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/policy_funcs/intrinsic_funcs.adoc#andes-vector-packed-fp16-extensionxandesvpackfph
The clang part will be added in a later patch.
Co-authored-by: Tony Chuan-Yue Yuan <yuan593@andestech.com>
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions