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| author | Gadi Haber <gadi.haber@intel.com> | 2017-12-07 09:00:19 +0000 |
|---|---|---|
| committer | Gadi Haber <gadi.haber@intel.com> | 2017-12-07 09:00:19 +0000 |
| commit | e33a0cb8a8828dbc1e3f68b0eff07f83748a269a (patch) | |
| tree | 912fface612a06144fed404b014b79f33104c19f /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 54d1ff0a589aa0f1f47071a62911881020b4faf2 (diff) | |
| download | llvm-e33a0cb8a8828dbc1e3f68b0eff07f83748a269a.zip llvm-e33a0cb8a8828dbc1e3f68b0eff07f83748a269a.tar.gz llvm-e33a0cb8a8828dbc1e3f68b0eff07f83748a269a.tar.bz2 | |
[X86][X87]: Adding full coverage of MC encoding for all X87 ISA Sets.<NFC>
NFC.
Currently, not all the X86 ISA Sets are covered by the MC regressions tests for X86.
A full coverage needs to be added for each ISA set and for both 32bit and 64bit instructions + registers.
This patch includes MC assembly tests for the X87 32bit and 64bit.
Reviewers: craigt, RKSimon, zvi
Differential Revision: https://reviews.llvm.org/D39952
Change-Id: I55e1719c09a70644a6a4073c720cb5341c80fee9
llvm-svn: 320015
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions