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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-07-07 10:21:44 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-07 10:21:44 +0900 |
| commit | dc5d353f3a0aacfbbc698cccb20484dbb6926484 (patch) | |
| tree | c5250318fbdddf4fbd5ca7d1158b80f8e1f44d10 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 9865d7cb635f086866db5970a5be2d56bf934741 (diff) | |
| download | llvm-dc5d353f3a0aacfbbc698cccb20484dbb6926484.zip llvm-dc5d353f3a0aacfbbc698cccb20484dbb6926484.tar.gz llvm-dc5d353f3a0aacfbbc698cccb20484dbb6926484.tar.bz2 | |
AArch64: Fix some missing llvm.frexp test coverage (#146691)
AArch64 was testing a couple of vector cases, and not the base
scalars. Add the one case that isn't in the ARM version there, and
then copy the rest back into AArch64. Also add a windows run line.
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions